JPH0260113B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an imaging device that can effectively suppress blooming.

(Prior art) Conventionally, as shown in Japanese Patent Application Laid-Open No. 138371/1983,
To prevent blooming in solid-state image sensors such as CCDs, overflow and
Instead of providing a drain, a method is being considered that utilizes surface recombination to eliminate excess carriers.

This method has advantages such as high sensitivity because it does not sacrifice the aperture ratio in the light-receiving surface, and higher horizontal resolution because the degree of integration can be improved.

1 to 3 are diagrams for explaining a blooming prevention method using such surface recombination, and FIG. 1 is a front view of a general frame transfer type CCD.

In the figure, reference numeral 1 denotes a light receiving section, which is composed of a plurality of photosensitive vertical transfer registers.

Further, reference numeral 2 denotes a storage section, which is composed of a plurality of vertical transfer registers that are shielded from light.

Reference numeral 3 denotes a horizontal transfer register; the information in each vertical transfer register of the storage section 2 is transferred by one bit at the same time to the horizontal transfer register, and then the video signal is transferred from the output amplifier 4 by causing the register 3 to perform a horizontal transfer operation. can be obtained.

Generally, the information formed in each vertical transfer register of the light receiving section 1 is vertically transferred to the storage section 2 during the vertical blanking period in the standard television system, and is sequentially transferred from the horizontal transfer register 3 within the next vertical scanning period. It is read line by line.

Here, it is assumed that the light receiving section 1, the storage section 2, and the horizontal transfer register 3 are each driven in two phases, and the respective transfer electrodes are _P1 , _P2 , _P3 , _P4 , _P5 , _P6 , The transfer clocks are (φ _P1 , φ _P2 ), (φ _P3 , φ _P4 ), (φ _P5
，
φ _P6 ).

FIG. 2 is a diagram showing the potential profile under such transfer electrodes _P1 to _P6 . For example, by applying a low level voltage -V ₁ to the electrodes P ₂ , P ₄ , P ₆ , the electrodes P ₁ , P ₃ , P When a high level voltage V ₂ is applied to ₅ , a potential as shown by the solid line in the figure is formed. Moreover, the electrode P ₁ ,
A low level voltage V ₁ is applied to P ₃ and P ₅ , and the electrodes P ₂ and
When a high level voltage V ₂ is applied to P ₄ and P ₆ , a potential as shown by the broken line in the figure is formed.

Therefore, by applying alternating voltages with opposite phases to the electrodes P ₁ , P ₃ , P ₅ and the electrodes P ₂ , P ₄ , P ₆ , the carriers are sequentially transferred in the negative direction (rightward in the figure). .

In addition, the dashed-dotted line in the figure indicates a large positive voltage V ₃ at the electrode.
This shows the potential when .

FIG. 3 is a diagram showing the shape of the electrode voltage and internal potential in the thickness direction of the semiconductor substrate 6. As shown in the figure, for electrode voltage _V3 , the potential well becomes shallow and excess carrier becomes a second state in which it recombines with majority carriers at the interface with the insulating layer.

On the other hand, when the electrode voltage is _-V1 , the first state is an accumulation state, and a large number of carriers tend to gather around the interface, and the large number of carriers are supplied from, for example, a channel stopper region (not shown).

Therefore, for example, by applying voltages -V ₁ and V ₃ alternately to electrode P ₁ while forming a barrier by applying voltage -V ₁ to electrode P ₂ ,
The minority carriers accumulated under the electrode _P1 are limited to a predetermined amount or less. However, CCDs using such charge recombination have the problem that the clock for recombination is mixed into the output signal, resulting in fixed pattern noise. For this reason, conventional devices are configured to supply the recombination clock only during the horizontal blanking period.

In this conventional CCD, frame transfer starts within the vertical blanking period, so
For example, the recombination clock may be stopped for about 1/2H (horizontal period) just before that, and transfer starts with a lot of charge still accumulated, resulting in a smear phenomenon or Blooming phenomenon may occur. For this reason, a method of driving during the vertical blanking period may also be considered, but this is not a preferable method due to problems such as power consumption.

(Purpose) The present invention prevents blooming or smearing by performing a recombination operation for a predetermined period immediately before frame transfer, and does not increase power consumption.
It is an object of the present invention to provide an imaging device that is effective even when transferring data in a portion other than the vertical blanking period.

(Example) The present invention will be explained below based on Examples.

FIG. 4 is a diagram showing an example of an imaging device using an imaging element according to the present invention. In this embodiment, a case of a frame transfer type CCD using a single-phase drive method will be explained.

In the figures, the same reference numerals as in FIGS. 1 to 3 indicate the same elements.

In this embodiment, a transfer clock φ _PI and a clock φ _AB are applied to the light receiving section 1 for causing excess charges to recombine with holes at the surface recombination center and disappear.

Furthermore, transfer clocks φ _PS and φ _S are applied to the storage section 2 and the horizontal transfer register 3, respectively.

CKD uses these clock pulses φ _PI , φ _AB , φ _PS ,
_CKG is a clock generator that generates timing signals to form these pulses, and PAP is a process amplifier that serves as a suppression means. As described below, it is used to block or non-linearly suppress signals above a certain level.
Includes KNEE circuit or γ conversion circuit, etc. The ECD is an encoder, and the video signal passed through the amplifier PAP is converted by this encoder into a standard television system signal such as an NTSC signal.

FIG. 5 is a diagram schematically showing the electrode structure and potential in a cross section of the boundary region between the light receiving section 1 and the storage section 2. As shown in FIG.

In the figure, P _PI is the transfer electrode that applies the transfer clock φ _PI of the light receiving section, P _AB is the recombination control electrode as a recombination means for applying the recombination clock φ _AB , and P _PS is the transfer clock φ of the storage section. The transfer electrode to which _PS is applied, the potential state shown by the solid line in the figure is when a low-level voltage is applied as φ _PI , φ _PS , and a high-level voltage is applied as φ _AB , and the broken line is for φ _PI ,
This is when φ _PS is set to high level and φ _AB is set to low level.

Incidentally, a potential staircase as shown in the figure is formed in the substrate SS by ion implantation. or,
Although not shown, a virtual electrode (virtual electrode) is placed in the lower part of the insulating layer that is not covered by the electrodes P _PI , P _PS , and P _AB , that is, the boundary between the insulating layer and the semiconductor substrate.
For example, a P-type inversion layer is formed to constitute an electrode. Therefore, the potential in the semiconductor region not covered by the electrodes is not changed by the bias applied to each electrode.

Note that the area indicated by X in the figure is considered to be a first area, and the area indicated by Y is considered to be a second area. As shown, the second region refers to the region including the electrode P _PS . Also, this first area,
The second region applies not only to single-phase driving but also to multi-phase driving methods.

FIG. 6 is a diagram showing an example of an electrode pattern in the region shown in FIG. CS is a channel stop and prevents horizontal charge movement. 4th~
According to the embodiment shown in FIG. 6, electrodes for charge recombination
Since the width of _PAB can be made sufficiently smaller than the width of transfer electrode _PPI , the removal efficiency can be increased when removing excess charge.

Furthermore, in a single-phase drive type CCD image sensor, the charge recombination operation can be performed independently of the transfer operation.

Moreover, the recombination control structure of the image pickup device of this embodiment can be formed by a polysilicon gate formation step for an electrode, which can be manufactured in the same process as the channel stop, and an ion implantation step for forming an internal potential stage.

Figure 7 shows clock pulses φ _AB , φ _PI , φ _PS , φ _S output from clock driver CKD to drive the image sensor shown in Figure 4 and the output of amplifier 4.
It is a waveform diagram of Vout etc. A vertical blanking signal is generated between times t ₁ to _{t 3} and t ₄ to _{t 6} in synchronization with the vertical synchronization signal V _D obtained for each television field.
V _BLK is output.

Further, H _BLK is a horizontal blanking signal. First, during the accumulation period from time t ₁ , t ₃ to _{t 4} , and t ₆ , the level of φ _PI is set to approximately the intermediate level between −V ₁ and V ₂ . V Fixed at ₅ level. Further, at the end of each accumulation period, whether to raise or lower φ _PI is switched for each field.

To explain this, during the accumulation period, φ _PI is reduced to V ₅
By setting the level, as shown in Figure 8a,
Potential wells A and C are formed in the substrate under the transfer electrode φ _PI and in the substrate under the virtual electrode, respectively, and charges are accumulated in each well.

Since a plurality of pulses φ _AB are supplied during the horizontal blanking period of this accumulation period as shown in FIG.
The potential below the electrode P _AB goes up and down as shown in Figure 8a, but when the potential goes up, the excess charge that is collected in the vicinity of the insulating layer 5, which is part of the charge in the well B, becomes Since it recombines with the hole, it disappears and does not leak into well A.

Next, by supplying multiple pulses of φ _AB from time t ₁ to _{t 2} and from t ₄ to _{t 5} , excess charge immediately before vertical transfer is removed. Further, between times _t2 to _t3 and _t5 to _t6, clocks φ _PI and φ _PS of the same number as the number of pixels in the vertical direction of the light receiving section 1 and the storage section 2 are supplied in phase.
As a result, the charge in each pixel cell in the light receiving section 1 is transferred and accumulated in the corresponding storage cell in the storage section.

At this time, in the present invention, the clock φ _AB applied to the recombination electrode P _AB is fixed at _V4 . This voltage _V4 is, for example, a voltage value such that the potential level below the electrode _PAB is located between the upper and lower limits of the potential level of the virtual electrode portion, as shown in FIG.

As described above, at the end of each accumulation period, whether to raise or lower φ _PI is switched for each field.

That is, the amount of charge entering wells A and C (or B) during the accumulation period of the first field up to time _t1 in FIG. 7 is expressed as A _INT , B INT , B _INT ,
Let it be C _INT . Next, at the time of vertical transfer starting from time _t2 in FIG. 7, as shown in FIG. 8b, at the beginning of the transfer φ _PI
By raising the voltage from the intermediate level _V5 to the _V2 level, the charges accumulated in the portions ′, ′, and so on are added and transferred to the storage section. or,
The second field is set by lowering φ _PI from the intermediate level V ₅ to −V ₁ at the beginning of the transfer′,
Add the charges accumulated in and ′, and ′…. Interlace operation is performed by changing the combination of charges added for each field in this way.

With this configuration, an interlacing effect can be achieved with a small number of pixels, and the dark current level does not change from field to field, making flickering less likely to occur.

When the vertical transfer is completed, the charges in the storage section are read out line by line in synchronization with the horizontal cycle by the clocks φ _PS and φ _S between times t ₃ - _{t 4} and t ₆ , and the horizontal line signal is is output as This period t ₂ ~ t ₃ , t ₆ ~
corresponds to the vertical scanning period of a standard television signal.

Next, we will explain the configuration example of the clock driver CKD in the first example.
0 and its timing chart is shown in FIG. 11. In Figures 10 and 11, _φD is a pulse that occurs twice in one horizontal period, and TRG is a frame transfer trigger pulse for frame transfer, which is generally output during the vertical blanking period or related timing. Ru.

Also, this pulse TRG is disclosed in, for example, Japanese Patent Application No. 58-61098.
As shown in the above, the output may be output at any timing other than the vertical blanking period. In that case, the image accumulation time is
It can also be controlled by the timing of TRG.

D flip-flop _D1 uses pulse TRG as a clock, and input D is always at high level.
The output T ₁ becomes high level due to the trigger by TRG (time t ₇ ). Therefore, D flip-flop D ₂ ,
Due to D ₃ , the clock φ _D is delayed by 2 minutes (time t ₈ ).
T ₂ occurs, which clears D ₁ and T ₁
becomes low level. The length of this section can be decreased or increased by increasing or decreasing the number of D flip-flops. In this example, this interval t ₇ to _{t 8} is one horizontal period, but if D ₂ is omitted, it becomes a (1/2) H interval. _T2
becomes high level, and at time _t9 , the output _T3 of the D flip-flop _D4 becomes high level, and after a predetermined clock, the flip-flops _D3 and _D4 are cleared by the output CARRY of the counter CNT (at time t9). ₁₀ ), T ₂ and T ₃ become low level, and frame transfer ends.

Since φ _PI , φ _PS, etc. can be generated in the φ _PI , φ _PS generating circuit SG as shown in FIG. 7, they are not particularly shown here.

Horizontal blanking signal H _BLK is AND gate A ₂
The output of AND gate _{A 2 is} an OR gate.
The logical sum with T ₁ in OR ₁ results in T ₁ ′. As a result, T ₁ ' becomes a timing signal for operating φ _AB . That is, T ₁ ' is at a high level during either the horizontal blanking period excluding the vertical transfer period t ₈ to _{t 10} or the high level period t ₇ to _{t 8} of the output T ₁ immediately before the output T ₂ . .

The clock signal CLK is controlled by AND gate _A1 .
Logically multiplied by T ₁ ′ clock CLK and output
Turn on switch SW ₁ to make φ _AB voltage V ₃ only while T ₁ ' is at high level, and while T ₂ is at high level,
Due to SW ₂ , φ _AB becomes an intermediate level V ₄ . When neither of these conditions exists, the switch _SW3 is closed by the output of the NOR gate _N1 , and _φAB becomes the voltage _-V1 .

As described above, the pulse φ _AB is supplied for a predetermined period of time just before the frame transfer period, and excess charge immediately before the transfer is removed, so that smear does not occur.

In the above explanation, an example of a frame transfer type CCD using a single-phase drive method has been described, but it goes without saying that the present invention is similarly applicable to a CCD image sensor using a multi-phase drive method. or,
It is clear that the present invention is applicable not only to CCDs but also to all types of image sensors that convert image signals into charges and store them.

(Effects) As described above, according to the present invention, by supplying a pulse for charge recombination immediately before frame transfer, excessive charges accumulated up to the start of frame transfer are reduced to an appropriate value, This makes it possible to prevent blooming and smearing caused by the inability to transfer the excessive charges during frame transfer.

In addition, there is no increase in power consumption like when operating during the vertical blanking period, and for exceptional uses such as obtaining an accumulation time shorter than the field period, it is possible to transfer frames outside the vertical blanking period. is also valid.

[Brief explanation of drawings]

Figure 1 is a schematic diagram of a conventional CCD image sensor, Figure 2 is a diagram explaining the driving method of the sensor shown in Figure 1, Figure 3 is a diagram explaining the principle of surface charge recombination, and Figure 4 is a diagram of the present invention. 5 is a schematic cross-sectional view showing an example of the structure of an image sensor suitable for the image sensor of the present invention; FIG. 6 is a diagram showing an example of the electrode pattern of the element shown in FIG. Figure 7 is a drive timing chart of the imaging device of the present invention, Figure 8a,
FIG. 9 is a diagram illustrating the potential state under the electrode P _AB , and FIG.
FIG. 0 is a diagram showing an example of the configuration of a clock driver, and FIG. 11 is a timing diagram thereof. 1... Light receiving section, P _AB ... Recombination control electrode as recombination means, CKD... Clock driver as control means.

Claims (1)

[Claims] 1. A light receiving section that converts an optical image into a charge signal, a transfer electrode for transferring and reading out the charge signal in the light receiving section, and converting a part of the charge in the light receiving section into a charge of a different polarity. an image sensor having a recombination electrode for recombining; supplying a transfer signal to the transfer electrode for transferring and reading a charge signal in the light receiving section of the image sensor within a vertical blanking period; An imaging device comprising: control means for supplying a drive signal for causing the recombination electrode to perform a recombination operation for a predetermined time period immediately before supply of the transfer signal and within the vertical blanking period. 2. A light-receiving section that converts an optical image into a charge signal, a transfer electrode for transferring and reading out the charge signal in the light-receiving section, and a re-electrode for recombining part of the charge in the light-receiving section with charges of the other polarity. a coupling electrode; supplying a transfer signal for transferring and reading out a charge signal in the light receiving section of the image sensor to the transfer electrode during a vertical blanking period; and supplying the transfer signal to the transfer electrode; a control means for supplying a drive signal for causing the recombination electrode to perform a recombination operation for a predetermined time immediately before and within the vertical blanking period; An imaging device comprising: a signal processing means for forming a television video signal using the signal processing means.