JPH0260904U - - Google Patents

Info

Publication number
JPH0260904U
JPH0260904U JP13543688U JP13543688U JPH0260904U JP H0260904 U JPH0260904 U JP H0260904U JP 13543688 U JP13543688 U JP 13543688U JP 13543688 U JP13543688 U JP 13543688U JP H0260904 U JPH0260904 U JP H0260904U
Authority
JP
Japan
Prior art keywords
oscillation
circuit
control
audio
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13543688U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13543688U priority Critical patent/JPH0260904U/ja
Publication of JPH0260904U publication Critical patent/JPH0260904U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示すブロツク図、
第２図ａ，ｂ，ｃはその要部の信号波形図、第３
図は従来のブロツク図、第４図ａ，ｂはその要部
の信号波形図である。 １：システムコントロール用マイクロコンピユ
ータ、３：バイアス発振回路、６：遅延回路。 FIG. 1 is a block diagram showing an embodiment of the present invention.
Figures 2a, b, and c are signal waveform diagrams of the main parts;
The figure is a conventional block diagram, and FIGS. 4a and 4b are signal waveform diagrams of the main parts thereof. 1: Microcomputer for system control, 3: Bias oscillation circuit, 6: Delay circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ビデオ一体型カメラのオーデイオ回路内のバイ
アスコイル、トランジスタ等による発振回路及び
システムコントロール用マイクロコンピユータか
ら出力されるハイ、ロウの制御信号からなる音声
記録回路において、上記制御信号を抵抗、コンデ
ンサにより遅延させる遅延回路と、この遅延信号
により発振コイルの電源をトランジスタによりオ
ン、オフさせる電源制御回路を設け、発振を単に
制御信号による発振から電源制御による発振に変
え、該発振の立上りと立ち下がりをなまらせるこ
とを特徴とするオーデイオノイズ低減回路。 In the audio recording circuit, which consists of an oscillation circuit made up of bias coils and transistors in the audio circuit of a video integrated camera, and high and low control signals output from the system control microcomputer, the control signals are delayed by resistors and capacitors. A delay circuit and a power supply control circuit that uses the delay signal to turn on and off the power of the oscillation coil using a transistor are provided, changing the oscillation from simply oscillation caused by the control signal to oscillation caused by power control, and smoothing the rise and fall of the oscillation. An audio noise reduction circuit characterized by:
JP13543688U 1988-10-19 1988-10-19 Pending JPH0260904U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13543688U JPH0260904U (en) 1988-10-19 1988-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13543688U JPH0260904U (en) 1988-10-19 1988-10-19

Publications (1)

Publication Number Publication Date
JPH0260904U true JPH0260904U (en) 1990-05-07

Family

ID=31395059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13543688U Pending JPH0260904U (en) 1988-10-19 1988-10-19

Country Status (1)

Country Link
JP (1) JPH0260904U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5022405A (en) * 1973-07-05 1975-03-10
JPS648501A (en) * 1987-06-30 1989-01-12 Matsushita Electric Industrial Co Ltd Timing circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5022405A (en) * 1973-07-05 1975-03-10
JPS648501A (en) * 1987-06-30 1989-01-12 Matsushita Electric Industrial Co Ltd Timing circuit

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