JPH0276843U - - Google Patents

Description

[Brief explanation of drawings]

FIG. 1 is a plan view showing an example of the semiconductor device array of the present invention, FIG. 2 is a partial sectional view of the semiconductor device array shown in FIG. 1, and FIG. 3 is a partial sectional view of the conventional semiconductor device array. Shown below. In the figure, 1...chip, 1a...chip 1
Semiconductor layers 2, 12, 22, 32, 42, 5 that commonly constitute a part of semiconductor elements arranged in
2, 62...Transistor, 2a, 2b...Semiconductor layer forming transistor 2, 12a, 12b
... A semiconductor layer constituting the transistor 12, 3,
13... Separation zone, 3a... Semiconductor layer forming separation zone 3, 3c... Electrode of separation zone 3.

Claims (1)

[Scope of utility model registration request] A semiconductor element array in which a plurality of semiconductor elements are arranged on a chip with their P-type semiconductor layer or N-type semiconductor layer in common, and a strip-shaped separation band is provided adjacent to each of the semiconductor elements, When the separation band is mainly formed of a semiconductor of a different type from the semiconductor layer, and the electrode attached to the separation band is a P-type semiconductor, the electrode is lower than the separation band. It is characterized in that it is connected to a site outside the chip that has a potential, or, when the semiconductor that mainly forms the separation band is an N-type semiconductor, it is connected to a site outside the chip that has a higher potential than the separation band. Semiconductor element array.