JPH02851B2 - - Google Patents

Info

Publication number
JPH02851B2
JPH02851B2 JP55145465A JP14546580A JPH02851B2 JP H02851 B2 JPH02851 B2 JP H02851B2 JP 55145465 A JP55145465 A JP 55145465A JP 14546580 A JP14546580 A JP 14546580A JP H02851 B2 JPH02851 B2 JP H02851B2
Authority
JP
Japan
Prior art keywords
wafer
semiconductor device
protrusions
coating
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55145465A
Other languages
Japanese (ja)
Other versions
JPS5769746A (en
Inventor
Kazumasa Shigematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55145465A priority Critical patent/JPS5769746A/en
Publication of JPS5769746A publication Critical patent/JPS5769746A/en
Publication of JPH02851B2 publication Critical patent/JPH02851B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)

Description

【発明の詳細な説明】 本発明は半導体装置用ウエーハの平坦化方法に
関する。特に、半導体装置の製造工程においてし
ばしば使用される、多結晶シリコン(Si)層、窒
化シリコン(Si3N4)層、シリケートガラス層等
の気相成長工程の施こされた直後の半導体装置用
ウエーハの表面に往々発生する突起等を除去し、
そのウエーハ表面を平坦化する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for planarizing a wafer for semiconductor devices. In particular, for semiconductor devices immediately after the vapor phase growth process of polycrystalline silicon (Si) layers, silicon nitride (Si 3 N 4 ) layers, silicate glass layers, etc., which are often used in the manufacturing process of semiconductor devices. Removes protrusions that often occur on the wafer surface,
The present invention relates to a method for planarizing the wafer surface.

一般に半導体装置用ウエーハに所望の物質を気
相成長させる工程は清浄な真空容器中で施こされ
るから、巨視的には異物の侵入はありえないが、
反応条件が微妙であるため、微視的に検査すると
その表面は必らずしも平坦とは云い難いことが
往々である。すなわち、シリコン(Si)や窒化シ
リコン(Si3N4)等の高さ5乃至10μmの突起が
存在したり、時には全く異質の物質片の存在を発
見することもある。
Generally, the process of vapor phase growth of a desired substance onto a wafer for semiconductor devices is performed in a clean vacuum container, so macroscopically there is no possibility of foreign matter entering.
Since the reaction conditions are delicate, the surface is often not necessarily flat when microscopically inspected. That is, the presence of protrusions of silicon (Si), silicon nitride (Si 3 N 4 ), etc. with a height of 5 to 10 μm, and sometimes the presence of pieces of completely different substances.

従来は、かゝる平坦不良性の詳細内容が必らず
しも明らかではなかつた事実及びかゝる平坦不良
性を補修する有効な方法がなかつた事実等によ
り、そのまゝ次工程を施こしており、結果的に歩
留り低下の原因、更には、信頼性低下の原因をな
していた。
In the past, due to the fact that the details of such flatness defects were not necessarily clear and the fact that there was no effective method to repair such flatness defects, it was not necessary to proceed to the next process as is. This resulted in a decrease in yield and further a decrease in reliability.

本発明の目的は、かゝる不良な平坦性を有する
半導体装置用ウエーハの表面を平坦化する方法を
提供することであり、気相成長工程完了後その表
面に粘性を有する被覆膜の薄層をまづ形成した後
高硬度で平坦かつ平滑な平板を押圧して不良な平
坦性の原因をなしている突起物等を物理的に破壊
して細粒となし、これを洗浄剤をもつて洗い流し
た後乾燥した不活性気体を用いて乾燥する工程を
要旨とする。
An object of the present invention is to provide a method for flattening the surface of a semiconductor device wafer having such poor flatness, by applying a thin layer of a viscous coating film to the surface after the completion of the vapor phase growth process. After the layer is first formed, a flat and smooth plate with high hardness is pressed to physically destroy the protrusions that cause poor flatness and turn them into fine particles, which are then treated with a cleaning agent. The gist is the process of rinsing and drying using an inert gas.

以下、本発明に係る好ましい一実施例を図面に
従つて説明し、本発明の構成と特有の効果とを明
らかにする。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described below with reference to the drawings to clarify the structure and unique effects of the present invention.

第1図参照 第1の工程は、多結晶シリコン(Si)層、窒化
シリコン(Si3N4)層、シリケートガラス層等所
望の気相成長膜2が設けられた、シリコン(Si)
等よりなる半導体装置用ウエーハ1の表面に、例
えばポリビニルアルコール(CH2CHOH)n等
粘度が高く化学的に安定でかつ水等によつて洗い
流しやすい物質をエチルアルコール(C2H5OH)
等適当な溶剤で稀釈した液体(以下減摩剤3とい
う。)を薄く数μmの厚さに塗布して被覆膜を形
成する工程である。またポリビニルアルコール
(CH2CHOH)n等の他にネガ型フオトレジスト
に代表されるゴム系ポリマー等を利用することも
可能である。この液体の機能は次工程における減
摩剤又は緩衝材としてのそれであるから、できる
だけ平坦に塗布することが必要である。そのた
め、スピンコート方式を採用することが望まし
い。従つて、この工程の実施に使用する装置は、
通常のウエーハカセツト式ウエーハ送り装置又は
ベルトコンベア式ウエーハ送り装置等のウエーハ
供給装置に接続して、通常のスピンコート装置と
全く同一の構造を有する減摩剤塗布装置を設けれ
ば足りる。もつとも、この工程の実施のために
は、他の如何なる形式の減摩剤塗布装置を使用し
てもさしつかえないことは云うまでもない。更
に、次工程において使用される押圧板4との粘着
性はなるべく制限しながら減摩剤又は緩衝材とし
ての機能を十分大きくするため、150℃で10分間
程度ベークし、減摩剤3の表面のみを乾燥塗膜に
しておくことが望ましい。
See Figure 1. The first step is to deposit silicon (Si) on which a desired vapor growth film 2 such as a polycrystalline silicon (Si) layer, silicon nitride (Si 3 N 4 ) layer, or silicate glass layer is provided.
A substance with high viscosity, chemical stability, and easy to wash away with water, such as polyvinyl alcohol (CH 2 CHOH), etc., is applied to the surface of the semiconductor device wafer 1 made of ethyl alcohol (C 2 H 5 OH).
In this process, a liquid diluted with a suitable solvent (hereinafter referred to as lubricant 3) is applied thinly to a thickness of several μm to form a coating film. In addition to polyvinyl alcohol (CH 2 CHOH), it is also possible to use rubber-based polymers typified by negative photoresists. Since the function of this liquid is as a lubricant or buffering agent in the next process, it is necessary to apply it as evenly as possible. Therefore, it is desirable to adopt a spin coating method. Therefore, the equipment used to carry out this step is
It is sufficient to connect to a wafer feeding device such as a normal wafer cassette type wafer feeding device or a belt conveyor type wafer feeding device and provide an anti-friction agent coating device having exactly the same structure as a normal spin coating device. However, it goes without saying that any other type of lubricant applicator may be used to carry out this step. Furthermore, in order to sufficiently increase the function as an anti-friction agent or a buffer material while limiting the adhesion with the press plate 4 used in the next step, the surface of the anti-friction agent 3 is baked at 150°C for about 10 minutes. It is desirable to leave only a dry coating film.

第2図参照 第2の工程は、表面のみが乾燥状態で内部は液
体状の減摩剤の薄層で覆われた、シリコン(Si)
等よりなる半導体装置ウエーハ1の表面に、例え
ばエツチングマスク等硬度が高く平坦でかつ平滑
な平板4(以下押圧板という。)を押圧して、半
導体装置用ウエーハ1の表面の平坦性を阻害して
いる突起20等を破壊しこれを細粒とする工程で
ある。半導体装置用ウエーハ1は一般に1mm以下
の薄層であるから、これを破壊せず、しかも突起
20等は破壊するに十分な圧力で押圧することが
重要である。この工程においては、表面のみが乾
燥状態にあり内部は液体状の減摩剤が介在してい
るから、半導体装置用ウエーハ1の表面が突起2
0等が破壊されてできた粒状体によつて損傷を受
けることはなく、かつ、押圧板4が減摩剤3で汚
染されることもない。この工程の実施に使用する
押圧板押圧装置はエツチング用位置合わせ装置類
似の構造を有し、たゞ、マスクすなわち押圧板と
ウエーハとの間に僅少の圧力が印加しうるように
改造されていれば足りる。もつとも、この工程の
実施のためには、他の如何なる形式の押圧板押圧
装置を使用してもさしつかえないことは云うまで
もない。
See Figure 2 The second step involves making silicon (Si), which is dry on the surface and covered with a thin layer of liquid lubricant inside.
A flat plate 4 (hereinafter referred to as a pressing plate) having high hardness, such as an etching mask, is pressed against the surface of the semiconductor device wafer 1, for example, to impede the flatness of the surface of the semiconductor device wafer 1. This is a process in which the protrusions 20 and the like that are present are destroyed and made into fine particles. Since the wafer 1 for semiconductor devices is generally a thin layer of 1 mm or less, it is important to press with enough pressure to not destroy the wafer 1 but also to destroy the protrusions 20 and the like. In this process, only the surface is in a dry state and the inside is filled with a liquid anti-friction agent, so that the surface of the semiconductor device wafer 1 is
The press plate 4 will not be damaged by the granules created by the destruction of the 0 etc., and the press plate 4 will not be contaminated with the anti-friction agent 3. The pressure plate pressing device used to carry out this process has a structure similar to the alignment device for etching, but has been modified so that a slight pressure can be applied between the mask, that is, the pressure plate and the wafer. That's enough. However, it goes without saying that any other type of press plate pressing device may be used to carry out this step.

第3の工程は、突起等が破壊されて平坦性が実
現された半導体装置用ウエーハ1の表面に減摩剤
中に浮遊して存在する異物粒子を、例えば純粋な
水等流動性が高く化学的に不活性な液体(洗浄
剤)をもつて洗い流す工程である。半導体装置用
ウエーハ1を水平面内で高速で回転させておきそ
の表面に洗浄剤を垂直方向に高速で噴射しても、
又、半導体装置用ウエーハ1を垂直に近い角度に
保持しておいて洗浄剤を水平方向に噴射してもそ
の目的は達せられる。この工程の実施に使用され
る洗浄装置は通常のスピンコート装置と類似の構
造を有し、たゞ、上方から高速をもつてする洗浄
剤の噴射を可能とすることと、法線方向に飛散し
た洗浄剤の排出系を設ければ足りる。これ以外の
装置が使用可能なことは繰り返すまでもない。
In the third step, foreign particles floating in an anti-friction agent on the surface of the semiconductor device wafer 1 whose flatness has been achieved by destroying protrusions etc. are removed using a highly fluid chemical such as pure water. This is a process of rinsing with an inert liquid (cleaning agent). Even if the semiconductor device wafer 1 is rotated at high speed in a horizontal plane and the cleaning agent is sprayed vertically onto the surface at high speed,
Further, the purpose can also be achieved by holding the semiconductor device wafer 1 at an almost vertical angle and spraying the cleaning agent horizontally. The cleaning equipment used to carry out this process has a structure similar to a normal spin coating equipment, and the only features are that the cleaning agent can be sprayed from above at high speed, and it can be scattered in the normal direction. It is sufficient to provide a discharge system for the cleaning agent. It goes without saying that other devices can be used.

第4の工程は、平坦化されかつ減摩剤の洗い流
された半導体装置用ウエーハ1を、例えば乾燥窒
素(N2)ガス等化学的に不活性な乾燥気体中で
例えば150℃程度の比較的低温で5乃至10分程度
の適当な時間ベークして、表面酸化等を防ぎなが
ら乾燥する工程である。洗浄剤に純水を使用する
ときは表面酸化の危険性が懸念されるから、この
工程は重要である。この工程の実施に使用する乾
燥装置は半導体装置の製造工程において通常使用
されるベーキング炉と同一の構造を有すれば足り
る。又、ウエーハ送り出し装置が接続されること
は云うまでもない。
In the fourth step, the semiconductor device wafer 1, which has been planarized and from which the lubricant has been washed away, is heated to a relatively high temperature of about 150°C in a chemically inert dry gas such as dry nitrogen (N 2 ) gas. This is a process of baking at a low temperature for an appropriate time of about 5 to 10 minutes and drying while preventing surface oxidation. This step is important because there is a risk of surface oxidation when using pure water as a cleaning agent. It is sufficient that the drying device used to carry out this step has the same structure as a baking oven normally used in the manufacturing process of semiconductor devices. It goes without saying that a wafer delivery device is also connected.

以上説明せる一連の工程完了の後、半導体製造
工程における通常の次工程例えばエツチング工程
等に進めればよい。
After completing the series of steps described above, it is sufficient to proceed to the next normal step in the semiconductor manufacturing process, such as an etching step.

以上説明せるとおり、本発明によれば、多結晶
シリコン(Si)層、窒化シリコン(Si3N4)層、
シリケートガラス層等の気相成長工程の施された
半導体装置用ウエーハの表面に往々発生する突起
等平坦性を阻害する物を極めて簡単な方法で、し
かも特別に設計された複雑な装置を必要とするこ
となく、完全に除去して、半導体装置用ウエーハ
の表面を平坦化する方法を提供することができ
る。この発明を使用することにより半導体装置の
製造歩留りが向上し、更に、半導体装置の信頼性
が向上する利益は非常に大きい。
As explained above, according to the present invention, a polycrystalline silicon (Si) layer, a silicon nitride (Si 3 N 4 ) layer,
This method is an extremely simple method for removing the protrusions that often occur on the surface of semiconductor device wafers that have been subjected to a vapor-phase growth process such as silicate glass layers, but does not require specially designed and complicated equipment. It is possible to provide a method for flattening the surface of a wafer for a semiconductor device by completely removing it without removing it. By using the present invention, the manufacturing yield of semiconductor devices can be improved, and furthermore, the reliability of semiconductor devices can be improved, which is a very large benefit.

なお、上記の説明中に述べた減摩剤、押圧板、
洗浄剤等が一例にすぎず、同様な機能を有する他
の物によつて置換しうることは云うまでもない。
In addition, the anti-friction agent, pressing plate,
It goes without saying that the cleaning agent and the like are merely examples, and can be replaced with other substances having similar functions.

【図面の簡単な説明】[Brief explanation of drawings]

第1,2図は本発明の一実施例を説明するため
の断面図である。 図中、1:半導体装置用ウエーハ、2:気相成
長膜、3:減摩剤、4:押圧板。
1 and 2 are sectional views for explaining one embodiment of the present invention. In the figure, 1: wafer for semiconductor device, 2: vapor growth film, 3: anti-friction agent, 4: press plate.

Claims (1)

【特許請求の範囲】 1 (イ) 突起を表面に有する気相成長膜を設けた
半導体装置用ウエーハの表面に高い粘度を有す
る被覆膜を塗布により形成する工程と、 (ロ) 該被覆膜の薄層を表面に有する前記半導体装
置用ウエーハの表面に平坦で平滑な表面を有す
る押圧板を押圧し前記突起を破壊する工程と、 (ハ) 該表面を洗浄し前記破壊された突起の粒子を
除去する工程とを含むことを特徴とする半導体
装置用ウエーハの平坦化方法。
[Scope of Claims] 1. (a) A step of forming a coating film having a high viscosity by coating on the surface of a semiconductor device wafer provided with a vapor-grown film having protrusions on the surface; (b) The coating a step of pressing a pressing plate having a flat and smooth surface against the surface of the semiconductor device wafer having a thin film layer on its surface to destroy the protrusions; (c) cleaning the surface to remove the destroyed protrusions; 1. A method for planarizing a wafer for semiconductor devices, the method comprising: removing particles.
JP55145465A 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device Granted JPS5769746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55145465A JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55145465A JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Publications (2)

Publication Number Publication Date
JPS5769746A JPS5769746A (en) 1982-04-28
JPH02851B2 true JPH02851B2 (en) 1990-01-09

Family

ID=15385861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55145465A Granted JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5769746A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128516A (en) * 1985-11-29 1987-06-10 Shin Etsu Handotai Co Ltd Removing method for projection of semiconductor wafer

Also Published As

Publication number Publication date
JPS5769746A (en) 1982-04-28

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