JPH0287548A - Manufacturing method of insulating layer separated substrate - Google Patents

Abstract

PURPOSE:To prevent the uneven concentration distribution and needless diffusion in the lateral direction of impurity from occurring by a method wherein impurity is ion-implanted on the semiconductor single crystal deposited layer during the deposition process to be continued. CONSTITUTION:When non-doped silicon is epitaxially deposited on the surface of a silicon single crystal wafer 1, a polysilicon layer 5 to be a holder layer is formed on an oxide film 2 while a silicon semiconductor (single crystal) deposited layer 6a' is formed on the part not covered with the oxide film 2. Next, the semiconductor deposited layer 6a' during the deposition process is heat treated after the surface thereof is ion-implanted with N type impurity 7. After finishing the heat treatment, the non-doped silicon is epitaxially deposited again and then another polysilicon layer 5'' and another silicon semiconductor (single crystal) deposited layer 6'' are formed. Then, the N type impurity 7 is ion-implanted in the surface again to repeat the process of forming the deposited layer. Finally, the title insulating layer isolated substrate can be manufactured by grinding the rear side until the grooves (oxide film) 2 are exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing an insulating layer-separated substrate (dielectric-separated substrate).

[Conventional technology]

2. Description of the Related Art Conventionally, there is a type of semiconductor substrate used for manufacturing semiconductor devices and the like called an insulating layer separation substrate (DI standard).

FIG. 3(a) shows a conventional insulating layer separated substrate.

The insulating layer separation substrate is a support layer (e.g. polysilicon layer)
A plurality of semiconductor single crystal regions 63 . . . are provided on 61 and electrically isolated by an insulating layer 62 . Some of these semiconductor single crystal regions 63 have a semiconductor single crystal deposited layer 63a that reaches from the bottom to the surface of the support layer 61 and has impurities diffused therein.

This insulating layer separated substrate is manufactured as follows.

First, a silicon (semiconductor) single crystal wafer 60 as shown in FIG. 3(b) is prepared. In this Ueno\60, grooves 65 for isolation are formed on the wafer surface, and the surface is covered with an oxide film which becomes the insulating layer 62 except for the area where the deposited layer 63a is formed.

When silicon is deposited on the surface of the silicon single crystal wafer 60, as shown in FIG. A deposited layer 63a' is formed.

Next, impurities are supplied (implanted) to the surface portion of this semiconductor deposited layer 63a' and thermally diffused to form a silicon semiconductor single crystal deposited layer 63a in which impurities are diffused, as shown in FIG. .

After forming the semiconductor deposited layer 63a, the wafer 60 is polished from the back side to the position shown by the dashed line in FIG. 3(d), thereby completing the insulating layer-separated substrate shown in FIG. 3(al).

[Problem to be solved by the invention]

However, in the above manufacturing method, the diffusion distance becomes long, especially when the thickness of the impurity diffusion portion is large.

If the diffusion distance is long, a long diffusion process is required, and the difference between areas with high and low impurity concentrations becomes large, making it difficult to obtain a -like concentration distribution. If there is a buried layer with a high impurity concentration in a semiconductor single crystal region, the impurities will be largely re-diffused.

In thermal diffusion treatment, impurities are also diffused in the lateral direction.

When it is desired to suppress lateral diffusion and diffuse deeply, lateral diffusion becomes a problem.

In view of the above circumstances, the present invention eliminates the need for long-time diffusion treatment even if the impurity diffusion portion in the semiconductor deposited layer is thick, and is effective in suppressing nonuniform impurity concentration distribution and unnecessary lateral diffusion of impurities. An object of the present invention is to provide a method for manufacturing an insulating layer-separated substrate.

[Means to solve the problem]

In order to solve the above problems, in the method for manufacturing an insulating layer-separated substrate according to the present invention, grooves for separation are formed on the surface, and the surface becomes an insulating layer except for the portion where the deposited layer is formed. In the manufacturing method, the semiconductor single crystal wafer covered with an oxide film is used, and after forming the support layer and the semiconductor single crystal deposited layer, the wafer is polished from the back side until the groove is exposed. layer of layers,
During the deposition, impurities are supplied to the surface of the same layer, and then the deposition is continued.

[For production]

In this invention, the impurity diffused deep into the semiconductor single crystal deposited layer is embedded in advance. Since the impurities are embedded, the diffusion distance becomes shorter than before. Therefore, a long-time diffusion process is no longer necessary, and non-uniformity in concentration and lateral diffusion distance can be suppressed. Large re-diffusion of impurities in the buried layer can also be prevented.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings in which embodiments are shown.

Figures 1 (al to il) show the steps from obtaining an insulating layer separated substrate to completing a semiconductor device using the same substrate by an example of the manufacturing method of the present invention.
Anisotropic etching is performed on the surface of an N-type silicon (semiconductor) single crystal wafer 1, as shown in FIG.゛A region 1a is formed.

Next, an oxide film (SiO = film) is formed on the entire surface, and then, as shown in FIG. .

Thereby, a silicon single crystal wafer 1 is completed in which grooves 2 for isolation are formed on the surface and the surface is covered with an oxide film 4 serving as an insulating layer except for the portion where the semiconductor single crystal deposited layer is formed. In the present invention, an insulating layer-separated substrate is manufactured using such a semiconductor single crystal Ueno\l.

Subsequently, non-doped silicon is deposited (epitaxially grown) on the surface of the silicon single crystal wafer 1. Then, as seen in FIG. 1 (dl), a polysilicon layer 5' serving as a support layer is formed on the oxide film 2, and a silicon semiconductor (single-crystal) deposited layer 6a' is formed in the area where the oxide film 2 is not present. In this case, the deposition thickness is not the total deposition thickness.In other words,
The state shown in FIG. 1(d) is still in the middle of deposition.

Note that the lower portion A of the deposited layer 6a' receives impurity diffusion from the N° layer 1a, and becomes an N'' layer (auto-doped region) instead of an N- layer.

Next, using a resist mask (not shown) or the like, an N-type impurity 7 is supplied (ion implanted) to the surface of the semiconductor deposited layer 6a' in the middle of deposition, and then, in order to recover crystal defects caused by the ion implantation, for example, Heat treatment is performed at 900° C. for 30 minutes or the like.

After the heat treatment, non-doped silicon is epitaxially grown again, and as shown in FIG.
” to form.

In this deposition process, a portion B consisting of the upper part of the deposited layer 6a' deposited earlier and the lower part of the deposited layer 63'' left later becomes an N layer by diffusion of the ion-implanted impurities. Of course, the previous lower portion A layer also expands further, and the previous deposited layer 6a' becomes the N layer.

Then, again, N-type impurities are supplied to the surface of the deposited layer 6a (
ion implantation) and forming a deposited layer (Fig. 1(e)).
, repeat the steps shown in (f). The uppermost deposited layer is usually implanted and diffused with impurities after it is formed.

This results in the state shown in FIG. 1(g). this,
By polishing the wafer 1 from the back side to a position where the groove 2 shown by the dashed line is exposed, an insulating layer separated substrate 10 is obtained as shown in FIG. 1(h).

The insulating layer separation substrate 10 includes a plurality of semiconductor single crystal regions 6 electrically isolated by an oxide film 4, which is an insulating layer, on a polysilicon layer 5, which is a support layer. In the crystal region 6..., there is a semiconductor tn crystal deposited from the bottom to the surface of the support layer with impurities diffused therein.
There will be some that have Ef6a.

For example, a vertical transistor is formed in this semiconductor single crystal region 6 with semiconductor single crystal deposited layer 6a. That is, as shown in FIG. 1(1), on the surface of the semiconductor single crystal region 6, there is a heath region (Pi) 15 and an emitter region (N layer) 16.
In addition to forming these electrodes 17 and 18, a collector electrode 19 is formed on the surface of the semiconductor single crystal deposit N6a. 20.21 is an insulating layer. The semiconductor single crystal deposited layer 6a naturally becomes a collector region.

Impurities are diffused into the semiconductor single crystal deposit N6a, but as can be seen from FIG. Compared to diffusing impurities,
Diffusion distance becomes shorter. Therefore, the diffusion time is short and non-uniformity of impurity concentration is improved. Since there is no wasteful diffusion in the lateral direction, the impurity concentration of the semiconductor single crystal deposited layer 6a is sufficiently high, the resistance of the deposited layer 6a is sufficiently low, and the on-resistance of the transistor is small. Since there is no long diffusion process, there is no problem that the impurities in the buried layer 1a are greatly re-diffused.

It is also conceivable to supply impurities while epitaxially growing a single crystal layer to form a N2 deposited layer, but in this case, lattice defects occur and it is difficult to provide sufficient performance to the formed element. In contrast, in the manufacturing method of the present invention, lattice defects do not occur and the formed element can have sufficient performance.

Further, as shown in FIG. 2, if there are a plurality of medium crystal regions 6 with deposited layers 6a and it is necessary to separate the deposited layers 6a from each other, Aβ or the like may be applied to a part 5a of the support layer 5. Supply it and change it to P area. It uses PN junction isolation.

However, if impurities are supplied during the epitaxial growth described above, N-type impurities are also supplied to the support layer.
The amount of Aβ etc. supplied increases. This is because it is necessary to cancel out the supplied N-type impurity.

However, in the manufacturing method of the present invention, the supply ffi of A1 etc.
This is because it is possible to eliminate the cancellation by not diffusing N-type impurities into the polysilicon layer. If the supply amount of Aβ etc. is small, the P The shallow depth of the mold layer reduces the thickness of the layer to be removed, reducing waste.

This invention is not limited to the above embodiments.

In the example, the deposited layer was formed in three stages.

It may be formed in a larger number of stages such as 4 stages or 5 stages. In short, it may be formed in two or more stages.

The impurity supplied to the semiconductor deposited layer may be P-type instead of N-type, so that the deposited layer becomes a P-type impurity region.

〔Effect of the invention〕

In this invention, impurities are supplied to the surface of the semiconductor layer that is being deposited, and then the deposition is continued. Therefore, the occurrence of lattice defects can be suppressed and the formed element can have sufficient performance. Moreover, even if the impurity diffusion portion in the semiconductor deposited layer is thick, a long-time diffusion process is not required, and unevenness in impurity concentration distribution and unnecessary lateral diffusion of impurities can be suppressed. Furthermore, when there is a buried layer, there is no problem of large re-diffusion of impurities.

[Brief explanation of drawings]

FIGS. 1(a) to 11 are schematic cross-sectional views sequentially showing the steps from obtaining an insulating layer separated substrate by an example of the manufacturing method of the present invention to completing a semiconductor device using the same substrate, and FIG. FIG. 3 is a schematic cross-sectional view of an insulating layer-separated substrate of another configuration obtained by the manufacturing method of the present invention (al to fd+ are schematic sectional views for explaining the conventional method of manufacturing an insulating layer-separated substrate; 1... Semiconductor single crystal wafer 2... Groove for isolation 4... Oxide film serving as an insulating layer 5... Support layer 6... Semiconductor single crystal region 6a... Impurity Diffused semiconductor deposited layer 7... Impurity 1 Old...
Insulating layer separation substrate agent Patent attorney Takehiko Matsumoto

Claims (1)

[Claims] A plurality of semiconductor single crystal regions electrically separated by an insulating layer are provided on one support layer, and among these semiconductor single crystals, there are semiconductor single crystal regions that reach the surface of the support layer from the bottom and have impurities diffused therein. In order to obtain an insulating layer separated substrate having a deposited layer, grooves for isolation are formed on the surface and the surface is covered with an oxide film which becomes the insulating layer except for the portion where the deposited layer is formed. In the manufacturing method in which the support layer and the semiconductor single crystal deposited layer are formed using a semiconductor single crystal wafer, the wafer is polished from the back side until the groove is exposed, during the deposition of the semiconductor single crystal deposited layer. A method for manufacturing an insulating layer-separated substrate in which impurities are supplied to the surface of the same layer, and then the deposition is continued.