JPH0310123B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <<Field of the Invention>> The present invention relates to a programmable controller, and more particularly to a programmable controller that can create a clock signal of arbitrary period and pulse width with a few user instructions.

《Prior art and its problems》 As is well known, many general programmable
The controller was equipped with a time calculation function, and it was possible to create a clock signal with any period and pulse width by making full use of timer instructions.

FIG. 7 shows an example of a user program for creating an arbitrary clock signal using a conventional programmable controller. This figure represents the user program in the form of a ladder diagram. In this example, the first timer instruction TIM0 sets the clock signal off period to 10 seconds, and the next timer instruction TIM0 sets the off period of the clock signal to 10 seconds.
1 sets the ON period of the clock signal to 3 seconds, and the program is configured to output the clock signal generated by this to the output terminal No. 10.

As described above, in the conventional programmable controller, in order to arbitrarily set the on-period and off-period of a clock signal and output it to the outside, it was necessary to combine at least six instructions including two timer instructions.

This puts a heavy burden on small programmable controllers with a small number of timers, and
Since the amount of programming for clock generation is complex and large, there are drawbacks such as wasted program steps in this part.

<<Object of the Invention>> An object of the present invention is to provide a programmable controller that can generate a clock signal of arbitrary period and pulse width with a simple and short user program.

<<Configuration and Effects of the Invention>> In order to achieve the above object, the present invention provides a setting value table for storing a plurality of pairs of numerical data defining on-time and off-time of a clock signal, and a setting value table for storing a plurality of pairs of numerical data defining on-time and off-time of a clock signal. an input means for writing arbitrary data into the table; a clock data memory having an area of 1 bit each corresponding to the data pair in the setting value table; A clock that performs time calculations according to the numerical data in the area specified by the relevant command in the value table, and inverts the bits specified by the relevant command in the clock data memory according to the ON and OFF times of the numerical data. It is characterized by comprising a command execution means.

A programmable controller with this configuration allows arbitrary periods and pulse widths (on and off times) to be controlled using simple clock instructions.
clock signal can be generated.

≪Explanation of Embodiments≫ Figure 1 shows a programmable computer to which this invention is applied.
FIG. 2 is a block diagram showing the overall schematic configuration of the controller.

This programmable controller uses CPU1 (Central Processing Unit), which is the center of overall control.
, a timer circuit 6 that counts the reference pulses from the pulse generation circuit 7 and provides an interrupt signal to the CPU 1 at a specific cycle, a memory 2 that stores a system program to be executed by the CPU 1; A working memory 3 that is used as a temporary storage area for various variable data, a user program memory 5 that stores sequence control programs arbitrarily set by the user, and an input interface that receives external input signals and sends out external output signals. an input/output device 9 including a sending interface for the input/output device 9; an input/output memory 4 serving as a buffer memory for input/output data corresponding to the input/output device 9;
Provides various operating commands to the CPU 1, provides input for creating user programs, provides setting input for numerical data of the clock signal described later, provides monitor command input, and displays and monitor displays during these inputs, etc. The program console 8 is provided with a program console 8.

Note that in a relatively small-scale programmable controller, the CPU 1, system program memory 2, working memory 3, input/output memory 4, timer circuit 6, pulse generation circuit 7, etc. are constituted by a so-called one-chip microcomputer.

As is well known, the execution operation of a user program in this type of programmable controller involves sequentially reading out user instructions from the user program memory 5, and changing the input/output data stored in the input/output memory 4 according to each user instruction. It performs logical operations and updates specified input/output data based on the results of the operation. It also inputs external input data to the input/output device 9 in synchronization with the execution of this user program. An operation is performed in which data is written in a predetermined area of the output memory 4 (input update) and output data in a predetermined area of the input/output memory 4 is transferred to the input/output device 5 and output to the outside (output update). This creates a sequence state defined by the user program in the relationship between the external input signal applied to the input/output device 9 and the external output signal output from the input/output device 9.

Furthermore, as is well known, the subject of arithmetic processing in this user program is not only the input/output data of the input/output device 9, but also data stored in the memory 3 or memory 4, which is called an internal relay or auxiliary relay. . It is also well known that the computer has a timer instruction execution function for time calculations and a signal counting function using a counter instruction.

The program console 8 includes a keyboard 8B including a numeric keypad, an instruction code key, and other function keys, and a display 7A for displaying instruction codes, addresses, error messages, etc. in characters. As is well known, input operations for writing arbitrary user commands into the user program memory 5 are performed by the program console 8. To process the clock instructions of this invention,
As shown in FIG.
A clock setting value table 5a is allocated to a part of the clock. This setting value table 5a is CLK0
It is divided into eight areas corresponding to eight clock numbers from CLK7 to CLK7. Furthermore, each area is divided into an on-time area and an off-time area. The operation of writing a pair of arbitrary on-time and off-time numerical data into an arbitrary area of the setting value table 5a is as follows:
This is done using the program console 8. The on time and off time are data corresponding to the desired pulse width and pulse base duration of the clock signal.

Further, for processing clock commands, a clock data area 3a is set in the working memory 3 as shown in FIG. Similarly to the setting value table 5a, the clock data area 3a is also divided into eight areas corresponding to clock numbers CLK0 to CLK7. The area of each clock number is
It consists of a start flag indicating the usage status of the clock of that number, an on/off flag indicating the logical state of the clock signal, and a counter area indicating the count value of the basic clock pulses from the timer circuit 6.

FIG. 4 is a flowchart showing an overview of the system program executed by the CPU 1.
This program is roughly divided into a main routine A and a timer interrupt processing routine B, which is executed in response to an interrupt signal from the timer circuit 6 using the basic clock while the main routine A is being executed.

First, timer interrupt processing B will be explained. When an interrupt signal is given from the timer circuit 6, the start flag in the clock data area 3a is read in step 400, and it is determined in step 401 whether the start flag is "1" or not.
If so, the value in the counter area of the corresponding clock number is incremented by one in step 402. This process is applied to all clock numbers CLK0.
~ Do this for CLK7.

Next, main routine A will be explained. In step 100, initial processing is performed when the power is turned on, and in step 101, the status of the mode key on the program console 8 is read, and if the mode is in the program execution mode, steps 102 to 10 are performed.
Proceed to the 8th side. In the case of the program creation mode, the program proceeds from step 102 to step 103, reads the input on the keyboard 8B, and in step 104 determines whether or not there is an input of the CLK setting key for setting the numerical data of the clock signal. If there is an input from the setting key, processing for setting numerical data of the clock signal is performed in step 106, and the process returns to step 101.

An example of the numerical data setting processing step 106 is shown in detail in the flowchart of FIG. In short, in step 106, the specified numerical data is written in the specified area of the setting value table 5a in response to the input from the program console 8, and the specified numerical data is written in the specified area of the setting value table 5a. This is a process for setting the start flag of the clock data area 3a to "1".

Note that if it is a key input other than the CLK setting key in step 104, the process proceeds to step 105 and processes accordingly (creates display data in accordance with the key input), and then displays it on the display 8B in the next step 107. Display the data.

In program execution mode, first step 1
The input is updated in step 08, the program counter PC is cleared in step 109, and the program counter PC is cleared in step 110.
reads the user instruction addressed by the program counter PC from the memory 5. If the user command is an END command inserted at the end of the user program, the process advances from step 111 to step 116 to update the output. After that, the input is updated in step 108, and the program counter is cleared in step 109, and then the user program is executed again.

If the instruction read out in step 111 is not an END instruction, the program proceeds to step 112 to determine whether the instruction is a clock instruction, and if it is a clock instruction, executes the clock instruction in step 114. In the next step 115, the program counter PC is incremented, and the program advances to step 110 for reading the user command, and reads the user command at the next address. If it is determined in step 112 that the instruction is other than a clock instruction, the process advances to step 113 and the instruction is executed. In the next step 115, the program counter PC is incremented and the user instruction at the next address is read.

The details of the clock instruction execution process in step 114 are shown in the flowchart of FIG.
First, in step 300, the start flag of the first clock number in the clock data area 3a is read.
When the start flag is "1", it indicates that the clock is usable. The process proceeds to step 302 and subsequent steps only when the start flag is "1". At step 302, the on/off flag of the corresponding number in the clock data area 3a is read. The on/off flag is a status flag indicating whether the clock is currently on or off. When the flag is "0", the clock is in an off period, and when the flag is "1", it is in an on period. In step 303, the state of the on/off flag is determined, and if the flag is "0", the process proceeds to step 304, and the flag is "1".
In each case, the process advances to step 309.

In steps 304 to 306, the setting value table 5a is
The set value of the off time of the clock data area 3a is compared with the count value of the clock data area 3a. If the count value exceeds the set off time, proceed to step 307;
The on/off flag is set to "1", the clock output of the corresponding number is set to "1" in step 308, and the clock data area 3 is set in step 315.
Clear the count value of a to zero. If it is detected in step 306 that the count value has not reached the set off time, the clock output of the corresponding number is set to "0" in step 316.

Similarly, if the on/off flag is "1", first, in step 309, the set on time is read in the setting value table 5a, in step 310, the count value in the clock data area 3a is read, and in step 311, the count value is If it is detected that the on time is greater than the set on time, the on/off time is turned off in step 312.
Set the off flag to "0", set the clock output to "0" in step 313, and proceed to the next step 315.
Clear the count value to zero with . If it is detected in step 311 that the count value has not reached the set on-time, the clock output is set to "1" in step 314.

The above processing shown in FIG. 6 is performed for all clock numbers CLK0 to CLK7.

As is clear from the above description, in the programmable controller of the present invention, one clock instruction can be incorporated into the user program by setting arbitrary on-time and off-time in the setting value table 5a. The desired clock signal can then be obtained.

[Brief explanation of the drawing]

Figure 1 shows a programmable system to which this invention is applied.
A block diagram showing the hardware configuration of the controller. Fig. 2 is a memory map of the user program memory in the above controller. Fig. 3 is a memory map of the working memory in the above controller. Figs. 4, 5, and 6 are the memory map of the working memory in the above controller. FIG. 7 is a flowchart showing the configuration of a system program executed by the CPU 1, and is a diagram showing an example of a user program for obtaining an arbitrary clock signal with a conventional programmable controller. 1... CPU, 3... Working memory, 3a... Clock data area, 4... Input/output memory, 5... User program memory, 5a... Setting value table, 8
...Program console, 9...I/O device.

Claims (1)

[Claims] 1. A setting value table for storing a plurality of pairs of numerical data defining on-time and off-time of a clock signal, input means for writing arbitrary data into this setting value table, and input means for writing arbitrary data into this setting value table; When the clock data memory has an area of 1 bit each corresponding to the data pair and the clock signal included in the user program is executed, time calculations are performed according to the numerical data of the area specified by the relevant command in the setting value table. 1. A programmable controller comprising clock command execution means for executing a clock command and inverting a bit specified by the command in the clock data memory according to an on time and an off time of the numerical data.