JPH03108792A - Printed wiring board - Google Patents
Printed wiring boardInfo
- Publication number
- JPH03108792A JPH03108792A JP1246655A JP24665589A JPH03108792A JP H03108792 A JPH03108792 A JP H03108792A JP 1246655 A JP1246655 A JP 1246655A JP 24665589 A JP24665589 A JP 24665589A JP H03108792 A JPH03108792 A JP H03108792A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- solder
- wiring board
- component
- solder paste
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3465—Application of solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
「産業上の利用分野]
この発明は、プリント配線板の改良に係り、特にスルホ
ールの両端開口を溶着半田で面一に埋めるようにしたも
のである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an improvement in a printed wiring board, and in particular to a method in which openings at both ends of a through hole are flushly filled with welded solder.
[従来の技術]
第3図の(A)(B)(C)(D)は従来のプリン1〜
配線板における電気回路の組立工程を示す垂直断面図で
あり、組立工程は図示の(A )(B )(C)(D
)の順に進められる。そしてこれらの図において(1)
はチップ部品の取付はランド、(2)はスルホール、(
3)は不用部分に半田が付着することを防止するために
塗布されたレジスト層、(4)はプリン1〜配線基板の
ベース材、(5)はチップ部品(6)を取付ける上記の
取付はランド(1)に塗布された半田ペースト、(7)
はチップ部品(6)の固定用の接着剤である。[Prior art] (A), (B), (C), and (D) in Fig. 3 are conventional puddings 1 to 3.
It is a vertical sectional view showing the assembly process of the electric circuit on the wiring board, and the assembly process is shown in (A), (B), (C), and (D).
). And in these figures (1)
(2) is a through hole, (2) is a land for mounting chip parts, (
3) is a resist layer applied to prevent solder from adhering to unnecessary parts, (4) is the base material of the print 1 to wiring board, and (5) is the mounting of the chip component (6). Solder paste applied to land (1), (7)
is an adhesive for fixing the chip component (6).
吹に上記の組立工程について説明する。先ずチップ部品
の組立工程前は第3図(A)の状態となっている。次に
取付はランF(1)に第4図のように構成された半田ペ
ースト塗布用マスク(8)を重合状態に使用し、これに
予め設けたランド露出用穴(8a)から直下の取付はラ
ンド(1)に半田ペースト(5)を第3図(B)で示す
ように塗布する。次に第3図(C)に示すように、接着
剤(7)を半田ペースh(5)(5)間のレジス1〜層
(3)lに塗布し、チップ部品(6)を半田ペースト(
5)(5)lに固定する。次にこの状態で全体を加熱し
半田ペース1〜(5)を融解し、部品面側の上記チップ
部品(6)のりフロー半田付けを行う。また反対側の半
田面側にチップ部品がある場合は、半田槽に」二足の半
田面側を浸漬するいわゆるフロー半田付けも行う。第3
図(D)はりフロー半田付けおよびフロー半田付けを行
った後の断面図であり、(9)(10)はそれぞれ溶着
半田を示す。The above assembly process will be briefly explained. First, before the chip component assembly process, the state is shown in FIG. 3(A). Next, for installation, use the solder paste application mask (8) configured as shown in Fig. 4 on run F (1) in a polymerized state, and attach it directly below through the land exposure hole (8a) prepared in advance. Apply solder paste (5) to the land (1) as shown in FIG. 3(B). Next, as shown in FIG. 3(C), adhesive (7) is applied to the resist 1 to layer (3) l between the solder pastes h (5) and (5), and the chip component (6) is attached to the solder paste. (
5) (5) Fix at l. Next, in this state, the whole is heated to melt the solder pastes 1 to (5), and the chip component (6) on the component side is glue flow soldered. If there is a chip component on the opposite solder side, so-called flow soldering is also performed in which the two solder sides are immersed in a solder bath. Third
Figure (D) is a sectional view after performing beam flow soldering and flow soldering, and (9) and (10) respectively show welded solder.
ところでスルホール(2)における溶着半田(10)は
フロー半田付は時に半田槽から吸い上げられることによ
り形成され、したがって半田面側では溶着半田がレジス
ト層(3)より図示のように盛り上がった状態となるが
、部品面側では、スルホール(2)内に吸い」二げられ
る半田の量が穴の径によって異なるので、部品面側では
上記のように溶着半田が必ずしも盛り」二がった状態に
形成されるとは限らない。By the way, the welded solder (10) in the through-hole (2) is sometimes formed by being sucked up from the solder tank during flow soldering, so that the welded solder rises above the resist layer (3) on the solder surface side as shown in the figure. However, on the component side, the amount of solder sucked into the through hole (2) varies depending on the diameter of the hole, so the welded solder does not always form a bulge on the component side as described above. There is no guarantee that it will be done.
[発明が解決しようとする課題]
従来のプリント配線板における電気回路の組立工程は以
」二のように行われているので、スルホール(2)では
とかく部品面側の開口端が溶着半田」で面一に埋まらな
い。また部品面側のみに電気部品を実装した場合、スル
ホール(2)は半田によって埋まることがないので、電
気部品の諸元および機能を検査するときに、」二足状態
のスルホールを使用すると、検査用のピンとスルホール
は部品面側では良好な接触を得ることができず、信頼性
が低く検査効率の悪い検査となるという問題点があった
。[Problems to be Solved by the Invention] The assembly process of electric circuits in conventional printed wiring boards is performed as shown in the following two steps. It doesn't fill up completely. In addition, when electrical components are mounted only on the component side, the through holes (2) are not filled with solder, so when inspecting the specifications and functions of electrical components, using the bipedal through holes makes it easier to inspect. There was a problem in that the pins and through-holes could not make good contact on the component side, resulting in low reliability and poor inspection efficiency.
この発明は上記の問題点を解消するためになされたもの
で、スルホールの部品面側および半田面側の双方の端部
開口を溶着半田で少なくとも面一に埋められるようにす
ることを目的とする。This invention was made to solve the above-mentioned problems, and its purpose is to enable the end openings of both the component side and the solder side of the through hole to be filled at least flush with welded solder. .
[課題を解決するための手段]
この発明の場合は、部品面側の半田ペースト塗布用マス
クに、チップ部品の取付はランドの露出用穴の他に、ス
ルホールを露出させる穴も別個に開設し、これを使用し
た半田ペースト塗布工程においてスルホールの部品面側
の開1」端にも!l′:OJペースI−を塗布させてい
る。[Means for Solving the Problems] In the case of the present invention, in addition to the hole for exposing the land for mounting the chip component, a hole for exposing the through hole is also separately provided in the mask for applying solder paste on the side of the component. In the solder paste application process using this, it can also be applied to the open 1" end of the through hole on the component side! l': OJ Pace I- is applied.
[作 用]
この発明の場合は、半田ペース1−がスルホールの部品
面側の端部開口にも塗布されるので、該部も溶着半田で
完全に埋められる。[Function] In the case of the present invention, since the solder paste 1- is also applied to the end opening of the through-hole on the component side, this part is also completely filled with welded solder.
[実施例]
以下この発明の一実施例について説明する。すなわち第
1゜図において第3図のものと同一個所は同一符号を付
してその重複説明は省略することにするが、この発明の
場合は特に第2図に示した半田ペースト塗布用マスクを
使用する点にこの発明の特徴を有するものである。[Example] An example of the present invention will be described below. That is, in FIG. 1, parts that are the same as those in FIG. This invention is characterized by its use.
すなわち第2図において(8a)は取付はランド露出用
の穴であり、また(8b)はスルホール(2)の部品面
側の開口端に半田ペース1〜を塗布するためのスルホー
ル露出用の穴を示し、そして第1図の(11)は第2図
の半田ペース1〜塗布用マスク(8)を使用して塗布さ
れたスルホールの部品面側の開口端における半田ペース
トである。That is, in FIG. 2, (8a) is a hole for exposing the mounting land, and (8b) is a hole for exposing the through hole for applying solder paste 1 to the open end of the through hole (2) on the component surface side. , and (11) in FIG. 1 is the solder paste at the open end of the through hole on the component surface side, which was applied using the solder paste 1 to the application mask (8) of FIG. 2.
次にこの発明のものにおける電気回路の組立工程の一実
施例について説明する。先ず第1−図(A、)の製造工
程前のプリント配線基板の取付はランド(1)およびス
ルホール(2)に、第2図の半田ペースト塗布用マスク
(8)を重合状態に使用し、取付はランド露出用の穴(
8a)およびスルホール露出用の穴(8b)から、それ
ぞれその直下の取付はランF(])およびスルホール(
2)に第1図(B)で示すように半田ペース1〜(5)
(1,1)を塗布する。Next, an embodiment of an electric circuit assembly process according to the present invention will be described. First, to attach the printed wiring board before the manufacturing process in Figure 1 (A), use the solder paste application mask (8) in Figure 2 in a polymerized state on the lands (1) and through holes (2). For installation, use the land exposure hole (
8a) and through-hole exposure hole (8b), the mounting directly below them is run F (]) and through-hole (8b).
2) As shown in Figure 1 (B), solder pastes 1 to (5)
Apply (1,1).
次に第1図(C)で示すように半田ペースト(5)(5
)間のレジス1−層(3)上に接着剤(7)を塗布し、
チップ部品(6)を半田ペース(5) (5)上に固定
する。Next, as shown in Figure 1(C), solder paste (5) (5)
) Apply adhesive (7) on the resist 1-layer (3) between
The chip component (6) is fixed onto the solder paste (5) (5).
次にリフロー半田付けを行う。然るときは取付はランド
(1)上の半田ペース1〜(5)およびスルホール(2
)上の半田ペース1−(Il、)は融解し、チップ部品
(6)は取(=Jけランド(1)に溶着半+1−1(9
)で半田付けされ、またスルホール(2)内には半0]
ペースト(11)が流れ込みこれによって埋められる。Next, perform reflow soldering. In such a case, install using solder pastes 1 to (5) on land (1) and through holes (2).
) on the solder paste 1-(Il,) is melted, and the chip component (6) is removed (= J kake half welded to the land (1) + 1-1 (9)
), and there is also a half 0 in the through hole (2)]
Paste (11) flows in and is filled in by this.
次に半FB面側のチップ部品も半田付けするために、フ
ロー半田付けを行う。この際スルホール(2)内には、
溶融半田がその頂面まで吸い」二げられ、これによりス
ルホール(2)の両端開口は盛り上がり状態の溶着半田
(12)で第1図(D)の状態に完全に埋められる。Next, flow soldering is performed to solder the chip components on the half FB side. At this time, inside the through hole (2),
The molten solder is sucked up to its top surface, and the openings at both ends of the through hole (2) are completely filled with the bulging welded solder (12) as shown in FIG. 1(D).
したがって組立後の電気部品の諸元および機能を検査す
るための、検査ピンとは常に良好な接触が得られ、効率
の良い検査ができ、また検査結果の信頼性も高いものと
なる。Therefore, good contact with test pins for testing the specifications and functions of electrical components after assembly is always obtained, efficient testing is possible, and test results are highly reliable.
[発明の効果コ
この発明のプリン1〜配線板は以」二のように構成され
、スルホールの両端開口は溶着半田によって少なくとも
面一になるように完全に埋められているので、プリン1
〜配線板の検査効率が良く、かつその信頼性も高くなる
という利点がある。[Effects of the Invention] Print 1 to the wiring board of this invention are constructed as shown below, and the openings at both ends of the through hole are completely filled with welded solder so that they are at least flush with each other.
~There are advantages in that wiring board inspection efficiency is high and reliability is also high.
第1図の(A)(B)(C)(D)はこの発明のプリン
1〜配線板の組立工程を示す断面図、第2図はこの発明
のものに使用される半田ベース1〜塗布用マスクの部分
拡大平面図、第3図の(A)(B)(C)(D)は従来
のプリン1〜配線板の組立工程を示す断面図、第4図は
これに使用される従来の半田ベース1〜塗布用マスクの
部分拡大平面図である。
なお図中(1)は取付はランド、(2)はスルホール、
(6)はチップ部品、(8)はマスク、(8a) (8
b)は穴、(5)(11)は半田」ペース1−1(9)
(1,2)は溶着半田である。その他図中同−符号は同
一部分を示すものとする。(A), (B), (C), and (D) in Fig. 1 are cross-sectional views showing the assembly process of the pudding 1 to wiring board of the present invention, and Fig. 2 is a solder base 1 to coating used in the product of the present invention. 3 (A), (B), (C), and (D) are cross-sectional views showing the assembly process of the conventional print 1 to wiring board, and FIG. 4 is the conventional mask used for this. FIG. 3 is a partially enlarged plan view of the solder base 1 to the coating mask of FIG. In the figure, (1) is a land mounting, (2) is a through hole,
(6) is a chip component, (8) is a mask, (8a) (8
b) is hole, (5) (11) is solder” Pace 1-1 (9)
(1, 2) is welded solder. In other figures, the same reference numerals indicate the same parts.
Claims (1)
取付けランドを露出させる穴の他に、スルホールを露出
させる別個の穴を開設させ、このマスクの重合使用によ
りチップ部品の取付けランドの他にスルホールにも半田
ペーストを塗布して、上記スルホールの両端開口を少な
くとも面一に溶着半田で埋めるようにしたことを特徴と
するプリント配線板。In addition to the hole that exposes the mounting land of the chip component, a separate hole is created in the mask for applying solder paste on the component side to expose the through hole. 1. A printed wiring board characterized in that a solder paste is applied to the through hole so that openings at both ends of the through hole are filled at least flush with welded solder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1246655A JPH03108792A (en) | 1989-09-22 | 1989-09-22 | Printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1246655A JPH03108792A (en) | 1989-09-22 | 1989-09-22 | Printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03108792A true JPH03108792A (en) | 1991-05-08 |
Family
ID=17151649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1246655A Pending JPH03108792A (en) | 1989-09-22 | 1989-09-22 | Printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03108792A (en) |
-
1989
- 1989-09-22 JP JP1246655A patent/JPH03108792A/en active Pending
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