JPH03110488A - Analyzing method for resin sealed integrated circuit - Google Patents

Abstract

PURPOSE:To make observation of the inside easy and to enhance reliability of analytic technique for trouble of an integrated circuit by exposing the whole face of chips of the integrated circuit sealed with resin while leaving the lead part residual. CONSTITUTION:The external derivative wires 3 are fixed to a base (ceramic package) 4 for fixing a sample with solder as shown in a figure. The sample prepared in such a way is immersed in an acidic resin solvent to remove resin. Thereby observation of the inside which is difficult heretofore can be surely and quickly performed even in an integrated circuit thin in thickness of sealed resin. Reliability of analytic technique for trouble of the integrated circuit is enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention provides a method for removing the sealing resin and exposing the sealed integrated circuit when inspecting the internal w4 of a 411 fat-sealed integrated circuit. This article relates to a method for analyzing sealed integrated circuits.

(Prior art) Conventionally, in order to expose only the l11rA target element sealed with resin, the thickness of the sealing resin in a predetermined portion is thinned using a drill or the like, and the resin is melted after being cut. I was going.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional method, in the current situation where the number of integrated circuits with thin resin coatings has increased, it is difficult to partially melt the resin and seal the Ji9[ There is a problem in that the resin also dissolves, and as a result, the internal structure is becoming more and more discrete.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for reliably unsealing a resin-sealed integrated circuit by avoiding such failures in internal observation of conventional resin-sealed integrated circuits.

(Means for Solving the Problems) In order to achieve the above object, the present invention fixes the external lead-out portion of the integrated circuit that is desired to be opened out of the periphery of the resin-sealed integrated circuit, and then acidifies the integrated circuit. This analysis method involves soaking the integrated circuit in a resin solvent and removing the resin from the integrated circuit.

(Function) By employing the method described above, the present invention makes it possible to partially unseal a sample with a thin sealing resin, which was a solid layer in the conventional method.

(Example) Fig. 1 is a perspective view of a sample to which the method of the present invention is applied, and Fig. 2 is a cross section of a sample in an embodiment of the present invention.
FIG. 3 shows a cross section of an unsealed sample in an example to which the present invention is applied.

In Figures 1 to 3, 1 is the sealing resin material of the sample, 2
3 is an internal element to be observed, 3 is an external lead-out line, 4 is a table for fixing a sample (for example, a ceramic package after use), 5 is a semiconductor element, and 6 is a resin removal position.

In FIG. 2, an external lead wire 3 is fixed by solder or the like to a table (ceramic package) 4 on which a sample is fixed. The fixed state is shown in the perspective view of FIG.

The sample thus prepared is immersed in an acidic resin solvent to remove the resin. This state is shown in the sectional view of FIG.

(Effects of the Invention) As is clear from the above embodiments, the present invention can reliably and quickly perform internal I/O processing even in integrated circuits with a thin sealing resin, which was difficult in the past. This will have an extremely large effect on improving the reliability of integrated circuit failure analysis technology.

[Brief explanation of drawings]

FIG. 1 is a perspective view of a sample to which the method of the present invention is applied;
FIG. 2 is a cross-sectional view of a sample fixed to a fixing table according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view of an unsealed sample to which the present invention is applied. 1... Sample sealing resin material, 2... Internal element, 3... External lead wire, 4... Stand for fixing the sample, 5... Semiconductor element, 6... Resin removal position .

Claims (1)

[Claims] A method for analyzing a resin-sealed integrated circuit characterized by exposing the entire surface of the resin-sealed integrated circuit chip while leaving the lead portion.