JPH03120672A - mark detection device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mark detection device for a data reading section of a magneto-optical recording device compatible with the ISO format.

[Prior Art] The 2-7 code of each sector in the SO format is numbered as shown in FIG. 5, and consists of a sector address and user data. and.

A sector mark is placed at the beginning of a sector, and a sector address (I
There is an address mark (AM) in front of D).

A sync mark (SYNC) is attached to the beginning of the user data. A resync mark (R8) is inserted every 20 bytes of user data.

AM detection is a signal that outputs a pulse at the end of an address mark (AM). 5YNC detection.

This is a signal that outputs a pulse at the end of the sync mark (SYNC). R8YNC detection is performed using the resync mark (R3
) is a signal that outputs a pulse at the end of AM is a signal for operating the address mark detection device, and becomes active at approximately the timing when an address mark is likely to be detected. 5YNC is a signal for operating the sync mark detection device, and becomes active at approximately the timing when a sync mark is likely to be detected. In No. 18, which operates the R3YNC beam sync mark detection device, it becomes active at approximately the timing when a resync mark is likely to be detected. IS
To read the 2-7 code recorded in O format, use the AM detection and 5YNC detection.

Three signals for R3YNC detection are required.

FIG. 6 is a system configuration diagram for obtaining the three signals of AM detection, 5YNC detection, and R3YNC detection. sector mark detector and detection controller.

It consists of a mark detection device. The sector mark detector detects a sector mark pattern in the 2-7 code and outputs a sector mark detection signal. The detection controller selects AM, 5YNC,
Activate R8YNC. The mark detection device has a 2-7 code.

By inputting the 2-7 clock, which is a pulse synchronized with the 2-7 code, AM detection, 5YNC detection, R8
Output YNC detection.

A conventional mark detection device has three circuits: a circuit for detecting an address mark pattern, a circuit for detecting a sync mark pattern, and a circuit for detecting a resync mark pattern.

[Problems and objectives to be solved by the invention] However, in the conventional technology, the circuit scale is large, so it is difficult to reduce the weight and integration of the device, and the number of parts is large, so there is a problem that the probability of failure is high. .

The present invention is intended to solve these problems, and its purpose is to reduce the circuit scale.

The object of the present invention is to provide a mark detection device that is lightweight and can be integrated.

[Means to solve the problem] The mark detection device of the present invention is shown in FIG.

Serial-to-parallel conversion means 1 and comparison means 2.

The pattern storage means 3 and i! It consists of another means 4.

The serial-parallel conversion means 1 has a 2-7 code and a 2-
When a 2-7 clock, which is a pulse synchronized with the 7 code, is input, the 2-7 code is converted into parallel code and a parallel code bit 5 is output.

The pattern storage means 3 stores the AM pattern and the 5Y pattern in advance.
When an NC pattern and an R8YNC pattern are stored, and a mark pattern to be detected is selected by signals AM, 5YNC, and R8YNC.

Output parallel data bit 6 corresponding to the selected mark pattern.

Comparing means 2 outputs a detection signal 7 when parallel code bit 5 and parallel data bit 6 match.

The identification means 4 identifies whether the detection signal 7 is an AM pattern, a 5YNC pattern, or an R8YNC pattern.

The mark detection device of the present invention is characterized in that a plurality of mark patterns can be detected by storing a plurality of mark patterns in a pattern storage means.

[Example] Below, the mark detection device of the present invention will be described based on an example. FIG. 2 is a diagram showing an embodiment of the present invention,
It consists of a 48-pit shift register 8, a comparator 9, AND gates 10, 11, 12, a ROM 13, and an encoder 14.

Shift register 8 converts serial data 2-7 code into 48-bit parallel data code bit 15.
Convert to

Encoder 14 is 3-signal AM, 5YNCJ R8YNC
is encoded into 2-bit signals of ADO and ADI. Third
The figure shows the selection of 3 signals AM, 5YNC, R3YNC, and AD
It is a diagram showing the correspondence between two pits of O and ADI. That is, when AM is selected.

(ADO, -ADI) = (0, O), when 5YNC is selected (ADO, ADl) = (1, O), R5YNC
When is selected, (ADO, ADI)=(0,1).

ROM13 has AM pattern and 5YNC pattern.

R8YNC patterns are stored in three areas, respectively. These three storage areas are selected by ADO and ADI. FIG. 4 is a diagram showing three areas of the ROM. An address mark pattern, a sync mark pattern, and a resync mark pattern are recorded in each of the three areas.

The ROM 13 outputs the mark pattern of the area selected by ADO and ADI as data bit 16, which is 48-bit parallel data.

Comparator 9 outputs signal 17 when code bit 15 and data bit 16 match.

AND gates 10, 11.12 have signals 17 AM, 5Y
Identify either NC or R8YNC.

Outputs AM detection, 5YNC detection, and R8YNC detection.

C Effects of the Invention] As described above, according to the present invention, by storing a plurality of mark patterns in the pattern storage means,
- There is an effect that a plurality of mark patterns can be detected with one mark detection device. Furthermore, if a rewritable memory is used as the pattern storage means, the mark pattern to be detected can be arbitrarily changed depending on the situation.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a mark detection device of the present invention. FIG. 2 is a diagram showing an embodiment of the mark detection device of the present invention. FIG. 3 shows an embodiment of the mark detection device of the present invention. 3
The figure which shows the encoding example of the signal (AM, 5YNC, R8YNC). FIG. 4 shows an embodiment of the mark detection device of the present invention. R
The figure which shows the storage area of OM. FIG. 5 is a diagram showing the contents of the 2-7 code of each sector in the ISO format. FIG. 6 is a system configuration diagram for detecting address marks, sync marks, and resync marks. 1 ・ 2 ・ 3 ・ ・ 4 ・ ・ 5 ・ 6 ・ ・ 7 ・ 8 ・ 9 ・ 10, 1 13 ・ 14 ・ 15 ・ 16 ・ 17 ・ ・ Serial-parallel conversion means.・Means of comparison.・Pattern storage means.・Identification means.・Parallel code bit.・Parallel data bit ・Detection signal.・Shift register.・Comparator 6 1.12...2 person Kaand gate・ROM.・Encoder.・Code bit.・Data bit. ·signal. Above DO ADI M YNC 5YNC

Claims (1)

[Claims] In the data reading section of a magneto-optical recording device compatible with the ISO format, a serial-to-parallel conversion means for converting a 2-7 code, which is serial data, into parallel data, and storing various mark patterns. a pattern storage means for comparing the parallel data with a pattern stored in the pattern storage means, and a comparison means for outputting a detection pulse when a predetermined pattern is detected, the detection pulse of the comparison means Address mark (AM)
, sync mark (SYNC), resync mark (RSY)
NC)
A mark detection device characterized in that a single comparison means detects a plurality of mark patterns.