JPH03123204A - Fm demodulator - Google Patents

Abstract

PURPOSE:To obtain a picture easy to see without producing inversion phenomenon in the case of a distorted input FM wave by correcting a difference of the phase of the input FM wave and outputting the result. CONSTITUTION:An FM signal from an A/D converter 1 is a signal Y shifted by 90 deg. by a phase shifter 3 and an output of the converter 1 is delayed by a delay time of the signal Y with a delay correction device 2. A computing element 4 applies operation to each output of the device 2 and the phase shifter 3. Thus, a phase detector 10 obtains a phase of the FM wave, the wave is delayed by one sampling period at the delay device 5 and a difference of the phase of the FM wave is outputted via a subtractor 6 and a discontinuous correction device 7. The input and output of the computing element 4 detected respectively by detectors 11, 12, and a control signal generator 13 generates a significant signal when they are dissident consecutively twice and an inverting correction device 15 corrects the output of the discontinuous correction device 7. Then the output of the correction device 15 is sent via a D/A converter 8.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to an FM demodulator configured to convert an analog FM signal into a digital signal and demodulate it.

[Prior Art] When the analog FM signal at time t is X (t) and the signal with the phase of this signal 90 degrees B phase is y (t), the signal F (t) demodulated from the signal X (t) is It is conventionally known that it is given by . FM here
If we express the phase of the wave and let it be φ(1), then the formula ■ is F(t)−φ (1)
It can be expressed as axis...■t.

FIG. 8 is a block circuit diagram showing the configuration of a conventional FM demodulator realized by hardware using the demodulation digital signal processing technique as described above.

In the figure, (1) is an A/D converter that converts an input analog FM signal into a digital signal with a sampling period T. (3) is a 90° phase shifter, which converts the FM signal digitized by the A/D converter (1) into a signal Y that is phased by 90°.

(2) is a delay corrector, and this delay corrector (2) is the above-mentioned 9
This is to delay the digital FM signal by the same amount as the delay time of the signal Y generated by the 0° phase shifter (3), and its output signal X and the output signal Y of the 90° phase shifter (3) are the same. It can be regarded as a time-quantized signal. (
4) is an arithmetic unit, and for the input signals X and Y, t a
A phase detector (1) detects the phase of the FM wave using this arithmetic unit (4) which performs the calculation of n −' (X/Y), the delay compensator (2), and the 90° phase shifter (3).
0).

(5) is a delay device which changes the output of the phase detector (10) to 1
Delay by sampling period T. (6) is a subtracter that subtracts the output of the delay unit (5) from the output of the arithmetic unit (4).

The configuration of the arithmetic unit (4) includes, for example, signals X and Y.
A configuration is adopted in which a ROM with a manual address of is used, and the value of the arc tangent for (X/Y) is held as the content of the ROM. In this way, for input signals X and Y, the output tan −
'(X/Y) can be obtained.

(7) is a discontinuity corrector which corrects the output by adding 2π to the output only when the output of the subtracter (6) becomes negative. (8) is a D/A converter which converts the output of the discontinuity corrector (7) into an analog signal.

Next, the operation of the above configuration will be explained.

The output of the arithmetic unit (4) in the phase detector (10) represents the 8-phase φ of the FM wave at -T at time t- as described above, but for the sake of simplicity, If this is φ(K) (hereinafter, this notation will be used for other than φ(K)), the output of the delay device (5) is φ(−1)
, and the output of the subtractor (6) is φ(K) −φ(to −
1), and let this be △φ(K).

The above equation 0 can be approximated as when the sampling period T is sufficiently small, and since T is constant, the output △φ(K) of the subtractor (6) is similar to the demodulated signal F(K), and its meaning is The output Δφ(K) of the subtracter (6) can be regarded as a demodulated signal.

However, the arc tangent is a periodic function, and
, Y, its period is 2π. Now, suppose that the table in the ROM constituting the arithmetic unit (4) has values from O to 2π, then the original t a n
-' As the output of (X/Y), the first is, for example, 1
．． 9π, the next is 2.1π, the output of the operator (4) is φ(−1) 1.9π first, and the next is φ(K)=0
．． 1π, and the output of the subtracter (6) becomes negative, causing a problem of discontinuity.

Therefore, in the discontinuity corrector (7), the subtracter (6
) only when the output becomes negative, 2π is added to the output to correct the output. By correcting the output in this manner, the above-mentioned discontinuity will not occur in the output of the discontinuity corrector (7). Hereinafter, the output of this discontinuity corrector (7) will be referred to as S o (K).

Then, by converting the output of the discontinuity corrector (7) into an analog signal by the D/A converter (8), the F
An output obtained by demodulating the M signal is obtained.

[Problem to be solved by the invention] Since the conventional FM demodulator is configured as described above,
The analog FM signal input to the A/D converter (1) is an FM signal with certain characteristics, including a reproduction RF equalizer, such as an FM signal in the reproduction luminance signal system of a home VTR.
If the result of passing through the M transmission system is an unbalanced FM wave in which the lower side wave is emphasized and the upper side wave is suppressed, the part that should rise from black to white may fall to black. This has also been confirmed through experiments.

If such FM waves are directly outputted as an image via the D/A converter (8), the image will look black and broken, resulting in an extremely ugly image.

This phenomenon occurs in conventional analog FM demodulation.
Although this phenomenon is called an "inversion phenomenon," hereinafter, it will also be referred to as an "inversion phenomenon" in digital demodulation.

This "reversal phenomenon" will be explained using diagrams. Assuming that the modulation signal is a sine wave as shown in Figure 9, this is F
The FM wave after M demodulation is as shown in FIG.

If the lower wave of the FM wave in FIG. 10 is emphasized and noise is added, the waveform may become such that the zero-crossing point disappears, as shown in FIG. 11.

When the distorted FM wave is input in this way, the phase detector (
The output φ(K) of lO) may not match the phase of the FM wave. That is, since the output φ(K) of the phase detector (10) originally represents the phase of the FM wave, sinφ(K)
Although it should be similar to the input FM wave, if a distorted FM wave as shown in Figure 11 is input,
There are cases where sinφ(ni) becomes as shown in FIG. In such a case, the demodulated signal output from the D/A converter (8) will become as shown in FIG. 13, causing an inversion phenomenon. This is directly caused by the fact that at the time when the phase φ(K) is determined, the waveform of sin φ(K) lacks a -period compared to the input FM wave.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide an FM demodulator that can prevent the inversion phenomenon and obtain an easy-to-see image.

[Means for Solving the Problems] The FM demodulator according to the present invention detects the phase of an input FM wave and obtains a difference value between the phases, while checking whether the detected phase correctly represents the phase of the input FM wave. Determine whether or not
If the difference value is not represented correctly, the difference value is corrected and then output.

[Operation] According to the present invention, when the phase of the human-powered FM wave is detected and the detected phase correctly represents the phase of the input FM wave, the phase difference value is output as a demodulated signal, and the detected phase is output as a demodulated signal. If the phase does not correctly represent the phase of the input FM wave, by correcting and outputting the above difference value,
Even when distorted FM waves are manually generated, an easy-to-see image can be obtained without causing an inversion phenomenon.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described based on the drawings.

FIG. 1 is a block circuit diagram showing the configuration of an FM demodulator according to an embodiment of the present invention.
8) and (lO) have the same structure as the conventional example shown in FIG. 8, so the corresponding parts are given the same reference numerals and their explanation will be omitted.

In FIG. 1, (11) is the first detector, which has sinφ(K) with respect to the output signal φ(K) of the phase detector (10).
) is detected. (12) is a second detector that detects an increase or decrease in the output signal X of the delay compensator (2).

(13) is a control signal generator, which is connected to the first detector (11).
) and the output of the second detector (12) do not match twice in a row, a significant signal "1" is output; otherwise, an unreasonable signal "0" is output. This control signal generator (13) and the first and second detectors (u), (
12) constitutes an inversion position detector (14) that detects a sampling point where an inversion phenomenon occurs.

(15) is an inversion corrector, and the control signal generator (13)
When the output signal of is significant "1", the first sample of two consecutive samples of the output of the discontinuity corrector (7) has π
, subtract π from the next sample, and also add the insignificant '
When the value is 0, no processing is performed.

Next, the operation of the above configuration will be explained.

The FM signal digitized by the A/D converter (1) is converted into a signal Y whose phase is 90° phased by the 909 phaser (3).
becomes. On the other hand, the output of the A/D cone parter (1) is input to the delay compensator (2) and is delayed by the same amount as the delay time of the signal Y generated by the 90'' capacitor (3). If the output X (to) of the delay compensator (2) at time 1 = -T is set to X (K) = Asinφ (K), then the output Y (K) of the phase shifter (3) is (K)
= A cosφ(K).

The arithmetic unit (4) calculates φ(K) for the output X of the delay compensator (2) and the output Y of the 90° phase shifter (3).
=tan-'(X(ni)/Y(ni)) is calculated and output. Here, the arc tangent is a periodic function,
Considering the signs of X(ni) and Y(K), the period is 2π. Therefore, φ(ni)−φo(K)n
od 2π ...■.

That is, the phase of the FM wave is determined by the phase detector (lO).

Then, the output of this phase detector (10) is sent to a delay device (5).
The subtracter (6) subtracts the output φ(K-1) of the delay device (5) from the output φ(N) of the phase detector (lO). te, Δ
Outputs φ(K) child φ(K)-φ(K-1).

Subsequently, the discontinuity corrector (7) outputs △ of the subtracter (6).
Only when φ (to) becomes negative, 2π is added to the output and output. The operations of these phase detector (1G), delay device (5), subtractor (6), and discontinuity corrector (7) are the same as in the conventional example, and the phase of the FM wave is detected from the discontinuity corrector (7). The difference So(to) is output.

By the way, if the above formula ■ always holds true, W(K
)wsinφ(in) and the output X(in) of the delay compensator (2)
wA sinφo (K) should have a similar shape, but as mentioned above, it seems that the lower side wave is emphasized and noise is added, such as in the FM wave of the reproduced brightness signal system of a home VTR. In this case, the above formula (■) does not hold, and for the distorted input F MIX (in) as shown in Fig. 11, sinφ (in) becomes a waveform with a - period missing as shown in Fig. 12. It may happen.

However, for example, if the FM wave is 5.4MHz to 7.0M
Hz, and when the sampling frequency is 14.3MHz, the number of sampling points included in one cycle of the FM wave is approximately two, and in the above case, φ(ni) that does not satisfy the formula ■ occurs twice. It will not be output continuously. This has also been confirmed through experiments.

That is, three consecutive sampling points φ(1), φ
Among (2) and φ(3), even if φ(2) does not satisfy the formula (2), it is considered that φ(1) and φ(3) satisfy the formula (2). At this time, the waveform of X (to) and sinφ
The following two types of relationship between the waveforms of (K) can be considered.

One of them is as shown in Figure 2 (a) and (b).
X (2) −X (1)≦O, X(3)−X(2)≧
0 sinφ(2) − sinφ(1) ≧0 sinφ(3) −5inφ(2)≦0 −−−−−
−■, and the other case is shown in Figure 3 (a), (b
), X (2) −X (1)≧0, X (3) −X
(2)≦0 sinφ(2)-sinφ(1)≦0 sinφ(3)-sinφ(2)≧0 −−−−−・
■This is the case.

In either case, sinφ(K) has a waveform with one cycle missing, so as in equations ■ and ■,
2) −X (1) and sinφ(2)−sinφ(
1) , X (3) −X (2) and sinφ(3)
The signs of −5inφ(2) do not match.

Therefore, first, in the first detector (11), sin
The increase/decrease in φ(K) is detected, and the detector 's2 (12
), the increase or decrease of X (K) is detected at the first detector (
When the output of 11) and the output of the second detector (12) do not match twice in a row, the control signal generator (13) generates a significant signal "1", and the inversion corrector (15) In,
Correct the output of the discontinuity corrector (7).

Next, the correction method will be described.

Since φ(1) and φ(3) satisfy the formula ■, φ
(1)=φo(1) nod 2π, φ(3)=φ
o(3) nod 2π. So, now φ(
1) = φ0(1), φ(3) = φo(3) mod 2π, but as shown in Figure 2 or 3, X(K )=A sinφo (K) is sinφ (K
), so it can be considered that φo(3)=φ(3)+2π. φ(2) and φ0(2) are respectively φ(1
) and φ(3) are values between φ0(1) and φ0(3). This is shown in FIG. Therefore, φ(2) and φ0
The difference in (2) is considered to be approximately π.

φo(2)=φ(2)+π ・・・・・・
■In other words, if we replace φ(2) with φ(2)+π, F
It is thought that this approaches the true phase of the M wave. On the other hand, this phase φ(2) is calculated by the subtractor (6) as △φ(2) =φ(2)−
It is used when calculating φ(1), Δφ(3)=φ(3)-φ(2).

△φ(2) and △φ(3) are input to the discontinuity corrector (7), and if their values are negative, 2π is added, and S
o (2), So (3), therefore, φ
The process of replacing (2) with φ(2)+π is the process of replacing two consecutive samples So(2) of the output of the discontinuity corrector (7).
), So (3) respectively, 5o(2)+π, 5
This can be executed by replacing it with o(3)-π. However, the two operations 5o(2)+π, 5o(3)-π
is modulo 2π.

From the above, the inversion corrector (15) operates as follows.

When the control signal generator (13) generates a significant signal "1" indicating that the value of the phase φ(2) is incorrect, the inversion corrector (15) outputs the discontinuity corrector (7). Two consecutive samples So (2) and So (3) are respectively expressed as (So (2) +rc) nod 2π,
(So (3)-π)nod 2π is replaced, and when the output of the control signal generator (13) is an unexpected signal "0", the above processing is not performed.

The output of the inversion corrector (15) is then input to the D/A converter (8) and becomes an analog signal.

Next, the operation and configuration example of the first detector (11) which receives the output signal φ(K) of the phase detector (10) as input and detects an increase or decrease in sinφ(K) will be described.

Figure 5 shows si for the values of φ(K-1) and φ(to).
It represents the positive or negative of the value of nφ(K)−sinφ(tl). According to the table in FIG. 5, sinφ(K)−sin
If you configure it so that it outputs "0" when φ(-1) is positive and "1" when it is negative, you do not have to calculate sinφ(to) for the input φ(to). It is also possible to detect an increase or decrease in sinφ.

FIG. 6 is a block diagram showing an example of the configuration of the first detector (11) for realizing the above detection method. In the same figure, (20) is a separator, and the phase detector ( lO)
The output φ is separated into the form φ=ψ+π×δ (0≦ψ×π), and δ is output as the first output and ψ is output as the second output. (21) and (23) are delay devices, one of which delays the first output δ of the separator (20) by one sampling period, and the other delay device (23) which separates the first output δ of the separator (20). The second output ψ of the device (20) is delayed by one sampling period.

(22) is an exclusive OR gate which manually uses the output of the delay device (21) and the first output δ of the separator (20), (24)
is the first comparator that compares the magnitude of the second output ψ of the separator (20) and the output of the delay device (23), (25) is the memory that holds the value of π, and (26) is the memory mentioned above. a subtracter that subtracts the output of the delay device (23) from the output π of (25);
7) is the second output ψ of the separator (20) and the subtractor (26)
This is a second comparator that compares the magnitude of the output.

(28) is an exclusive OR gate whose inputs are the output of the first comparator (24) and the output of the second comparator (27);
9) is an exclusive OR gate whose inputs are the first output δ of the separator (20) and the output of the exclusive OR gate (28), and (30) is the output of the exclusive OR gate (22). Accordingly, this is a switch that switches between the first output δ of the separator (20) and the output of the exclusive OR gate (29).

Next, the operation of the first detector (11) having the above configuration will be explained.

The signal φ output from the phase detector (10) is sent to the separator (
20), the signal is separated into the form φ=ψ+πXδ (0≦ψ×π), and a second output ψ and a first output δ are output.

For example, when the phase φ is n bits, the most significant bit is output as the first output δ, and the lower (n-1)
The bit is output as a second output ψ.

Then, the first output δ of the separator (20) is transmitted to the delay device (21
) is delayed by one sampling period T. Therefore, at time −T, the first output of the separator (20) is δ(K) and the output of the delayer (21) is δ(−1)
It is.

The first output δ of the separator (20) and the delay device (21)
The output δ(ni-1) is input to the exclusive OR gate (22), and when δ(K)kiδ(K-1), "1" is output, and δ(ni)=δ(K- 13, "0" is output.

That is, in FIG. 5, (φ(K-1) < π and φ(to) ≥ π) or (φ(K-1) ≥ π and φ(K)
π), “1” is obtained from the exclusive OR gate (22)
is output. The output of the exclusive OR gate (22) controls the operation of the switch (30).

The first output δ of the separator (2G) becomes the first input value of the switch (30), and the exclusive OR gate (
22) is "1", this first input value δ(K) is selected at the switch (30).

On the other hand, the second output ψ of the S divider (20) is output from the delay device (23
) is delayed by one sampling period T. Therefore, at time -T, the second output of the separator (20) is ψ(to) and the output of the delayer (23) is ψ(K-1)
It is.

The second output ψ(K) of the separator (20) and the delay device (23)
The output ψ(K-1) is input to the first comparator (24), and when ψ(ni)≧ψ(ni-1), it is "0",
(K-1), "1" is output. In addition, a delay device (
The output ψ(-1) of 23) is input to a subtracter (26), and π-ψ(K-1) is calculated.

Then, the output π−ψ(−1) of the subtracter (26) and the second output ψ(K) of the separator (20) are sent to a second comparator (27).
is input, and is “1” when ψ(K)≧π−ψ(−1)
, ψ(ni) and π-ψ(ni-1), "0" is output.

Subsequently, an exclusive OR gate (28) performs an exclusive OR of the output of the first comparator (24) and the output of the second comparator (27). Therefore, from FIG. 5, the exclusive OR gate (28) is
When sinφ(K)-sinφ(K-1) is positive, it outputs "0", and when it is negative, it outputs "rl", and when δ(K)
= δ(K-1) = 1, then sinφ(to)-s
"1" when inφ(-1) is positive, "O" when negative
Output.

The output of this exclusive OR gate (28) and the divider (20
) and the first output δ(to) of the exclusive OR gate (29
) by inputting δ(to)=δ(K-1) −
In both the case of 〇 and the case of δ(ni)=δ(ni-1)=1, s
When inφ(K)−sinφ(K−1) is positive, r□J
, rjJ is output when it is negative. The output of this exclusive OR gate (29) becomes the second input value of the switch (30), and when the output of the exclusive OR gate (22) is "0", the switch (30) becomes the second input value. Select and output values.

From the above, according to FIG. 5, sinφ(ni)−s
"O" when inφ(ni-1) is positive and "O" when inφ(ni-1) is negative.
1" is output.

FIG. 7 is a block circuit diagram showing an example of the configuration of the second detector (12), and in the same figure, (31) is a delay device that outputs the output X (K) of the delay compensator (2). Delayed by one sampling period T. (32) is a comparator, to which the output X (K) of the delay compensator (2) and the output X (-1) of the delay device (31) are input, and X (K) ≧
1) When (7), "0" is output, and when X(K)<X(-1), "1" is output.

[Effects of the Invention] As described above, according to the present invention, it is determined whether the phase of the FM wave detected by the phase detector correctly represents the phase of the input FM wave, and when it is determined that it is incorrect, By taking the phase difference and then correcting it, it is possible to perform highly accurate FM demodulation without causing an inversion phenomenon even when distorted FM waves are manually generated, and it is possible to obtain an easy-to-see image. can.

[Brief explanation of drawings]

FIG. 1 is a block circuit diagram showing the configuration of an FM demodulator according to an embodiment of the present invention, FIGS. 2 and 3 are waveform diagrams of FM waves that cause an inversion phenomenon, and FIG. 4 is an inversion correction of this embodiment. FIG. 5 is a diagram for explaining the detection method in the first detector of this embodiment, and FIG. 6 shows an example of the configuration of the first detector. 7 is a block circuit diagram showing an example of the configuration of the second detector of this embodiment; FIG. 8 is a block circuit diagram showing the configuration of a conventional FM demodulator; FIGS. 9 to 13 The figure is a diagram for explaining a process in which an inversion phenomenon occurs in a conventional FM demodulator. (1)... A/D converter, (2)... Delay compensator, (3)... 90° phase filter, (4)... Arithmetic unit,
(5)...Delay unit, (6)...Subtractor, (7)...
・Discontinuity corrector, (8)...D/A converter, (l
O)...phase detector, (11)...first detector,
(12)...Second detector, (13)...Control signal generator, (14)...Reversal position detector, (15)...
・Inversion corrector. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] (1) An A/D converter that converts an input analog FM signal into a digital signal, a phase detector that detects the phase of each sampling point of the digital FM signal, and a phase detector that detects the phase of each sampling point of the digital FM signal, and a phase detector that detects the phase of the detected signal. an inversion position detector that detects a sampling point; a delay device that delays the output signal of the phase detector by one sampling period; and a subtracter that subtracts the output signal of the delay device from the output signal of the phase detector; a discontinuity corrector for correcting a discontinuous point in the output signal of the subtracter; an inversion corrector for correcting the output signal of the discontinuity corrector in accordance with the output signal of the inversion position detector; An FM characterized by comprising a D/A converter that converts an output signal into an analog signal.
Demodulator.