JPH03132015A - Method of forming crystal - Google Patents

Method of forming crystal

Info

Publication number
JPH03132015A
JPH03132015A JP26911189A JP26911189A JPH03132015A JP H03132015 A JPH03132015 A JP H03132015A JP 26911189 A JP26911189 A JP 26911189A JP 26911189 A JP26911189 A JP 26911189A JP H03132015 A JPH03132015 A JP H03132015A
Authority
JP
Japan
Prior art keywords
crystal
nucleation
forming
iii
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26911189A
Other languages
Japanese (ja)
Inventor
Hiroyuki Tokunaga
博之 徳永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP26911189A priority Critical patent/JPH03132015A/en
Publication of JPH03132015A publication Critical patent/JPH03132015A/en
Pending legal-status Critical Current

Links

Landscapes

  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain a high quality III-V compound single crystal without using excessive V-group material by a method wherein creation of uncontrollable seeds on a non-seed-forming surface is suppressed. CONSTITUTION:A thin film 2 made of material whose crystal seed forming density is low (for instance non-single-crystalline SiO2) is deposited by a CVD method. Non-single-crystalline Al2O3 layers 4 which have a higher seed forming density than a non-seed-forming surface 3 are formed. The area of the layer 4 is not larger than 2mum square, i.e., the area in which only one seed can be formed. III-V compound crystal seeds 9 are created by an MOCVD method. In an initial stage, a reaction pressure is selected to be 0.1Torr and a V-group/ III-group mol ratio of raw gas is selected to be not less than 45 to avoid the defects caused by the lack of V-group atoms. In the growth stage of single crystals 10 after the crystal seeds 9 are made to grow, the reaction pressure is selected to be the atmospheric pressure and the V-group/III-group mol ratio is selected to be not less than 28 to avoid the waste consumption of the V-group raw material. The III-V compound crystals are made to grow horizontally onto the non-seed-forming surface 3 with the seeds as the centers of growth.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はnr −v族化合物結晶およびその形成法に関
し、特に堆積面材料の種類による堆積材料の核形成密度
の差を利用して作成したIII −V族化合物単結晶な
いし粒径が制御されたIII −V族化合物多結晶の形
成方法に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an Nr-V group compound crystal and a method for forming the same, and in particular, to a crystal of an Nr-V group compound and a method for forming the same. The present invention relates to a method for forming a III-V group compound single crystal or a III-V group compound polycrystal with controlled particle size.

本発明は、例えば半導体集積回路、光集積回路、光素子
等に使用される単結晶や多結晶等の結晶の形成に適用さ
れる。
The present invention is applied to the formation of crystals such as single crystals and polycrystals used for, for example, semiconductor integrated circuits, optical integrated circuits, optical devices, and the like.

[従来の技術] 従来、半導体電子素子や光素子等に用いられる単結晶薄
膜は、単結晶基板上にエピタキシャル成長させることで
形成されていた。例えば、Si単結晶基板(シリコンウ
ェハ)上には、Si、 Ge、 GaAs等を液相、気
相または固相からエピタキシャル成長することが知られ
ており、またGaAs単結晶基板上にはGaAs、 G
aAlAs等の単結晶がエピタキシャル成長することが
知られている。このようにして形成された半導体薄膜を
用いて、半導体素子および集積回路、半導体レーザーや
LED等の発光素子等が作製される。
[Prior Art] Conventionally, single-crystal thin films used in semiconductor electronic devices, optical devices, and the like have been formed by epitaxial growth on single-crystal substrates. For example, it is known that Si, Ge, GaAs, etc. are epitaxially grown on a Si single crystal substrate (silicon wafer) from a liquid phase, gas phase, or solid phase, and GaAs, Ge, etc. are grown on a GaAs single crystal substrate (silicon wafer).
It is known that single crystals such as aAlAs can be epitaxially grown. Using the semiconductor thin film thus formed, semiconductor elements, integrated circuits, light emitting elements such as semiconductor lasers and LEDs, etc. are manufactured.

また、最近、二次元電子ガスを用いた超高速トランジス
タや、量子井戸を利用した超格子素子等の研究開発が盛
んであるが、これらを可能にしたのは、例えば超高真空
を用いたMBE (分子線エピタキシー)やMOCVD
 (有機金属化学気相法)等の高精度エピタキシャル技
術である。
In addition, recently there has been much research and development into ultrahigh-speed transistors using two-dimensional electron gas and superlattice devices using quantum wells. (molecular beam epitaxy) and MOCVD
(organometallic chemical vapor phase method) and other high-precision epitaxial technologies.

このような単結晶基板上のエピタキシャル成長では、基
板の単結晶材料とエピタキシャル成長層との間に、格子
定数と熱膨張係数とを整合をとる必要がある。この整合
が不十分であると格子欠陥がエピタキシャル層に発達す
る。また基板を構成する元素がエピタキシャル層に拡散
することもある。
In such epitaxial growth on a single crystal substrate, it is necessary to match the lattice constant and thermal expansion coefficient between the single crystal material of the substrate and the epitaxial growth layer. If this alignment is insufficient, lattice defects will develop in the epitaxial layer. Additionally, elements constituting the substrate may diffuse into the epitaxial layer.

このように、エピタキシャル成長による従来の単結晶薄
膜の形成方法は、その基板材料に大きく依存することが
分る。Mathews等は、基板材料とエピタキシャル
成長層との組合せを調べている(EPITAXIAL 
GROWTH,Academic Press、 Ne
w York。
Thus, it can be seen that the conventional method of forming a single crystal thin film by epitaxial growth largely depends on the substrate material. Mathews et al. investigate combinations of substrate materials and epitaxially grown layers (EPITAXIAL
GROWTH, Academic Press, Ne
w York.

1975 ed、by JJ、Mathews)。1975 ed, by JJ, Mathews).

また、基板の大きさは、現在Stウェハで6インチ程度
であり、GaAs、サファイア基板の大型化は更に遅れ
ている。加えて、単結晶基板は製造コストが高いために
、チップ当りのコストが高くなる。
Furthermore, the size of the substrate is currently about 6 inches for St wafers, and the increase in the size of GaAs and sapphire substrates has been delayed even further. In addition, single crystal substrates are expensive to manufacture, resulting in a high cost per chip.

このように、従来の方法によって、良質な素子が作製可
能な単結晶贋を形成するには、基板材料の種類が極めて
狭い範囲に限定されるという問題点を有していた。
As described above, the conventional method has had the problem that the type of substrate material is limited to an extremely narrow range in order to form a single crystal counterfeit from which a high-quality device can be manufactured.

一方、半導体素子を基板の法線方向に積層形成し、高集
積化および多機能化を達成する三次元集積回路の研究開
発が近年盛んに行われており、また安価なガラス上に素
子をアレー状に配列する太陽電池や液晶画素のスイッチ
ングトランジスタ等の大面積半導体装置の研究開発も年
々盛んになりつつある。
On the other hand, research and development of three-dimensional integrated circuits, in which semiconductor elements are stacked in the normal direction of a substrate to achieve high integration and multi-functionality, has been actively conducted in recent years, and there has also been active research and development in three-dimensional integrated circuits, in which semiconductor elements are stacked in the normal direction of a substrate. Research and development of large-area semiconductor devices, such as solar cells arranged in a pattern and switching transistors for liquid crystal pixels, is becoming more active year by year.

これら両者に共通することは、半導体薄膜を非晶質絶縁
物上に形成し、そこにトランジスタ等の電子素子を形成
する技術を必要とすることである。その中でも特に、非
晶質絶縁物上に高品質の単結晶半導体を形成する技術が
望まれている。
What these two methods have in common is that they require a technique for forming a semiconductor thin film on an amorphous insulator and forming electronic elements such as transistors thereon. Among these, a technique for forming a high quality single crystal semiconductor on an amorphous insulator is particularly desired.

−膜内に、5ins等の非晶質絶縁物基板上に薄膜を堆
積させると、基板材料の長距離秩序の欠如によって、堆
積膜の結晶構造は非晶質または多結晶となる。ここで非
晶質膜とは、最近接原子程度の近距離秩序は保存されて
いるが、それ以上の長距離秩序はない状態のものであり
、多結晶膜とは、特定の結晶方位を持たない単結晶粒が
粒界で隔離されて集合したものである。
- When depositing a thin film on an amorphous insulator substrate, such as 5ins, the crystal structure of the deposited film becomes amorphous or polycrystalline due to the lack of long-range order in the substrate material. Here, an amorphous film is one in which short-range order at the level of the nearest neighbor atoms is preserved, but no longer-range order, and a polycrystalline film is one that has a specific crystal orientation. It is a collection of single crystal grains separated by grain boundaries.

例えば、SiO□上にSiをCVD法によって形成する
場合、堆積温度が約600℃以下であれば非晶質シリコ
ンとなり、それ以上の温度であれば粒径が数百〜数千人
の間で分布した多結晶シリコンとなる。ただし、多結晶
シリコンの粒径およびその分布は形成方法によって大き
く変化する。
For example, when forming Si on SiO□ by the CVD method, if the deposition temperature is about 600°C or less, it will become amorphous silicon, and if the temperature is higher than that, the grain size will be in the range of several hundred to several thousand. This results in distributed polycrystalline silicon. However, the grain size and distribution of polycrystalline silicon vary greatly depending on the formation method.

更に、非晶質または多結晶膜をレーザや棒状ヒータ等の
エネルギビームによって溶融固化させることによって、
ミクロンあるいはミリメートル程度の大粒径の多結晶薄
膜が得られている(Singlecrystal 5i
licon on non−single−cryst
alinsulators、JouIIIal of 
Crystal Growth vol。
Furthermore, by melting and solidifying the amorphous or polycrystalline film using an energy beam such as a laser or a rod-shaped heater,
Polycrystalline thin films with large grain sizes on the order of microns or millimeters have been obtained (Singlecrystal 5i).
licon on non-single-cryst
alinsulators, JouIIIal of
Crystal Growth vol.

63、  No、3. 0ctober  1983 
 edited  by  G、  W。
63, No, 3. 0ctober 1983
Edited by G, W.

Cu1len)。Cullen).

このようにして形成された各結晶構造の薄膜にトランジ
スタを形成し、その特性から電子易動度を測定すると、
非晶質シリコンでは〜0.1 cm” /■・sec 
、数百人の粒径を有する多結晶シリコンでは1 ”−1
0cm”/V’sec 、溶融固化による大粒径の多結
晶シリコンでは単結晶シリコンの場合と同程度の易動度
が得られている。
When a transistor is formed in the thin film of each crystal structure formed in this way and the electron mobility is measured from its characteristics,
~0.1 cm”/■・sec for amorphous silicon
, for polycrystalline silicon with a grain size of several hundred 1”−1
0 cm''/V'sec, polycrystalline silicon with a large grain size obtained by melting and solidification has a mobility comparable to that of single crystal silicon.

この結果から、結晶粒内の単結晶領域に形成された素子
と、粒界にまたがって形成された素子とは、その電気的
特性に大きな差異のあることが分る。すなわち、従来法
で得られていた非晶質上の堆積膜は非晶質または粒径分
布をもった多結晶構造となり、そこに作製された素子は
、単結晶層に作製された素子に比べて、その性能が太き
(劣るものとなる。そのために、用途としては簡単なス
イッチング素子、太陽電池、光電変換素子等に限られる
This result shows that there is a large difference in electrical characteristics between an element formed in a single crystal region within a crystal grain and an element formed across a grain boundary. In other words, the deposited film on an amorphous layer obtained by the conventional method has an amorphous or polycrystalline structure with a grain size distribution, and the devices fabricated there have a higher level of performance than those fabricated on a single crystal layer. Therefore, its performance is poor (inferior).Therefore, its applications are limited to simple switching elements, solar cells, photoelectric conversion elements, etc.

また、溶融固化によって大粒径の多結晶薄膜を形成する
方法は、ウェハごとに非晶質または単結晶薄膜をエネル
ギビームで走査するために、大粒径化に多大な時間を要
し、量産性に乏しく、また大面積化に向かないという問
題点を有していた。
In addition, the method of forming polycrystalline thin films with large grain sizes by melting and solidifying requires a large amount of time to increase the grain size because the amorphous or single crystal thin film is scanned with an energy beam on each wafer. It has the problem that it has poor performance and is not suitable for large-area applications.

一方、III −V族化合物半導体は、超高速デバイス
、光素子などの、Siでは実現できない新しいデバイス
を実現し得る材料として期待されているが、III −
V族化合物結晶は、これまでSL単単結晶島るいはII
I −V族化合物単結晶上にしか成長させることができ
ず、デバイス作製上の大きな障害となっていた。
On the other hand, III-V compound semiconductors are expected to be materials that can realize new devices that cannot be realized with Si, such as ultra-high-speed devices and optical devices.
Group V compound crystals have so far been SL single crystal islands or II
It can only be grown on single crystals of I-V compounds, which has been a major obstacle in device fabrication.

上記従来の問題点を解決するものとして、本発明者は核
形成密度の小さい非核形成面に該非核形成面材料より核
形成密度が十分に大きく、かつ単一の核だけが成長する
程度に十分微細な核形成面が設けられ、該核形成面に成
長した単一の核を中心として成長を続けさせることによ
って結晶を形成する形成方法を提案し、非単結晶基体上
にもIll −V族化合物単結晶形成が可能なことを示
した。
In order to solve the above-mentioned conventional problems, the present inventor has proposed that the nucleation density is sufficiently higher than that of the non-nucleation surface material on a non-nucleation surface with a low nucleation density, and is sufficient to the extent that only a single nucleus grows. We proposed a formation method in which a fine nucleation surface is provided and a crystal is formed by continuing growth centered on a single nucleus grown on the nucleation surface. It was shown that single crystal formation of the compound is possible.

この形成方法は、結晶成長して単結晶となる核を所望の
距離まで人工的に離別させて、選択的に形成させ、必要
な大きさの結晶領域に成長させるまで結晶粒の接触・衝
突を回避するものである。
This formation method involves artificially separating the nuclei that will grow into a single crystal to a desired distance, allowing them to form selectively, and then contacting and colliding the crystal grains until they grow into a crystal region of the required size. It is something to avoid.

結晶成長の方法としては、成長速度が速く量産性に優れ
、結晶性が良好な有機金属化学輸送法(MOCVD法)
が主に用いられる。
As a crystal growth method, the metal organic chemical transport method (MOCVD method) has a fast growth rate, excellent mass productivity, and good crystallinity.
is mainly used.

[発明が解決しようとしている課題] しかしながら、上記の発明はMOCVD法で微細な核形
成面上にのみ核発生を起させるのに有利な低圧雰囲気で
は、■族元素の欠乏に起因する結晶の欠陥の発生を抑え
るために■族原料に対して非常に多(の■族原料を供給
しなければならず、V族原料の供給量が膨大になってし
まうという課題が生ずることがあった。また核形成初期
の段階で反応雰囲気の圧力を高くすると、微細な核形成
面以外の非核形成面上に制御されない別の核が発生して
しまうという課題が生ずることがあった。
[Problems to be Solved by the Invention] However, the above-mentioned invention does not solve the problem of crystal defects caused by the deficiency of group Ⅰ elements in a low-pressure atmosphere that is advantageous for generating nuclei only on fine nucleation surfaces in the MOCVD method. In order to suppress the occurrence of group V raw materials, it was necessary to supply a very large amount of group V raw materials compared to group III raw materials, which sometimes caused the problem that the amount of group V raw materials supplied was enormous. If the pressure of the reaction atmosphere is increased in the initial stage of nucleation, a problem may arise in that uncontrolled nuclei are generated on non-nucleation surfaces other than the fine nucleation surfaces.

従って、本発明の目的は、非核形成面上の制御されない
核の発生を抑え、しかもV族原料の利用率をさらに高め
■−V族化合物単結晶を成長する方法を提供することに
ある。
Therefore, an object of the present invention is to provide a method for growing single crystals of group V compounds by suppressing the uncontrolled generation of nuclei on non-nucleation surfaces and further increasing the utilization rate of group V raw materials.

[課題を解決するための手段] 上記問題点を解決するものとして、有機金属化学輸送法
によるm−v族化合物の結晶の形成方法において、核形
成密度の小さい非核形成面と、該非核形成面の核形成密
度より大きい核形成密度を有し、結晶成長して単結晶に
なる核が唯一形成され得るに十分小さい面積を有する核
形成面とが隣接して配された自由表面を有する基体に、
核形成初期段階では反応圧力を低く原料ガス中の周期律
表第■族原子と第1II族原子との比率V / III
を高くし、かつ結晶成長段階では反応圧力を核形成初期
段階より高く比率V / IIIを核形成初期段階より
低くする結晶成長処理を施すことを特徴とする結晶の形
成方法が提供される。
[Means for Solving the Problems] In order to solve the above problems, in a method for forming a crystal of an m-v group compound by an organometallic chemical transport method, a non-nucleation surface with a low nucleation density and a non-nucleation surface are provided. A substrate having a free surface adjacent to a nucleation surface having a nucleation density greater than the nucleation density of ,
At the initial stage of nucleation, the reaction pressure is low and the ratio of Group II atoms to Group I II atoms of the periodic table in the raw material gas is reduced to V/III.
A method for forming a crystal is provided, which is characterized in that a crystal growth process is performed in which the reaction pressure is higher in the crystal growth stage than in the initial stage of nucleation and the ratio V/III is lower than in the initial stage of nucleation.

本発明の結晶の形成方法は、非核形成面、核形成面、結
晶表面のそれぞれの面における結晶材料の原子の付着係
数X、Y、Zがz>y>xなる関係があることから、非
核形成面に設けられた核形成面に単一の核が形成される
核形成初期段階においては、核形成の選択性を高くする
ために、反応圧力を低く設定し■族とIII族原料の比
率V / +nを高くする。そして、核形成面上への核
形成が完了し、非核形成面上への横方向成長が始まった
段階(結晶成長段階)になったら、反応圧力を上昇させ
V / IIIを下げて結晶成長をさせるものである。
The crystal formation method of the present invention is based on the fact that the adhesion coefficients X, Y, and Z of atoms of the crystal material on each of the non-nucleation surface, the nucleation surface, and the crystal surface have a relationship such that z>y>x. In the initial stage of nucleation, in which a single nucleus is formed on the nucleation surface provided on the nucleation surface, the reaction pressure is set low to increase the selectivity of nucleation, and the ratio of Group I and Group III raw materials is adjusted. Increase V/+n. Then, when nucleation on the nucleation surface is completed and lateral growth on the non-nucleation surface begins (crystal growth stage), the reaction pressure is increased and V/III is lowered to stop crystal growth. It is something that makes you

次に、核形成面上での結晶の核発生と反応圧力の関係に
ついて説明する。
Next, the relationship between crystal nucleation on the nucleation surface and reaction pressure will be explained.

第4図に、各種の膜上におけるGaAs結晶核の発生密
度と圧力の関係を示す。
FIG. 4 shows the relationship between the density of GaAs crystal nuclei generated on various films and the pressure.

成長条件ニ トリメチルガリウム(TMG) ターシャルブチルアルシン(TBAs)V族とIII族
原料の比率[モル比]  (V / III )5 基板温度   670℃ 成長時間   5分 第4図から明らかなように、非核形成面上の微細な核形
成面材斜上(例えばAlaOs、 Tazos)にGa
Asの結晶核を発生させ、非核形成面上(例えば5to
2.5iJL )に核を発生させないという選択性を高
くするには反応圧力を低くすればよいことがわかる。
Growth conditions Nitrimethylgallium (TMG) Tertiary butylarsine (TBAs) Ratio of group V and group III raw materials [molar ratio] (V/III) 5 Substrate temperature 670°C Growth time 5 minutes As is clear from Figure 4, Ga
Generate As crystal nuclei and place them on the non-nucleation surface (for example, 5to
It can be seen that in order to increase the selectivity of not generating nuclei at 2.5iJL), the reaction pressure can be lowered.

反応圧力とGaAs膜の電気的性質の関係について説明
する。
The relationship between the reaction pressure and the electrical properties of the GaAs film will be explained.

第5図に反応圧力とホール(Hall)移動度の関係を
示す。成長条件: TMG TBAs V/III    15 基板温度  670℃ 第5図から明らかなように、反応圧力が低下すると電子
の移動度が下がり、10torr弱付近でn型からp型
伝導への反転が起っている。これは反応ガス中のAsの
絶対圧が低くなるのに伴い、成長するGaAs結晶中の
As欠乏による欠陥が発生するためと考えられている。
FIG. 5 shows the relationship between reaction pressure and Hall mobility. Growth conditions: TMG TBAs V/III 15 Substrate temperature 670°C As is clear from Figure 5, as the reaction pressure decreases, the electron mobility decreases, and a reversal from n-type to p-type conduction occurs at around 10 torr. ing. This is thought to be because defects occur due to As deficiency in the growing GaAs crystal as the absolute pressure of As in the reaction gas decreases.

この反転を防ぐためには、Gaに対するAsの供給量を
さらに増加させることが望ましい。
In order to prevent this reversal, it is desirable to further increase the amount of As supplied relative to Ga.

次に、本発明の実施態様を図面により説明する。Next, embodiments of the present invention will be described with reference to the drawings.

第1図(A)〜(E)は本発明の方法により選択的核形
成を行ないIU−V族化合物の単結晶を成長させる概略
工程図である。
FIGS. 1(A) to 1(E) are schematic process diagrams for growing a single crystal of an IU-V compound by performing selective nucleation according to the method of the present invention.

(A)二下地材料l (たとえばAl2O,、AIN、
 BNなどのセラミック、石英、高融点ガラスやW、M
(A) Two base materials (e.g. Al2O, AIN,
Ceramics such as BN, quartz, high melting point glasses, W, M
.

などの高融点金属)上に結晶核形成密度の低い材料から
なる薄膜2(例えば非晶質、多結晶質等の非単結晶質の
SiO□、 5ixN4など)を堆積し非核形成面3と
する。この薄膜の形成にはCVD法、スパッター法、蒸
着法、分散媒を使った塗布法などの方法を用いる。また
、第1図(F)のように下地材料lを用いず前記核形成
密度の低い材料からなる支持体5を用いてもよい((第
1図(A))(B):非核形成面より核形成密度の高い
材料(非単結晶質のAIJi、 AIN、 Taxes
、 Ti0z  WOzなど)を結晶成長して単結晶と
なる核を唯一形成され得るに十分な程小さい面積(好ま
しくはlOμm四方以下、最適には2μm四方以下)を
形成し核形成面4とする。また、このように薄膜を微細
にパターニングする他、第1図(G)のように下地に核
形成密度の高い材料からなる薄膜6を堆積し、その上に
核形成密度の低い材料からなる薄膜2を積み重ね非核形
成面3とし、エツチングにより微細な窓を開けて核形成
面4を露出させてもよく、第1図(H)のように核形成
密度の低い材料からなる薄膜2に凹部を形成し、その凹
部の底面に微細な窓を開けて核形成面4を露出させても
よい(この場合前記凹部内に結晶を形成させる)。
A thin film 2 made of a material with a low crystal nucleation density (for example, amorphous, polycrystalline, non-single crystal SiO□, 5ixN4, etc.) is deposited on top of a high melting point metal (such as a high melting point metal such as metal) to form a non-nucleation surface 3. . A method such as a CVD method, a sputtering method, a vapor deposition method, or a coating method using a dispersion medium is used to form this thin film. Further, as shown in FIG. 1(F), the support 5 made of the material with low nucleation density may be used without using the base material 1 (((A) in FIG. 1)(B): Non-nucleation surface Materials with higher nucleation density (non-single crystalline AIJi, AIN, Taxes
, Ti0z, WOz, etc.) to form a sufficiently small area (preferably 10 μm square or less, optimally 2 μm square or less) to form a single nucleus to form a single crystal, and use it as the nucleation surface 4. In addition to finely patterning the thin film in this way, as shown in FIG. 2 may be stacked to form a non-nucleation surface 3, and a fine window may be opened by etching to expose the nucleation surface 4. As shown in FIG. The nucleation surface 4 may be exposed by opening a fine window at the bottom of the recess (in this case, crystals are formed within the recess).

さらに、第1図(I)〜(J)のように微細な領域を残
し他をレジスト7でカバーし、イオン(As 、P、 
Ga 、AI 、IIIなど)を核形成密度の低い材料
からなる薄膜2に打込んで、核形成密度の高いイオン打
込領域8を形成してもよい。(第1図(B)) (C):こうして得られた基板上に、MOCVD法によ
ってIII −V族化合物結晶核9を発生させる。
Furthermore, as shown in FIGS. 1(I) to (J), leaving a fine area and covering the rest with resist 7, ions (As, P,
Ga, AI, III, etc.) may be implanted into the thin film 2 made of a material with a low nucleation density to form the ion implantation region 8 with a high nucleation density. (FIG. 1(B)) (C): Group III-V compound crystal nuclei 9 are generated on the substrate thus obtained by MOCVD.

この核形成初期段階(発生した核の底面積が核形成面よ
りも小さい間)では、反応圧力は低圧(好ましくは30
torr未満、より好ましくは10torr以下、最適
には5 torr以下)に保ち、非核形成面上への制御
されない核の発生を抑える。このとき反応圧力の下限と
しては好ましくば10−’torr、より好ましくは1
0−”torr、最適には0.1torrが望ましい。
At this initial stage of nucleation (while the base area of the generated nuclei is smaller than the nucleation surface), the reaction pressure is low (preferably 30
torr, more preferably below 10 torr, optimally below 5 torr) to prevent uncontrolled nucleation on non-nucleating surfaces. At this time, the lower limit of the reaction pressure is preferably 10-'torr, more preferably 1
0-'' torr, optimally 0.1 torr is desirable.

またV / IIIの値は高くして(V族原料が液体有
機原料の場合、好ましくは10以上、より好ましくは2
0以上、最適には25以上;ガス原料の場合、好ましく
は30以上、より好ましくは35以上、最適には45以
上)V族原子の欠乏による欠陥の発生を抑える。(第1
図(C)) (D):III−V族化合物結晶核9が成長したIII
 −V族化合物単結晶10が核形成面4の面積より広が
って成長する段階(結晶成長段階)になったら、反応圧
力は前記核形成初期段階の反応圧力よりも高くする(好
ましくは30torr以上、より好ましくは40tor
r以上、最適には50torr以上である。このとき、
安全性確保のためには反応圧力の上限は大気圧とするの
が好ましい。)。同時に、V / Illの値は前記核
形成初期段階のV/IIIの値よりも低く (V族が液
体有機原料の場合、好ましくは5以上、より好ましくは
7以上、最適には12以上。ガス原料の場合、好ましく
は20以上、より好ましくは25以上、最適には28以
上。)設定を変更しV族原料を効率よく利用し、無駄に
消費することを避ける。(第1図(D)) (E):核を中心に■−V族化合物結晶の成長を進め、
非核形成面上へ横方向に結晶を成長させてい(。
In addition, the value of V/III should be high (if the V group raw material is a liquid organic raw material, preferably 10 or more, more preferably 2
0 or more, optimally 25 or more; in the case of gas raw materials, preferably 30 or more, more preferably 35 or more, optimally 45 or more) to suppress the occurrence of defects due to the deficiency of group V atoms. (1st
Figure (C)) (D): III-V compound crystal nucleus 9 has grown
- When the group V compound single crystal 10 grows to expand beyond the area of the nucleation surface 4 (crystal growth stage), the reaction pressure is set higher than the reaction pressure at the initial stage of nucleation (preferably 30 torr or more, More preferably 40tor
r or more, optimally 50 torr or more. At this time,
In order to ensure safety, the upper limit of the reaction pressure is preferably atmospheric pressure. ). At the same time, the value of V/Ill is lower than the value of V/III at the initial stage of nucleation (if group V is a liquid organic raw material, preferably 5 or more, more preferably 7 or more, optimally 12 or more; gas In the case of raw materials, the number is preferably 20 or more, more preferably 25 or more, and optimally 28 or more.) Change the settings to efficiently utilize group V raw materials and avoid wasteful consumption. (Figure 1 (D)) (E): Proceeding the growth of ■-V group compound crystals centering on the nucleus,
Crystals are grown laterally onto non-nucleated surfaces (.

前述のしたように、結晶表面、核形成面、非核形成面の
それぞれの面における結晶材料の原子の付着係数をそれ
ぞれX、Y、Zとおくと次のような関係となる。
As described above, when the adhesion coefficients of atoms of the crystal material on each of the crystal surface, nucleation surface, and non-nucleation surface are respectively denoted as X, Y, and Z, the following relationships are obtained.

X>Y>Z 核形成初期段階においては、結晶材料の原子に対する表
出面は、非核形成面及び核形成面だけである。そのため
、核は選択的に核形成面上で形成される。続いて、核が
成長し核形成面を覆いつ(してしまうと、そこには結晶
表面と非核形成面のみが存在するようになるので核発生
の選択性はさらに高くなる。さらに結晶が成長しその表
面積が大きくなるに従い、さらに選択性は高くなるので
、非核形成面上の制御されない核発生はほとんど起らな
くなる。つまり、選択性を維持する条件は、結晶の成長
につれて徐々に変化する。
X>Y>Z At the initial stage of nucleation, the only exposed surfaces for the atoms of the crystalline material are the non-nucleation surface and the nucleation surface. Therefore, nuclei are selectively formed on the nucleation surface. Next, the nucleus grows and covers the nucleation surface (then only the crystal surface and non-nucleation surface exist, so the selectivity of nucleation becomes even higher.The crystal grows further). As the surface area increases, the selectivity becomes even higher, so that uncontrolled nucleation on non-nucleating surfaces becomes less likely, meaning that the conditions that maintain selectivity change gradually as the crystal grows.

従って、選択性を制御する製造条件である、反応圧力と
V/IIIも連続的に変化させることも好ましい。
Therefore, it is also preferable to continuously change the reaction pressure and V/III, which are the production conditions that control selectivity.

また最適の堆積条件は、非核形成面上への核形成面の配
置の形態や、密度によっても異ってくる。(第1図(E
)) [実施例] 以下、本発明を実施例により説明する。
Optimal deposition conditions also vary depending on the arrangement and density of the nucleation surface on the non-nucleation surface. (Figure 1 (E
)) [Examples] The present invention will be explained below using Examples.

実施例1 第2図(A)〜(F)に、本発明の方法によりGaAs
結晶を形成する概略工程図を示す。
Example 1 FIGS. 2(A) to 2(F) show that GaAs was produced by the method of the present invention.
A schematic process diagram for forming crystals is shown.

(A):石英基板11の上に真空蒸着法によってTaJ
a膜12を1500人堆積した。蒸着条件は、基板温度
は室温、蒸着源はTa2Og 、 0□ガスを4×10
−’torrまで導入し、堆積速度1人/secであっ
た。(第2図(A)) (B)−次にプラズマCVD法で非晶質SiNx膜13
を300人堆積した。堆積条件は基板温度350℃、反
応圧力0.2torr、原料ガスは5iH4100cc
、NHs 200ccであった。(第2図(B))(C
):フオトリソグラフィー技術を使ってパターニングし
、リアクティブイオンエツチングによってSiNx膜1
3を部分的に取り去って、60μmの間隔で2μm四方
の微細な窓14を作りTa1lsを露出させた。この部
分がGaAsの核形成面4となる。(第2図(C)) (D):l(を雰囲気で850℃、10分間の熱処理を
行い、次にMOCVD法によってGaAs結晶核15を
Ta5Os上に発生させた。
(A): TaJ was deposited on the quartz substrate 11 by vacuum evaporation method.
A film 12 was deposited by 1500 people. The evaporation conditions were as follows: the substrate temperature was room temperature, the evaporation source was Ta2Og, and the 0□ gas was 4×10
-'torr, and the deposition rate was 1 person/sec. (Fig. 2 (A)) (B) - Next, the amorphous SiNx film 13 is
300 people deposited. The deposition conditions were a substrate temperature of 350°C, a reaction pressure of 0.2 torr, and a raw material gas of 5iH4100cc.
, NHs 200cc. (Figure 2 (B)) (C
): The SiNx film 1 is patterned using photolithography and reactive ion etching.
3 was partially removed to create fine windows 14 of 2 μm square at 60 μm intervals to expose Ta1ls. This portion becomes the nucleation surface 4 of GaAs. (FIG. 2(C)) (D): 1 was heat-treated in an atmosphere at 850° C. for 10 minutes, and then GaAs crystal nuclei 15 were generated on Ta5Os by MOCVD.

原料にはトリメチルガリウム(TMG)とターシャルブ
チルアルシン(TBAs)、希釈ガスにはH2を用いた
。原料ガスのモル比TMG : TBAsはl:25で
、反応圧力3 torr、基板温度670℃であった。
Trimethyl gallium (TMG) and tertiary butyl arsine (TBAs) were used as raw materials, and H2 was used as a diluent gas. The molar ratio of raw material gases TMG:TBAs was 1:25, the reaction pressure was 3 torr, and the substrate temperature was 670°C.

(第2図(D)) (E):成長開始後約10分でGaAsの結晶核15が
成長したGaAs単結晶16がTa1lsの窓14の領
域を埋めたところで、反応圧力を150torrに上げ
、TMGとTBAsの比を1=12に設定変更した。
(Fig. 2 (D)) (E): About 10 minutes after the start of growth, when the GaAs single crystal 16 in which the GaAs crystal nucleus 15 had grown filled the region of the Ta1ls window 14, the reaction pressure was increased to 150 torr. The ratio of TMG and TBAs was changed to 1=12.

(第2図(E)) (F);さらにGaAsの単結晶16が成長を続は他の
GaAs単結晶との粒界17を形成し、結晶径が60μ
mになったところで成長を止めた。(第2図(F))つ
いで表面を研磨により平坦化した後でIIISnの電極
を付はホール測定をしたところ、ホール移動度2800
cm″/V−s  (300K) 、キャリア濃度5 
X 1016/Cm”のn型の結晶が得られていること
が分った。
(Figure 2 (E)) (F); Furthermore, the GaAs single crystal 16 continues to grow, forming grain boundaries 17 with other GaAs single crystals, and the crystal diameter becomes 60 μm.
It stopped growing when it reached m. (Figure 2 (F)) Next, after flattening the surface by polishing, a IIISn electrode was attached and hole measurements were performed.
cm''/V-s (300K), carrier concentration 5
It was found that an n-type crystal of X 1016/Cm'' was obtained.

実施例2 第3図(A)〜(F)に、本発明の方法によりGaAl
As結晶を形成する概略工程図を示す。
Example 2 FIGS. 3(A) to 3(F) show that GaAl
A schematic process diagram for forming an As crystal is shown.

(A):シリコンウエハ21上にSiH4と0□を用い
たCVD法によって非晶質5iOa膜22を1500人
堆積した。(第3図(A)) (B):次にフォトレジスト23で開口部24を有する
所望のパターンにSiO□膜上をマスクして、イオンイ
ンブランターを用いてA1イオン25を打ち込んだ。打
込み量はI X 10”7cm2であった。(第3図(
B)) イオン打込み部分の大きさは2μm四方、打ち込み部分
の間隔は30μmであった。
(A): 1500 amorphous 5iOa films 22 were deposited on a silicon wafer 21 by the CVD method using SiH4 and 0□. (FIG. 3(A)) (B): Next, the SiO□ film was masked with a photoresist 23 in a desired pattern having openings 24, and A1 ions 25 were implanted using an ion implanter. The implantation amount was I x 10”7cm2 (Fig. 3 (
B)) The size of the ion implanted portion was 2 μm square, and the interval between the implanted portions was 30 μm.

(C):Alイオンの打込まれていないSiO□表面2
6では結晶の核発生確率は低く、Alイオン打込み領域
27では結晶の発生確率が高く、該領域27に結晶成長
して単結晶になる核が発生する。
(C): SiO□ surface 2 where Al ions are not implanted
6, the probability of crystal nucleation is low, whereas the probability of crystal nucleation is high in the Al ion implantation region 27, and a nucleus is generated in the region 27 where the crystal grows to become a single crystal.

(第3図(C)) (D):H,雰囲気の中で850℃、10分間の熱処理
行って、次にMOCVD法によって、Atがイオン打込
領域27の上にGaAlAs結晶核28を発生させた。
(Fig. 3 (C)) (D): Heat treatment is performed at 850°C for 10 minutes in an H atmosphere, and then by MOCVD, At generates GaAlAs crystal nuclei 28 on the ion implantation region 27. I let it happen.

原料にはトリメチルガリウム(TMG)とトリメチルア
ルミニウム(TMA) 、アルシン(AsHs )を使
い、希釈ガスにはH2を用いた。原料ガスのモル比はT
MG  : TMA  : AsHsは3 : 2 :
 250  (V/1’1l=50)で、圧力は3 t
orr、基板温度は700℃であった。
Trimethylgallium (TMG), trimethylaluminum (TMA), and arsine (AsHs) were used as raw materials, and H2 was used as a diluent gas. The molar ratio of raw material gas is T
MG: TMA: AsHs is 3:2:
250 (V/1'1l=50) and the pressure is 3t
orr, and the substrate temperature was 700°C.

(第3図(D)) (E):成長開始後15分でGaAlAs結晶核28が
成長したGaAlAs単結晶29が、At打ち込み領域
15を覆いつ(したところで、反応圧力を200tor
rに上げ、原料のモル比をTMG : TMA : A
sH,=3 : 2 : 175  (V/III=3
5)に設定変更した。(第3図(E)) (F):さらに成長を続けGaAlAsの結晶がぶつか
り合うまで成長させた。30は粒界である。
(Fig. 3 (D)) (E): 15 minutes after the start of growth, the GaAlAs single crystal 29 in which the GaAlAs crystal nucleus 28 has grown covers the At implantation region 15 (at this point, the reaction pressure is increased to 200 torr).
molar ratio of raw materials TMG:TMA:A
sH,=3:2:175 (V/III=3
The settings were changed to 5). (Figure 3 (E)) (F): Growth continued until the GaAlAs crystals collided with each other. 30 is a grain boundary.

(第3図(F)) [発明の効果] 本発明の結晶成長法によれば、非核形成面上への制御さ
れていない核の発生を抑え、V族原料を余分に使用する
ことな(効率的に、良質なm −v族化合物の単結晶を
成長することが可能になる。
(Figure 3 (F)) [Effects of the Invention] According to the crystal growth method of the present invention, uncontrolled generation of nuclei on non-nucleation surfaces can be suppressed, and unnecessary use of Group V raw materials can be avoided ( It becomes possible to efficiently grow a single crystal of a high-quality m-v group compound.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の結晶の形成方法を示す概略工程図、第
2図は本発明の方法をGaAs結晶の形成に用いた場合
の概略工程図、第3図は本発明の方法をGaAlAs結
晶の形成に用いた場合の概略工程図、第4図は核発生密
度と反応圧力との関係図、第5図はGaAsのホール(
Hall)移動度と反応圧力との関係図である。 1・・・下地材料 2・・・核形成密度の低い材料からなる薄膜3・・・非
核形成面   4・・・核形成面5・・・核形成密度の
低い材料からなる支持体6・・・核形成密度の高い材料
からなる薄膜7・・・フォトレジスト 8・・・イオン
打込領域9・・・III −V族化合物結晶核 IO・・・II −V族化合物単結晶 11・・・石英基板    12・・・Tag’s膜1
3・・・SiNx膜      14・・・窓15・・
・GaAs結晶核   16・・・GaAs単結晶17
・・・粒界      21・・・シリコンウェハ22
・・・非晶質5i02膜  23・・・フォトレジスト
24・・・開口部     25・・・AIイオン26
・・・Atイオンの打込まれていない領域27・・・A
tイオン打込領域 2g・・・GaAlAs結晶核 29・−・GaAlAs単結晶 30・・・粒界
Fig. 1 is a schematic process diagram showing the method of forming a crystal of the present invention, Fig. 2 is a schematic process diagram when the method of the present invention is used to form a GaAs crystal, and Fig. 3 is a schematic process diagram showing the method of the present invention for forming a GaAlAs crystal. Fig. 4 is a diagram showing the relationship between nucleation density and reaction pressure, and Fig. 5 is a schematic process diagram when used for the formation of GaAs holes (
FIG. 2 is a diagram showing the relationship between Hall (Hall) mobility and reaction pressure. 1... Base material 2... Thin film made of a material with low nucleation density 3... Non-nucleation surface 4... Nucleation surface 5... Support body 6 made of material with low nucleation density... - Thin film 7 made of material with high nucleation density...Photoresist 8...Ion implantation region 9...III-V group compound crystal nucleus IO...II-V group compound single crystal 11... Quartz substrate 12...Tag's film 1
3...SiNx film 14...Window 15...
・GaAs crystal nucleus 16...GaAs single crystal 17
... Grain boundary 21 ... Silicon wafer 22
...Amorphous 5i02 film 23...Photoresist 24...Opening 25...AI ion 26
...Region 27 where At ions are not implanted...A
t ion implantation region 2g...GaAlAs crystal nucleus 29...GaAlAs single crystal 30...grain boundary

Claims (1)

【特許請求の範囲】 1、有機金属化学輸送法によるIII−V族化合物の結晶
の形成方法において、核形成密度の小さい非核形成面と
、該非核形成面の核形成密度より大きい核形成密度を有
し、結晶成長して単結晶になる核が唯一形成され得るに
十分小さい面積を有する核形成面とが隣接して配された
自由表面を有する基体に、核形成初期段階では反応圧力
を低く原料ガス中の周期律表第V族原子と第III族原子
との比率V/IIIを高くし、かつ結晶成長段階では反応
圧力を核形成初期段階より高く比率V/IIIを核形成初
期段階より低くする結晶成長処理を施すことを特徴とす
る結晶の形成方法。 2、前記核形成初期段階における前記反応圧力が30t
orr未満である請求項1記載の結晶の形成方法。 3、前記核形成初期段階における前記周期律表第V族原
子と第III族原子との比率V/IIIが10以上である請求
項1記載の結晶の形成方法。 4、前記結晶成長段階における前記反応圧力が30to
rr以上である請求項1記載の結晶の形成方法。 5、前記結晶成長段階における前記周期律表第V族原子
と第III族原子との比率V/IIIが5以上である請求項1
記載の結晶の形成方法。 6、前記核形成面を前記非核形成面の内部に形成する請
求項1記載の結晶の形成方法。 7、前記核形成面を前記非核形成面の面上に形成する請
求項1記載の結晶の形成方法。 8、前記核形成面を区画化して複数形成する請求項1記
載の結晶の形成方法。 9、前記核形成面を規則的に区画化して複数形成する請
求項1記載の結晶の形成方法。 10、前記核形成面を不規則に区画化して複数形成する
請求項1記載の結晶の形成方法。 11、前記核形成面を格子状に形成する請求項1記載の
結晶の形成方法。 12、前記核形成面を区画化して複数設け、該核形成面
のそれぞれより、単結晶を成長させる請求項1記載の結
晶の形成方法。 13、各核形成面より成長する単結晶を、隣り合う核形
成面間で隣接する大きさまで成長させる請求項1記載の
結晶の形成方法。 14、前記核形成面を、イオン打込み法によって形成す
る請求項1記載の結晶の形成方法。 15、前記基体の表面を非単結晶質で構成する請求項1
記載の結晶の形成方法。 16、前記非核形成面を形成する材料が非晶質SiO_
2である請求項1記載の結晶の形成方法。 17、前記III−V族化合物が二元系III−V族化合物で
ある請求項1記載の結晶の形成方法。 18、前記III−V族化合物が混晶III−V族化合物であ
る請求項1記載の結晶の形成方法。 19、前記結晶形成処理がMOCVD法である請求項1
記載の結晶の形成方法。
[Claims] 1. A method for forming a crystal of a III-V compound using an organometallic chemical transport method, which includes a non-nucleation surface with a low nucleation density and a nucleation density higher than the nucleation density of the non-nucleation surface. At the initial stage of nucleation, a low reaction pressure is applied to the substrate, which has a free surface adjacent to a nucleation surface having a small enough area to form a unique nucleus that grows into a single crystal. The ratio V/III of Group V atoms to Group III atoms of the periodic table in the raw material gas is made higher, and the reaction pressure is made higher in the crystal growth stage than in the early stage of nucleation, so that the ratio V/III is higher than that in the early stage of nucleation. A method for forming a crystal, characterized by performing a crystal growth treatment to lower the crystal. 2. The reaction pressure at the initial stage of nucleation is 30t.
2. The method for forming a crystal according to claim 1, wherein the crystal growth rate is less than orr. 3. The method for forming a crystal according to claim 1, wherein the ratio V/III of the group V atoms to the group III atoms of the periodic table in the initial stage of nucleation is 10 or more. 4. The reaction pressure in the crystal growth stage is 30 to
2. The method for forming a crystal according to claim 1, wherein the crystal diameter is rr or more. 5. Claim 1, wherein the ratio V/III of the group V atoms to the group III atoms of the periodic table in the crystal growth stage is 5 or more.
Method of forming the described crystals. 6. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed inside the non-nucleation surface. 7. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed on the non-nucleation surface. 8. The method for forming a crystal according to claim 1, wherein the nucleation surface is divided into a plurality of sections. 9. The method for forming a crystal according to claim 1, wherein the nucleation surface is regularly partitioned to form a plurality of them. 10. The method for forming a crystal according to claim 1, wherein the nucleation surface is irregularly partitioned to form a plurality of them. 11. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed in a lattice shape. 12. The method for forming a crystal according to claim 1, wherein a plurality of the nucleation surfaces are divided and provided, and a single crystal is grown from each of the nucleation surfaces. 13. The method for forming a crystal according to claim 1, wherein the single crystals grown from each nucleation surface are grown to adjacent sizes between adjacent nucleation surfaces. 14. The method for forming a crystal according to claim 1, wherein the nucleation surface is formed by an ion implantation method. 15. Claim 1, wherein the surface of the substrate is made of non-single crystal material.
Method of forming the described crystals. 16. The material forming the non-nucleation surface is amorphous SiO_
2. The method for forming a crystal according to claim 1. 17. The method for forming a crystal according to claim 1, wherein the III-V group compound is a binary III-V group compound. 18. The method for forming a crystal according to claim 1, wherein the III-V group compound is a mixed crystal III-V group compound. 19. Claim 1, wherein the crystal formation treatment is an MOCVD method.
Method of forming the described crystals.
JP26911189A 1989-10-18 1989-10-18 Method of forming crystal Pending JPH03132015A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26911189A JPH03132015A (en) 1989-10-18 1989-10-18 Method of forming crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26911189A JPH03132015A (en) 1989-10-18 1989-10-18 Method of forming crystal

Publications (1)

Publication Number Publication Date
JPH03132015A true JPH03132015A (en) 1991-06-05

Family

ID=17467826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26911189A Pending JPH03132015A (en) 1989-10-18 1989-10-18 Method of forming crystal

Country Status (1)

Country Link
JP (1) JPH03132015A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6939730B2 (en) 2001-04-24 2005-09-06 Sony Corporation Nitride semiconductor, semiconductor device, and method of manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6939730B2 (en) 2001-04-24 2005-09-06 Sony Corporation Nitride semiconductor, semiconductor device, and method of manufacturing the same
US6972206B2 (en) 2001-04-24 2005-12-06 Sony Corporation Nitride semiconductor, semiconductor device, and method of manufacturing the same
US7282379B2 (en) 2001-04-24 2007-10-16 Sony Corporation Nitride semiconductor, semiconductor device, and method of manufacturing the same

Similar Documents

Publication Publication Date Title
US5281283A (en) Group III-V compound crystal article using selective epitaxial growth
JP2691721B2 (en) Semiconductor thin film manufacturing method
US5107317A (en) Semiconductor device with first and second buffer layers
US6255004B1 (en) III-V nitride semiconductor devices and process for the production thereof
JP2002249400A (en) Method for producing compound semiconductor single crystal and use thereof
JPH03132016A (en) Method of forming crystal
EP0241204B1 (en) Method for forming crystalline deposited film
US7361522B2 (en) Growing lower defect semiconductor crystals on highly lattice-mismatched substrates
KR101041659B1 (en) Method for producing gallium nitride epilayer using zinc oxide buffer layer
US5438951A (en) Method of growing compound semiconductor on silicon wafer
CA1331950C (en) Iii - v group compound crystal article and process for producing the same
KR20150035413A (en) Epitaxial growth of compound semiconductors using lattice-tuned domain-matching epitaxy
JPH03132015A (en) Method of forming crystal
US5118365A (en) Ii-iv group compound crystal article and process for producing same
US5254211A (en) Method for forming crystals
CA1333248C (en) Method of forming crystals
KR20040063171A (en) Group ⅲ nitride semicondoctor substrate and its manufacturing method
CN103548114B (en) Method for Fabricating III/V Si Templates
JP2659745B2 (en) III-Group V compound crystal article and method of forming the same
JPH03132017A (en) Method of forming crystal
JP2592834B2 (en) Crystal article and method for forming the same
US5183778A (en) Method of producing a semiconductor device
JP2003171200A (en) Compound semiconductor crystal growth method and compound semiconductor device
JPH04130717A (en) Formation method of crystal
JPH0575163A (en) Manufacture of semiconductor device