JPH03201434A - Formation of silicon oxide film - Google Patents
Formation of silicon oxide filmInfo
- Publication number
- JPH03201434A JPH03201434A JP34031089A JP34031089A JPH03201434A JP H03201434 A JPH03201434 A JP H03201434A JP 34031089 A JP34031089 A JP 34031089A JP 34031089 A JP34031089 A JP 34031089A JP H03201434 A JPH03201434 A JP H03201434A
- Authority
- JP
- Japan
- Prior art keywords
- film
- oxygen
- oxide film
- thickness
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 22
- 229910052814 silicon oxide Inorganic materials 0.000 title claims abstract description 16
- 230000015572 biosynthetic process Effects 0.000 title description 10
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 41
- 239000001301 oxygen Substances 0.000 claims abstract description 41
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 39
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 24
- 229920005591 polysilicon Polymers 0.000 claims abstract description 23
- 238000000034 method Methods 0.000 claims abstract description 21
- 230000003647 oxidation Effects 0.000 claims abstract description 17
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 17
- -1 oxygen ions Chemical class 0.000 claims abstract description 17
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 abstract description 30
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 18
- 229910052710 silicon Inorganic materials 0.000 abstract description 18
- 239000010703 silicon Substances 0.000 abstract description 18
- 230000007547 defect Effects 0.000 abstract description 7
- 230000015556 catabolic process Effects 0.000 abstract description 6
- 238000009792 diffusion process Methods 0.000 abstract description 4
- 229910052681 coesite Inorganic materials 0.000 abstract 3
- 229910052906 cristobalite Inorganic materials 0.000 abstract 3
- 239000000377 silicon dioxide Substances 0.000 abstract 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract 3
- 229910052682 stishovite Inorganic materials 0.000 abstract 3
- 229910052905 tridymite Inorganic materials 0.000 abstract 3
- 239000010408 film Substances 0.000 description 67
- 230000001590 oxidative effect Effects 0.000 description 7
- 238000001947 vapour-phase growth Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 125000001475 halogen functional group Chemical group 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000002128 reflection high energy electron diffraction Methods 0.000 description 2
- 239000012808 vapor phase Substances 0.000 description 2
- 241000894006 Bacteria Species 0.000 description 1
- 229910017974 NH40H Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000003921 oil Substances 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、酸化シリコン膜の形成方法に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a method for forming a silicon oxide film.
(従来の技術と発明が解決しようとする課題)従来、シ
リコン酸化膜の形成方法はシリコン基板の熱酸化もしく
は、気相成長によるものであった。シリコン基板の熱酸
化によれば高品質のシリコン酸化膜が得られ、また界面
はシリコン基板内に形成されるため界面準位密度も少な
い。しがし、熱酸化のためには800°C以上の高温を
必要とし、熱酸化の過程で不純物の拡散によって、基板
内に形成した不純物プロファイルが崩れてしまうという
欠点がある。二方、気相成長によれば低温の酸化膜形成
が可能ではある。しがし、この気相成長では気相中でシ
リコンと酸素の反応が起こり5i02粒子となって基板
上に降り積もるため、酸化膜中にはボイドが多数存在す
る。このため、気相成長によって形成した酸化膜は、熱
酸化膜に比べて耐圧が低くリーク電流も多い。さらに、
シリコン表面の清浄化が行われないため、界面準位密度
が多く、MOSデバイスのゲート酸化膜等高品質の酸化
膜が要求される箇所には使用することができないという
問題点があった。さらに、MOSデバイスのゲート酸化
膜は、LSIの高密度化に伴い薄膜化の傾向にあり、近
い将来には100Aあるいはそれ以下の膜厚が必要にな
ると予想される。特にDRAMでは、α線によるソフト
エラーを防止するためにキャパシタ容量を少なくするこ
とが困難な状況にあり、従って微細化に伴う容量の減少
を酸化膜の薄膜化で補う必要がある。さらに、チップサ
イズの大型化によりゲート領域の占める面積も広くなり
つつあり、大面積にわたって耐圧不良の無い電気的絶縁
性の優れた酸化膜が要求される。一方、酸化膜厚が薄く
なっても動作電圧を下げることが実用上困難であり、酸
化膜は従来よりも高い電界強度のもとで使用される傾向
にある。しかし、熱酸化膜は膜厚が薄くなると、ピンホ
ールやウィークスポットなど絶縁不良をひきおこす欠陥
が多数発生する。この原因はSiと5i02の界面に存
在するSiOx層の影響が酸化膜厚が薄くなってくると
無視し得なくなってくること、また微粒子、有機物、油
脂、あるいはバクテリアの付着などによる表面の汚染で
あると考えられている。(Prior Art and Problems to be Solved by the Invention) Conventionally, the method of forming a silicon oxide film has been thermal oxidation of a silicon substrate or vapor phase growth. By thermally oxidizing a silicon substrate, a high quality silicon oxide film can be obtained, and since the interface is formed within the silicon substrate, the interface state density is also low. However, thermal oxidation requires a high temperature of 800° C. or higher, and there is a drawback that the impurity profile formed in the substrate collapses due to impurity diffusion during the thermal oxidation process. On the other hand, vapor phase growth makes it possible to form an oxide film at low temperatures. However, in this vapor phase growth, a reaction between silicon and oxygen occurs in the vapor phase, resulting in 5i02 particles that accumulate on the substrate, so that many voids exist in the oxide film. Therefore, an oxide film formed by vapor phase growth has a lower breakdown voltage and more leakage current than a thermal oxide film. moreover,
Since the silicon surface is not cleaned, there is a problem that the density of interface states is high and that it cannot be used in areas where a high quality oxide film is required, such as the gate oxide film of a MOS device. Furthermore, gate oxide films of MOS devices tend to become thinner as LSIs become more densely packed, and it is expected that a film thickness of 100A or less will be required in the near future. Particularly in DRAMs, it is difficult to reduce the capacitance of a capacitor in order to prevent soft errors caused by alpha rays, and therefore it is necessary to compensate for the decrease in capacitance due to miniaturization by making the oxide film thinner. Furthermore, as the chip size increases, the area occupied by the gate region becomes larger, and an oxide film with excellent electrical insulation properties without breakdown voltage defects is required over a large area. On the other hand, even if the oxide film becomes thinner, it is practically difficult to lower the operating voltage, and oxide films tend to be used under higher electric field strength than before. However, as the thermal oxide film becomes thinner, many defects such as pinholes and weak spots occur that cause insulation failure. The reason for this is that the influence of the SiOx layer existing at the interface between Si and 5i02 becomes negligible as the oxide film becomes thinner, and also because of surface contamination due to adhesion of fine particles, organic matter, oil, or bacteria. It is thought that there is.
そこで、本発明者は分子状のSi l!l:ECRによ
って発生した酸素プラズマを同時に基板に供給したとこ
ろ、低温で酸化膜が形成できることを見出した。また、
この方法では気相成長による酸化膜の堆積と異なり分子
線領域で行うため、気相反応ではなく表面でSiの酸化
であり、気相成長に比べてより緻密な膜の形成が行える
ことがわかった。さらに、5i02形成前にSiMBE
でSiのバッファーエピタキシャル層を成長することに
よって5i02/Si界面を原子オーダーで平坦にする
ことができ、界面の凹凸による電界集中に起因する耐圧
の低下を減少させることができた。このようにして形威
した酸化膜の耐圧及びリーク電流は同じ厚さの熱酸化膜
と同等であった。Therefore, the present inventors developed molecular Si I! 1: When oxygen plasma generated by ECR was simultaneously supplied to the substrate, it was found that an oxide film could be formed at a low temperature. Also,
Unlike the deposition of oxide films by vapor phase growth, this method uses molecular beams to oxidize Si on the surface rather than a vapor phase reaction, making it possible to form a denser film compared to vapor phase growth. Ta. Furthermore, SiMBE was used before 5i02 formation.
By growing a Si buffer epitaxial layer, the 5i02/Si interface could be made flat on the atomic order, and the decrease in breakdown voltage caused by electric field concentration due to the unevenness of the interface could be reduced. The breakdown voltage and leakage current of the oxide film thus formed were equivalent to those of a thermal oxide film of the same thickness.
しかし、この方法は、基板Si表面を清浄化しても上層
5i02とSi基板表面とが完全にはつながらず、界面
にダングリングボンドが残り、このダングリングボンド
に起因する界面準位が発生するという問題があった。界
面準位密度は熱酸化膜の場合に比べると約10倍多くM
OSのゲート酸化膜としては用いることができながった
。また、低温成長であるため、5i02中に空孔が多数
存在し、この欠陥に伴うリーク電流も100Å以下の膜
厚では熱酸化膜に比べて多く、問題であった。However, in this method, even if the Si substrate surface is cleaned, the upper layer 5i02 and the Si substrate surface are not completely connected, dangling bonds remain at the interface, and interface states are generated due to these dangling bonds. There was a problem. The interface state density is about 10 times higher than that of thermal oxide film.
It could no longer be used as a gate oxide film for an OS. Furthermore, due to the low temperature growth, there are many vacancies in 5i02, and the leakage current due to these defects is larger than that of a thermally oxidized film at a film thickness of 100 Å or less, which is a problem.
本発明の目的は、この様な従来の欠点を除去して、低温
形成でき、界面準位が少なく、欠陥に伴うリーク電流が
少ない酸化シリコン形成方法を提供することにある。It is an object of the present invention to provide a method for forming silicon oxide that eliminates these conventional drawbacks, allows formation at low temperatures, has few interface states, and reduces leakage current due to defects.
(課題を解決するための手段)
本発明は、真空槽内で清浄面を出しだ半導体上に、酸素
イオン(O−)、もしくは原子状酸素(O)、もしくは
酸素イオンあるいは原子状酸素を含む酸素分子線(O2
)を照射することにより表面に第1シリコン酸化膜を形
成し、続けて同一真空槽内で第1シリコン酸化膜上に薄
いポリシリコン膜を形威し、酸素イオン(O−)、もし
くは原子状酸素(O)、もしくは酸素イオンあるいは原
子状酸素を含む酸素分子線(O2)を照射することによ
りポリシリコン膜を酸化することを、所定の酸化膜厚に
なるまで繰り返すことを特徴とするシリコン酸化膜の形
成方法である。(Means for Solving the Problems) The present invention provides oxygen ions (O-), atomic oxygen (O), or oxygen ions or atomic oxygen contained on a semiconductor whose clean surface is exposed in a vacuum chamber. Oxygen molecular beam (O2
), a first silicon oxide film is formed on the surface, and then a thin polysilicon film is formed on the first silicon oxide film in the same vacuum chamber, and oxygen ions (O-) or atomic Silicon oxidation characterized by repeating oxidation of a polysilicon film by irradiating oxygen (O), oxygen ions, or oxygen molecular beams (O2) containing atomic oxygen until a predetermined oxide film thickness is reached. This is a method of forming a film.
また第1シリコン酸化膜形成前に薄いポリシリコン膜を
形成しておきこのポリシリコン膜を同様にして酸化する
こと及び同じようにして薄いポリジノコン膜の形成とそ
の酸化を繰り返すことも本発明に含まれる。The present invention also includes forming a thin polysilicon film before forming the first silicon oxide film and oxidizing this polysilicon film in the same manner, and repeating the formation and oxidation of a thin polysilicon film in the same manner. It will be done.
(作用)
本発明の原理について説明する。従来の熱酸化では、酸
化は5i02と基板Si結晶界面において起こっている
ため、酸素の5i02中での拡散と基板結晶Siのバッ
クボンドを切るために多くのエネルギーを必要とし、こ
れが酸化温度と時間を決定している。(Operation) The principle of the present invention will be explained. In conventional thermal oxidation, oxidation occurs at the interface between the 5i02 and the substrate Si crystals, so a lot of energy is required to diffuse oxygen in the 5i02 and break the back bond of the substrate crystalline Si, and this increases the oxidation temperature and time. has been decided.
第2図(a)に示すように、表面側から分子状のSiと
原子状酸素もしくは酸素イオンを同時に供給すると、酸
化はいつも表面で起こり、しかも結晶を組んでいる基板
Siのバックボンドを切る必要がないため、低温で酸化
膜が形成できる。しかし、以上のような酸化膜形成方法
では低温での5i02の堆積であるため、第2図(b)
に示すように、基板Si表面を清浄化しても上層5i0
2とSi基板表面とが完全にはつながらず、界面にダン
グリングボンドが残り、このダングリングボンドに起因
する界面準位が発生する。また、第2図(b)に示すよ
うに5i02中に空孔24が存在し、この欠陥に伴うリ
ーク電流も100A以下の薄い膜厚では熱酸化膜に比べ
て多い。As shown in Figure 2(a), when molecular Si and atomic oxygen or oxygen ions are simultaneously supplied from the surface side, oxidation always occurs at the surface, and moreover, the back bond of the substrate Si forming the crystal is cut. Since this is not necessary, an oxide film can be formed at low temperatures. However, in the above oxide film formation method, 5i02 is deposited at a low temperature, so as shown in Fig. 2(b).
As shown in , even if the substrate Si surface is cleaned, the upper layer 5i0
2 and the surface of the Si substrate are not completely connected, dangling bonds remain at the interface, and interface states are generated due to these dangling bonds. Further, as shown in FIG. 2(b), there are vacancies 24 in 5i02, and the leakage current due to these defects is larger than that in a thermally oxidized film at a thin film thickness of 100 A or less.
そこで、本発明者は、第3図(a)に示すように予め清
浄化したシリコン基板表面に酸素イオンもしくは原子状
酸素を照射したところ、希薄な酸素雰囲気中でも、第3
図(b)に示すようにシリコン基板が酸化され表面に5
i02が形成される事を見出した。この、5i02は基
板の酸化によって形成されたものであり、膜質、界面状
態ともに熱酸化膜と同等である。しかし、5i02の形
成速度は、5i02が厚くなり5i02中での酸素の拡
散が律速する様になるとすぐに低下してしまい、2OA
以上の膜厚の酸化膜の形成ができなかった。現在、MO
S )ランジスタのゲート酸化膜として使われている酸
化膜の膜厚は60〜100Aであり、低温でさらに厚い
膜の形成が必要である。Therefore, as shown in FIG. 3(a), the present inventor irradiated the surface of a silicon substrate that had been cleaned in advance with oxygen ions or atomic oxygen.
As shown in Figure (b), the silicon substrate is oxidized and the surface has 5
It was found that i02 was formed. This 5i02 is formed by oxidizing the substrate, and is equivalent to a thermal oxide film in both film quality and interface state. However, the formation rate of 5i02 decreases as soon as 5i02 becomes thick and oxygen diffusion in 5i02 becomes rate-limiting, and 2OA
It was not possible to form an oxide film with a thickness greater than that. Currently, M.O.
S) The film thickness of the oxide film used as the gate oxide film of the transistor is 60 to 100A, and it is necessary to form an even thicker film at a low temperature.
そこで、本発明者は、第1図(a)に示すように、清浄
化したシリコン基板表面に、酸素イオンもしくは原子状
酸素を照射して2OA程度の5i02を形成し、次に第
1図(b)に示すように、この上にシリコンの分子線を
供給して10人程度のポリシリコン槽を形成し、第1図
(C)に示すように、ふたたび酸素イオンもしくは原子
状酸素を照射してこのポリシリコン槽を酸化すると合計
40Aの酸化膜が形成される事を見出した。この工程を
繰り返せば、5i02中での酸素の拡散によって決定さ
れてしまう膜厚以上の厚い膜を低温で形成できる。ポリ
シリコンの膜厚があまり厚いとそれを酸化して形成され
る酸化膜が厚くなってしまい拡散律速の厚さになってし
まうので、ポリシリコンは数10A以下が望ましい。ま
た、酸化膜の膜厚は供給するシリコン分子線量によって
決定されるために膜厚の制御性も極めて良い。Therefore, as shown in FIG. 1(a), the present inventor formed 5i02 of about 2OA by irradiating the surface of a cleaned silicon substrate with oxygen ions or atomic oxygen, and then, as shown in FIG. As shown in b), a silicon molecular beam is supplied on top of this to form a polysilicon bath containing about 10 people, and as shown in Fig. 1(C), oxygen ions or atomic oxygen is irradiated again. It has been found that when the polysilicon tank used as a lever is oxidized, an oxide film of a total of 40A is formed. By repeating this process, a film thicker than that determined by the diffusion of oxygen in 5i02 can be formed at low temperatures. If the film thickness of polysilicon is too thick, the oxide film formed by oxidizing it will become thick and the thickness will become diffusion-limiting, so the thickness of polysilicon is preferably several tens of amps or less. Furthermore, since the thickness of the oxide film is determined by the dose of silicon molecules supplied, the controllability of the film thickness is also extremely good.
この様な方法ならばたとえ室温で成長じても、耐圧、リ
ーク電流、界面準位密度共に熱酸化によって形成された
酸化膜と同程度のものを作ることができた。With this method, even if grown at room temperature, it was possible to create an oxide film with breakdown voltage, leakage current, and interface state density comparable to those formed by thermal oxidation.
本方法は、ECR照射して始めに基板を酸化する工程を
行わずにSi分子線を送り薄いポリシリコンを形成して
からECRによる酸化を行えば、基板を酸化することな
く 5i02を形成することができるため、基板はSi
である必要はなく化合物半導体上でも同様な酸化膜が得
られた。In this method, 5i02 can be formed without oxidizing the substrate by sending a Si molecular beam to form a thin polysilicon and then oxidizing it by ECR without performing the step of first oxidizing the substrate by ECR irradiation. Therefore, the substrate is Si
It is not necessary that this is the case, and a similar oxide film was obtained on a compound semiconductor.
(実施例)
次に実施例について具体的に説明する。実験は40cc
の電子銃式Si蒸着器及び100WのECR型プラズマ
源を備えたMBE装置を用いて行った。試料ウェハーに
は4インチn型5i(100)0.01〜0.02Ωc
m基板を用いた。98°CNH40H系洗浄液(NH4
0H:H2O2:H2O=1:6:20)で基板を10
分間洗浄し、10分水洗した。乾燥後、形成室内に搬送
し10人のa−8iを堆積後、800’C1分間加熱し
て清浄化して、成長温度500°Cでバッファ層である
エピタキシャル層を300OA成長じた。基板温度を室
温に下げた後、清浄面にECRプラズマ源から酸素プラ
ズマを照射して表面を約2OA酸化した。この時、RH
EEDパターンが清浄面を示す2xlからアモルファス
5i02層が形成されていることを示すハローパターン
に変化することを確認した。パッシベーション膜形成室
内の酸素分圧は5x10=Torrであった。5xlO
−5Torrにおける気体の平均自由工程は数10cm
あるため雰囲気中での反応は少なく、5i02形成に関
与する反応は表面上で起こる。この後、基板温度を50
0°Cに上げて電子銃式Si蒸着器よりSi分子線を供
給し、酸素プラズマによって形成した酸化膜上に10A
のポリシリコン層を形成した。この時、RHEEDパタ
ーンはハローパターンから多結晶シリコンが形成された
事を示すノングパターンに変化する事を確かめた。ふた
たび、基板温度を室温に下げた後、ポリシリコン表面に
ECRプラズマ源より酸素プラズマを照射して20Aの
ポリシリコンを完全に酸化した。この時、RHEEDパ
ターンはリングパターンがらハローパターンに変化した
。(Example) Next, an example will be specifically described. The experiment was 40cc
The experiment was carried out using an MBE apparatus equipped with an electron gun type Si evaporator and a 100 W ECR type plasma source. The sample wafer has a 4-inch n-type 5i (100) 0.01-0.02Ωc
m substrate was used. 98°C NH40H-based cleaning solution (NH4
0H:H2O2:H2O=1:6:20)
Washed for 10 minutes and then water for 10 minutes. After drying, the film was transported into a formation chamber, where 10 A-8I layers were deposited, and then heated at 800°C for 1 minute to clean it, and an epitaxial layer serving as a buffer layer was grown to a thickness of 300 OA at a growth temperature of 500°C. After lowering the substrate temperature to room temperature, the clean surface was irradiated with oxygen plasma from an ECR plasma source to oxidize the surface by about 2 OA. At this time, RH
It was confirmed that the EED pattern changed from 2xl indicating a clean surface to a halo pattern indicating the formation of an amorphous 5i02 layer. The oxygen partial pressure in the passivation film forming chamber was 5×10 Torr. 5xlO
The mean free path of gas at -5 Torr is several tens of cm.
Therefore, there are few reactions in the atmosphere, and the reactions involved in 5i02 formation occur on the surface. After this, increase the substrate temperature to 50
The temperature was raised to 0°C, and a Si molecular beam was supplied from an electron gun type Si evaporator, and 10A was applied to the oxide film formed by oxygen plasma.
A polysilicon layer was formed. At this time, it was confirmed that the RHEED pattern changed from a halo pattern to a nongloss pattern indicating that polycrystalline silicon was formed. After lowering the substrate temperature to room temperature again, the polysilicon surface was irradiated with oxygen plasma from an ECR plasma source to completely oxidize the 20A polysilicon. At this time, the RHEED pattern changed from a ring pattern to a halo pattern.
はじめに、形威された酸化膜の界面準位を調べるために
MOSキャパシターを試作しc■測測定ターマン法)に
より界面準位密度を求めた。第1表に分子状のSiと酸
素プラズマを同時に供給した従来例の場合と、酸素プラ
ズマによる酸化とポリシリコンの堆積を繰り返した場合
及び熱酸化の場合の界面準位の比較を示す。酸化膜の膜
厚は60人であった。First, in order to investigate the interface states of the formed oxide film, a MOS capacitor was fabricated as a prototype, and the interface state density was determined using the c-meter measurement (Terman method). Table 1 shows a comparison of the interface states between a conventional example in which molecular Si and oxygen plasma were simultaneously supplied, a case in which oxidation by oxygen plasma and deposition of polysilicon were repeated, and a case in thermal oxidation. The thickness of the oxide film was 60.
表1
表1かられかる様に、分子状のSiと酸素プラズマを同
時に供給した場合には、1012〜1013cm−2で
あった界面準位が、酸素プラズマによる酸化とポリシリ
コンの堆積を繰り返した場合には約1桁下がり1011
cm ”となり、はぼ熱酸化膜と同程度まで界面準位密
度を下げることができた。第4図は同サンプルのI−V
測定の結果である。リーク電流は酸素プラズマとSi分
子線を用いて形威した膜(C)では膜中に存在する空孔
の影響により多いが、酸素プラスマによる酸化とポリシ
リコンの堆積を繰り返して形成した膜(b)では、熱酸
化膜(a)と同じく欠陥が少なく、リーク電流も少ない
ことがわかった。Table 1 As shown in Table 1, when molecular Si and oxygen plasma were supplied simultaneously, the interface level, which was 1012 to 1013 cm-2, was repeatedly oxidized by oxygen plasma and deposited polysilicon. In this case, it drops by about one digit to 1011
cm'', and the interface state density could be lowered to the same level as that of a thermal oxide film. Figure 4 shows the I-V of the same sample.
These are the results of the measurement. The leakage current is higher in the film formed using oxygen plasma and Si molecular beam (C) due to the effect of vacancies existing in the film, but in the film formed by repeating oxidation by oxygen plasma and polysilicon deposition (B) ) was found to have fewer defects and less leakage current, similar to the thermal oxide film (a).
最後に、本方法で形成した5i02/Si界面の平坦正
を評価するために5i(100)面上に500’Cで3
00OAのエピタキシャルバッファー層を成長液、酸素
プラズマによる酸化とポリシリコンの堆積を繰り返して
50Aの5i02を形威し界面の断面格子像を観察した
。Finally, in order to evaluate the flatness of the 5i02/Si interface formed by this method, three
A 00A epitaxial buffer layer was formed into a 50A 5i02 by repeating oxidation using a growth solution, oxygen plasma, and polysilicon deposition, and a cross-sectional lattice image of the interface was observed.
MBEでバッファー層を成長じているため界面は極めて
平坦であり、界面の乱れは通常の5i(100)ウェハ
ーを用いた場合、数100Aごとに観察される1原子層
ステップだけであった。これはもとのMBE戒長成長フ
ァー層上に存在するものである。この1原子層ステップ
の密度はウェハー表面の傾きに依存し、正確にjust
面を使った場合、数1000Aの平坦なテラスを得るこ
とができた。Because the buffer layer was grown by MBE, the interface was extremely flat, and when a normal 5i (100) wafer was used, the only disturbance at the interface was a one-atomic layer step observed every several hundred amps. This is present on the original MBE Kaicho growth fur layer. The density of this one-atomic layer step depends on the slope of the wafer surface and is exactly
When using a surface, a flat terrace of several thousand amperes could be obtained.
なお、本実施例ではシリコンウェハーを対象としたが、
本発明の方法は表面にのみシリコンが存在する5O8(
Silicon on 5apphire)基板や更に
一般に5OI(Silicon on In5ulat
or)基板等にも当然適用できる。また、本方法は、S
iも表面側から供給するために、本質的に基板はSiで
ある必要はなく、化合物半導体上でも同様に良質な酸化
膜が得られることを確認した。Note that although silicon wafers were targeted in this example,
The method of the present invention uses 5O8 (5O8) where silicon exists only on the surface.
Silicon on 5apphire) substrates and more generally 5OI (Silicon on In5ulat) substrates.
or) Of course, it can also be applied to substrates, etc. In addition, this method
Since i is also supplied from the surface side, the substrate does not essentially need to be Si, and it was confirmed that a high-quality oxide film could be obtained on a compound semiconductor as well.
(発明の効果)
以上、詳細に述べた通り本発明によれば、室温で、電気
的に熱酸化膜と同等な界面準位の極めて少ない酸化膜の
形成を行うことができる。(Effects of the Invention) As described above in detail, according to the present invention, it is possible to form an oxide film with very few interface states that is electrically equivalent to a thermal oxide film at room temperature.
第1図は、本発明方法の原理の概念図、第2図は、従来
技術の原理の概念図、第3図は、従来技術の原理の概念
図、第4図は、I−V特性の5i02形成方法依存性を
示す図である。Figure 1 is a conceptual diagram of the principle of the method of the present invention, Figure 2 is a conceptual diagram of the principle of the prior art, Figure 3 is a conceptual diagram of the principle of the prior art, and Figure 4 is a conceptual diagram of the principle of the prior art. FIG. 5 is a diagram showing dependence on the 5i02 formation method.
Claims (2)
ン(O^−)、もしくは原子状酸素(O)、もしくは酸
素イオンあるいは原子状酸素を含む酸素分子線(O_2
)を照射することにより表面に第1シリコン酸化膜を形
成し、続けて同一真空槽内で第1シリコン酸化膜上に薄
いポリシリコン膜を形成し、酸素イオン(O^−)、も
しくは原子状酸素(O)、もしくは酸素イオンあるいは
原子状酸素を含む酸素分子線(O_2)を照射すること
によりポリシリコン膜を酸化することを、所望の酸化膜
厚になるまで繰り返すことを特徴とする酸化シリコン膜
の形成方法。(1) Oxygen ions (O^-) or atomic oxygen (O), or oxygen molecular beams containing oxygen ions or atomic oxygen (O_2
), a first silicon oxide film is formed on the surface, and then a thin polysilicon film is formed on the first silicon oxide film in the same vacuum chamber, and oxygen ions (O^-) or atomic Silicon oxide characterized by repeating oxidation of a polysilicon film by irradiating it with oxygen (O), oxygen ions, or oxygen molecular beams (O_2) containing atomic oxygen until a desired oxide film thickness is achieved. How to form a film.
を形成し、酸素イオン(O^−)、もしくは原子状酸素
(O)、もしくは酸素イオンあるいは原子状酸素を含む
酸素分子線(O_2)を照射して前記ポリシリコン膜を
酸化して第1シリコン酸化膜を形成する請求項1に記載
の酸化シリコン膜の形成方法。(2) A thin polysilicon film is formed before the first silicon oxide film is formed, and oxygen ions (O^-), atomic oxygen (O), or oxygen molecular beams containing oxygen ions or atomic oxygen (O_2) are formed. 2. The method of forming a silicon oxide film according to claim 1, wherein the first silicon oxide film is formed by irradiating the polysilicon film to oxidize the polysilicon film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34031089A JPH088251B2 (en) | 1989-12-28 | 1989-12-28 | Method for forming silicon oxide film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34031089A JPH088251B2 (en) | 1989-12-28 | 1989-12-28 | Method for forming silicon oxide film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03201434A true JPH03201434A (en) | 1991-09-03 |
| JPH088251B2 JPH088251B2 (en) | 1996-01-29 |
Family
ID=18335723
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34031089A Expired - Fee Related JPH088251B2 (en) | 1989-12-28 | 1989-12-28 | Method for forming silicon oxide film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH088251B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5443863A (en) * | 1994-03-16 | 1995-08-22 | Auburn University | Low-temperature oxidation at surfaces using ozone decomposition products formed by microwave discharge |
| JP2013254794A (en) * | 2012-06-05 | 2013-12-19 | Fujitsu Ltd | Manufacturing method of oxide film |
-
1989
- 1989-12-28 JP JP34031089A patent/JPH088251B2/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5443863A (en) * | 1994-03-16 | 1995-08-22 | Auburn University | Low-temperature oxidation at surfaces using ozone decomposition products formed by microwave discharge |
| WO1995024975A1 (en) * | 1994-03-16 | 1995-09-21 | Auburn University | Low-temperature oxidation at surfaces using ozone decomposition products formed by microwave discharge |
| JP2013254794A (en) * | 2012-06-05 | 2013-12-19 | Fujitsu Ltd | Manufacturing method of oxide film |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH088251B2 (en) | 1996-01-29 |
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