JPH088251B2 - Method for forming silicon oxide film - Google Patents

Method for forming silicon oxide film

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Publication number
JPH088251B2
JPH088251B2 JP34031089A JP34031089A JPH088251B2 JP H088251 B2 JPH088251 B2 JP H088251B2 JP 34031089 A JP34031089 A JP 34031089A JP 34031089 A JP34031089 A JP 34031089A JP H088251 B2 JPH088251 B2 JP H088251B2
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Japan
Prior art keywords
oxide film
oxygen
silicon oxide
film
sio
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JP34031089A
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Japanese (ja)
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JPH03201434A (en
Inventor
徹 辰巳
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NEC Corp
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NEC Corp
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Publication of JPH03201434A publication Critical patent/JPH03201434A/en
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Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、酸化シリコン膜の形成方法に関する。TECHNICAL FIELD The present invention relates to a method for forming a silicon oxide film.

(従来の技術と発明が解決しようとする課題) 従来、シリコン酸化膜の形成方法はシリコン基板の熱
酸化もしくは、気相成長によるものであった。シリコン
基板の熱酸化によれば高品質のシリコン酸化膜が得ら
れ、また界面はシリコン基板内に形成されるため界面準
位密度も少ない。しかし、熱酸化のためには800℃以上
の高温を必要とし、熱酸化の過程で不純物の拡散によっ
て、基板内に形成した不純物プロファイルが崩れてしま
うという欠点がある。一方、気相成長によれば低温の酸
化膜形成が可能ではある。しかし、この気相成長では気
相中でシリコンと酸素の反応が起こりSiO2粒子となって
基板上に降り積もるため、酸化膜中にはボイドが多数存
在する。このため、気相成長によって形成した酸化膜
は、熱酸化膜に比べて耐圧が低くリーク電流も多い。さ
らに、シリコン表面の清浄化が行われないため、界面準
位密度が多く、MOSデバイスのゲート酸化膜等高品質の
酸化膜が要求される箇所には使用することができないと
いう問題点があった。さらに、MOSデバイスのゲート酸
化膜は、LSIの高密度化に伴い薄膜化の傾向にあり、近
い将来には100Åあるいはそれ以下の膜厚が必要になる
と予想される。特にDRAMでは、α線によるソフトエラー
を防止するためにキャパシタ容量を少なくすることが困
難な状況にあり、従って微細化に伴う容量の減少を酸化
膜の薄膜化で補う必要がある。さらに、チップサイズの
大型化によりゲート領域の占める面積も広くなりつつあ
り、大面積にわたって耐圧不良の無い電気的絶縁性の優
れた酸化膜が要求される。一方、酸化膜厚が薄くなって
も動作電圧を下げることが実用上困難であり、酸化膜は
従来よりも高い電界強度のもとで使用される傾向にあ
る。しかし、熱酸化膜は膜厚が薄くなると、ピンホール
やウィークスポットなど絶縁不良をひきおこす欠陥が多
数発生する。この原因はSiとSiO2の界面に存在するSiOx
層の影響が酸化膜厚が薄くなってくると無視し得なくな
ってくること、また微粒子、有機物、油脂、あるいはバ
クテリアの付着などによる表面の汚染であると考えられ
ている。
(Problems to be Solved by Conventional Techniques and Inventions) Conventionally, a method of forming a silicon oxide film has been based on thermal oxidation of a silicon substrate or vapor phase growth. A high-quality silicon oxide film can be obtained by thermal oxidation of a silicon substrate, and the interface state density is low because the interface is formed in the silicon substrate. However, the thermal oxidation requires a high temperature of 800 ° C. or higher, and there is a drawback that the impurity profile formed in the substrate is destroyed due to the diffusion of impurities during the thermal oxidation. On the other hand, vapor phase growth enables formation of an oxide film at low temperature. However, in this vapor phase growth, a reaction between silicon and oxygen occurs in the vapor phase, and SiO 2 particles are deposited on the substrate, so that many voids exist in the oxide film. Therefore, the oxide film formed by vapor phase growth has a lower breakdown voltage and a larger leak current than the thermal oxide film. Further, since the silicon surface is not cleaned, there is a problem that the interface state density is high and it cannot be used in a place where a high quality oxide film such as a gate oxide film of a MOS device is required. . Furthermore, the gate oxide film of MOS devices tends to become thinner as the density of LSI becomes higher, and it is expected that the film thickness of 100 Å or less will be required in the near future. Particularly in DRAM, it is difficult to reduce the capacitance of the capacitor in order to prevent soft error due to α-rays, and therefore it is necessary to compensate for the decrease in capacitance due to miniaturization by thinning the oxide film. Furthermore, the area occupied by the gate region is also increasing due to the increase in chip size, and an oxide film having excellent electrical insulation properties without a withstand voltage defect over a large area is required. On the other hand, it is practically difficult to reduce the operating voltage even when the oxide film is thin, and the oxide film tends to be used under a higher electric field strength than before. However, when the thickness of the thermal oxide film becomes thin, many defects such as pinholes and weak spots that cause insulation failure occur. The cause of this is SiO x existing at the interface between Si and SiO 2.
It is considered that the influence of the layer is not negligible as the oxide film thickness becomes thinner, and that the surface is contaminated due to adhesion of fine particles, organic substances, oils and fats, or bacteria.

そこで、本発明者は分子状のSiとECRによって発生し
た酸素プラズマを同時に基板に供給したところ、低温で
酸化膜が形成できることを見出した。また、この方法で
は気相成長による酸化膜の堆積と異なり分子線領域で行
うため、気相反応ではなく表面でSiの酸化であり、気相
成長に比べてより緻密な膜の形成が行えることがわかっ
た。さらに、SiO2形成前にSiMBEでSiのバッファーエピ
タキシャル層を成長することによってSiO2/Si界面を原
子オーダーで平坦にすることができ、界面の凹凸による
電界集中に起因する耐圧の低下を減少させることができ
た。このようにして形成した酸化膜の耐圧及びリーク電
流は同じ厚さの熱酸化膜と同等であった。
Therefore, the present inventors have found that when oxygen plasma generated by molecular Si and ECR is simultaneously supplied to the substrate, an oxide film can be formed at a low temperature. Also, in this method, unlike the deposition of an oxide film by vapor phase growth, it is carried out in the molecular beam region, so Si is oxidized on the surface, not by gas phase reaction, and a more dense film can be formed compared to vapor phase growth. I understood. Furthermore, by growing a Si buffer epitaxial layer with SiMBE before forming SiO 2 , the SiO 2 / Si interface can be flattened in atomic order, and the decrease in breakdown voltage due to electric field concentration due to unevenness of the interface is reduced. I was able to. The breakdown voltage and leak current of the oxide film formed in this manner were equivalent to those of the thermal oxide film of the same thickness.

しかし、この方法は、基板Si表面を清浄化しても上層
SiO2とSi基板表面とが完全にはつながらず、界面にダン
グリングボンドが残り、このダングリングボントに起因
する界面準位が発生するという問題があった。界面準位
密度は熱酸化膜の場合に比べると約10倍多くMOSのゲー
ト酸化膜としては用いることができなかった。また、低
温成長であるため、SiO2中に空孔が多数存在し、この欠
陥に伴うリーク電流も100Å以下の膜厚では熱酸化膜に
比べて多く、問題であった。
However, this method is effective even if the surface of the substrate is cleaned.
There is a problem that SiO 2 and the surface of the Si substrate are not completely connected, dangling bonds remain at the interface, and an interface level is generated due to the dangling bond. The interface state density was about 10 times larger than that of the thermal oxide film and could not be used as the gate oxide film of MOS. Further, since it is grown at a low temperature, a large number of vacancies are present in SiO 2 , and the leakage current due to this defect is large at a film thickness of 100 Å or less as compared with the thermal oxide film, which is a problem.

本発明の目的は、この様な従来の欠点を除去して、低
温形成でき、界面準位が少なく、欠陥に伴うリーク電流
が少ない酸化シリコン形成方法を提供することにある。
It is an object of the present invention to provide a method for forming silicon oxide which eliminates such conventional defects, can be formed at a low temperature, has a small interface state, and has a small leak current due to defects.

(課題を解決するための手段) 本発明は、真空槽内で清浄面を出した半導体上に、酸
素イオン(O-)および原子状酸素(O)のうち少なくと
も一方を照射することにより表面に第1シリコン酸化膜
を形成し、続けて同一真空槽内で第1シリコン酸化膜上
に薄いポリシリコン膜を形成し、酸素イオン(O-)およ
び原子状酸素(O)のうち少なくとも一方を照射するこ
とによりポリシリコン膜を酸化することを、所定の酸化
膜厚になるまで繰り返すことを特徴とするシリコン酸化
膜の形成方法である。
(Means for Solving the Problem) The present invention is directed to irradiating at least one of oxygen ions (O ) and atomic oxygen (O) on a surface of a semiconductor exposed on a clean surface in a vacuum chamber. A first silicon oxide film is formed, a thin polysilicon film is subsequently formed on the first silicon oxide film in the same vacuum chamber, and at least one of oxygen ions (O ) and atomic oxygen (O) is irradiated. This is a method of forming a silicon oxide film, characterized in that the oxidation of the polysilicon film is repeated until a predetermined oxide film thickness is obtained.

また第1シリコン酸化膜形成前に薄いポリシリコン膜
を形成しておきこのポリシリコン膜を同様にして酸化す
ること及び同じようにして薄いポリシリコン膜の形成と
その酸化を繰り返すことも本発明に含まれる。
It is also possible to form a thin polysilicon film before forming the first silicon oxide film, oxidize the polysilicon film in the same manner, and repeat the formation of the thin polysilicon film and the oxidation in the same manner. included.

(作用) 本発明の原理について説明する。従来の熱酸化では、
酸化はSiO2と基板Si結晶界面において起こっているた
め、酸素のSiO2中での拡散と基板結晶Siのバックボンド
を切るために多くのエネルギーを必要とし、これが酸化
温度と時間を決定している。第2図(a)に示すよう
に、表面側から分子状のSiと原子状酸素もしくは酸素イ
オンの少なくとも一方を供給すると、酸化はいつも表面
で起こり、しかも結晶を組んでいる基板Siのバックボン
ドを切る必要がないため、低温で酸化膜が形成できる。
しかし、以上のような酸化膜形成方法では低温でのSiO2
の堆積であるため、第2図(b)に示すように、基板Si
表面を清浄化しても上層SiO2とSi基板表面とが完全には
つながらず、界面にダングリングボンドが残り、このダ
ングリングボンドに起因する界面準位が発生する。ま
た、第2図(b)に示すようにSiO2中に空孔24が存在
し、この欠陥に伴うリーク電流も100Å以下の薄い膜厚
では熱酸化膜に比べて多い。
(Operation) The principle of the present invention will be described. In conventional thermal oxidation,
Oxidation takes place at the interface between SiO 2 and the substrate Si crystal, so much energy is required to diffuse oxygen in SiO 2 and break the back bond of substrate crystal Si, which determines the oxidation temperature and time. There is. As shown in Fig. 2 (a), when molecular Si and at least one of atomic oxygen and oxygen ions are supplied from the surface side, oxidation always occurs on the surface, and the back bond of the Si substrate forming the crystal Since it is not necessary to cut the oxide film, an oxide film can be formed at a low temperature.
However, with the above oxide film forming method, SiO 2 at a low temperature is
As shown in FIG. 2 (b), the substrate Si
Even if the surface is cleaned, the upper layer SiO 2 is not completely connected to the Si substrate surface, dangling bonds remain at the interface, and an interface level is generated due to the dangling bond. Further, as shown in FIG. 2 (b), there are pores 24 in the SiO 2 , and the leakage current due to this defect is larger in the thin film thickness of 100 Å or less than in the thermal oxide film.

そこで、本発明者は、第3図(a)に示すように予め
清浄化したシリコン基板表面に酸素イオンもしくは原子
状酸素を照射したところ、希薄な酸素雰囲気中でも、第
3図(b)に示すようにシリコン基板が酸化され表面に
SiO2が形成される事を見出した。この、SiO2は基板の酸
化によって形成されたものであり、膜質、界面状態とも
に熱酸化膜と同等である。しかし、SiO2の形成速度は、
SiO2が厚くなりSiO2中での酸素の拡散が律速する様にな
るとすぐに低下してしまい、20Å以上の膜厚の酸化膜の
形成ができなかった。現在、MOSトランジスタのゲート
酸化膜として使われている酸化膜の膜厚は60〜100Åで
あり、低温でさらに厚い膜の形成が必要である。
Therefore, when the present inventor irradiates the surface of a silicon substrate which has been cleaned in advance with oxygen ions or atomic oxygen as shown in FIG. 3 (a), it is shown in FIG. 3 (b) even in a dilute oxygen atmosphere. The silicon substrate is oxidized like this
It was found that SiO 2 was formed. This SiO 2 is formed by the oxidation of the substrate, and has the same film quality and interface state as the thermal oxide film. However, the formation rate of SiO 2 is
Will be diffusion of oxygen in SiO 2 becomes thick SiO 2 decreases as soon as it is as to the rate-limiting, can not form a 20Å or more thickness oxide film. Currently, the thickness of the oxide film used as the gate oxide film of a MOS transistor is 60 to 100Å, and it is necessary to form a thicker film at low temperatures.

そこで、本発明者は、第1図(a)に示すように、清
浄化したシリコン基板表面に、酸素イオンもしくは原子
状酸素を照射して20Å程度のSiO2を形成し、次に第1図
(b)に示すように、この上にシリコンの分子線を供給
して10Å程度のポリシリコン層を形成し、第1図(c)
に示すように、ふたたび酸素イオンもしくは原子状酸素
を照射してこのポリシリコン層を酸化すると合計40Åの
酸化膜が形成される事を見出した。この工程を繰り返せ
ば、SiO2中での酸素の拡散によって決定されてしまう膜
厚以上の厚い膜を低温で形成できる。ポリシリコンの膜
厚があまり厚いとそれを酸化して形成される酸化膜が厚
くなってしまい拡散律速の厚さになってしまうので、ポ
リシリコンは数10Å以下が望ましい。また、酸化膜の膜
厚は供給するシリコン分子線量によって決定されるため
に膜厚の制御性も極めて良い。この様な方法ならばたと
え室温で成長しても、耐圧、リーク電流、界面準位密度
共に熱酸化によって形成された酸化膜と同程度のものを
作ることができた。
Therefore, the present inventor, as shown in FIG. 1 (a), irradiates the cleaned silicon substrate surface with oxygen ions or atomic oxygen to form SiO 2 of about 20 Å, and then, as shown in FIG. As shown in (b), a molecular beam of silicon is supplied on this to form a polysilicon layer of about 10 Å, and FIG.
It was found that, when the polysilicon layer was oxidized again by irradiation with oxygen ions or atomic oxygen, a total oxide film of 40 Å was formed as shown in FIG. By repeating this process, it is possible to form a thick film at a low temperature which is equal to or larger than the film thickness determined by the diffusion of oxygen in SiO 2 . If the thickness of the polysilicon is too thick, the oxide film formed by oxidizing it becomes thick and the thickness becomes diffusion-controlled, so that the polysilicon is preferably several tens of liters or less. Further, since the film thickness of the oxide film is determined by the dose of silicon molecules to be supplied, the controllability of the film thickness is extremely good. With such a method, even if grown at room temperature, a withstand voltage, a leak current, and an interface state density could be made to be about the same as those of an oxide film formed by thermal oxidation.

本方法は、ECR照射して始めに基板を酸化する工程を
行わずにSi分子線を送り薄いポリシリコンを形成してか
らECRによる酸化を行えば、基板を酸化することなくSiO
2を形成することができるため、基板はSiである必要は
なく化合物半導体上でも同様な酸化膜が得られた。
In this method, if the Si molecular beam is sent to form thin polysilicon without performing the step of first oxidizing the substrate by ECR irradiation and then performing the oxidation by ECR, the substrate is not oxidized to form SiO 2.
Since 2 can be formed, the substrate need not be Si, and a similar oxide film was obtained on the compound semiconductor.

(実施例) 次に実施例について具体的に説明する。実験は40ccの
電子銃式Si蒸着器及び100WのECR型プラズマ源を備えたM
BE装置を用いて行った。試料ウエハーには4インチn型
Si(100)0.01〜0.02Ωcm基板を用いた。98℃CNH4OH系
洗浄液(NH4OH:H2O2:H2O=1:6:20)で基板を10分間洗
浄し、10分水洗した。乾燥後、形成室内に搬送し10Åの
a−Siを堆積後、800℃1分間加熱して清浄化して、成
長温度500℃でバッファ層であるエピタキシャル層を300
0Å成長した。基板温度を室温に下げた後、清浄面にECR
プラズマ源から酸素プラズマを照射して表面を約20Å酸
化した。この時、RHEEDパターンが清浄面を示す2x1から
アモルファスSiO2層が形成されていることを示すハロー
パターンに変化することを確認した。バッシベーション
膜形成室内の酸素分圧は5x10-5Torrであった。5x10-5To
rrにおける気体の平均自由工程は数10cmあるため雰囲気
中での反応は少なく、SiO2形成に関与する反応は表面上
で起こる。この後、基板温度を500℃に上げて電子銃式S
i蒸着器よりSi分子線を供給し、酸素プラズマによって
形成した酸化膜上に10Åのポリシリコン層を形成した。
この時、RHEEDパターンはハローパターンから多結晶シ
リコンが形成された事を示すリングパターンに変化する
事を確かめた。ふたたび、基板温度を室温に下げた後、
ポリシリコン表面にECRプラズマ源より酸素プラズマを
照射して20Åのポリシリコンを完全に酸化した。この
時、RHEEDパターンはリングパターンからハローパター
ンに変化した。
(Example) Next, an example will be specifically described. The experiment was a M equipped with a 40cc electron gun Si vaporizer and a 100W ECR type plasma source.
It was performed using a BE device. 4 inch n type for sample wafer
A Si (100) 0.01-0.02 Ωcm substrate was used. The substrate was washed with a CNH 4 OH-based cleaning solution (NH 4 OH: H 2 O 2 : H 2 O = 1: 6: 20) at 98 ° C. for 10 minutes and then washed with water for 10 minutes. After drying, it is transported to the forming chamber and 10Å of a-Si is deposited, then heated at 800 ℃ for 1 minute for cleaning, and the epitaxial layer which is the buffer layer is grown to 300 ℃ at the growth temperature of 500 ℃.
0Å grew up. ECR on the clean surface after lowering the substrate temperature to room temperature
Oxygen plasma was irradiated from the plasma source to oxidize the surface by about 20Å. At this time, it was confirmed that the RHEED pattern changed from 2x1 showing a clean surface to a halo pattern showing that an amorphous SiO 2 layer was formed. The oxygen partial pressure in the passivation film formation chamber was 5 × 10 -5 Torr. 5x10 -5 To
Since the mean free path of the gas at rr is several tens of cm, there are few reactions in the atmosphere, and the reactions involved in SiO 2 formation occur on the surface. After this, the substrate temperature was raised to 500 ° C and the electron gun type S
A Si molecular beam was supplied from the i-depositor to form a 10Å polysilicon layer on the oxide film formed by oxygen plasma.
At this time, it was confirmed that the RHEED pattern changed from a halo pattern to a ring pattern indicating that polycrystalline silicon was formed. Once again, after lowering the substrate temperature to room temperature,
The surface of the polysilicon was irradiated with oxygen plasma from an ECR plasma source to completely oxidize the 20Å polysilicon. At this time, the RHEED pattern changed from the ring pattern to the halo pattern.

はじめに、形成された酸化膜の界面準位を調べるため
にMOSキャパシターを試作しCV測定(ターマン法)によ
り界面準位密度を求めた。第1表に分子状のSiと酸素プ
ラズマを同時に供給した従来例の場合と、酸素プラズマ
による酸化とポリシリコンの堆積を繰り返した場合及び
熱酸化の場合の界面準位の比較を示す。酸化膜の膜厚は
60Åであった。
First, in order to investigate the interface states of the formed oxide film, a MOS capacitor was prototyped and the interface state density was obtained by CV measurement (Turman method). Table 1 shows a comparison of interface states in the case of the conventional example in which molecular Si and oxygen plasma are simultaneously supplied, in the case of repeating oxidation by oxygen plasma and deposition of polysilicon, and in the case of thermal oxidation. The thickness of the oxide film is
It was 60Å.

表1からわかる様に、分子状のSiと酸素プラズマを同
時に供給した場合には、1012〜1013cm-2であった界面準
位が、酸素プラズマによる酸化とポリシリコンの堆積を
繰り返した場合には約1桁下がり1011cm-2となり、ほぼ
熱酸化膜と同程度まで界面準位密度を下げることができ
た。第4図は同サンプルのI−V測定の結果である。リ
ーク電流は酸素プラズマとSi分子線を用いて形成した膜
(c)では膜中に存在する空孔の影響により多いが、酸
素プラスマによる酸化とポリシリコンの堆積を繰り返し
て形成した膜(b)では、熱酸化膜(a)と同じく欠陥
が少なく、リーク電流も少ないことがわかった。
As can be seen from Table 1, when molecular Si and oxygen plasma were simultaneously supplied, the interface state, which was 10 12 to 10 13 cm -2 , was repeatedly oxidized by oxygen plasma and deposited with polysilicon. In this case, it decreased by about one digit to 10 11 cm -2 , and the interface state density could be reduced to almost the same level as the thermal oxide film. FIG. 4 shows the result of IV measurement of the same sample. The leak current is large in the film (c) formed by using oxygen plasma and Si molecular beam due to the influence of the vacancies existing in the film, but the film formed by repeating the oxidation by oxygen plasma and the deposition of polysilicon (b) Then, it was found that, like the thermal oxide film (a), it had few defects and a small leak current.

最後に、本方法で形成したSiO2/Si界面の平坦正を評
価するためにSi(100)面上に500℃で3000Åのエピタキ
シャルバッファー層を成長後、酸素プラズマによる酸化
とポリシリコンの堆積を繰り返して50ÅのSiO2を形成し
界面の断面格子像を観察した。MBEでバッファー層を成
長しているため界面は極めて平坦であり、界面の乱れは
通常のSi(100)ウエハーを用いた場合、数100Åごとに
観察される1原子層ステップだけであった。これはもと
のMBE成長バッファー層上に存在するものである。この
1原子層ステップの密度はウエハー表面の傾きに依存
し、正確にjust面を使った場合、数1000Åの平坦なテラ
スを得ることができた。
Finally, in order to evaluate the flatness of the SiO 2 / Si interface formed by this method, after growing a 3000Å epitaxial buffer layer on the Si (100) surface at 500 ° C, oxidation by oxygen plasma and deposition of polysilicon were performed. By repeatedly forming 50 Å SiO 2 , the cross-sectional lattice image of the interface was observed. Since the buffer layer was grown by MBE, the interface was extremely flat, and the disorder of the interface was only one atomic layer step observed every several hundred Å when using a normal Si (100) wafer. This is what is on the original MBE growth buffer layer. The density of this one atomic layer step depends on the inclination of the wafer surface, and when the just surface is used accurately, a flat terrace of several thousand Å could be obtained.

なお、本実施例ではシリコンウエハーを対象とした
が、本発明の方法は表面にのみシリコンが存在するSOS
(Silicon on Sapphire)基板や更に一般にSOI(Silico
n on Insulator)基板等にも当然適用できる。また、本
方法は、Siも表面側から供給するために、本質的に基板
はSiである必要はなく、化合物半導体上でも同様に良質
な酸化膜が得られることを確認した。
In this example, a silicon wafer was used, but the method of the present invention is applied to an SOS in which silicon exists only on the surface.
(Silicon on Sapphire) substrates and more generally SOI (Silico on Sapphire)
n on Insulator) Of course, it can also be applied to substrates and the like. Further, in this method, since Si is also supplied from the surface side, it is not necessary that the substrate is essentially Si, and it was confirmed that a good oxide film can be similarly obtained on the compound semiconductor.

また、本実施例では酸化のためにECRプラズマ源から
の酸素イオン(O-)と原子状酸素(O)を両方用いた
が、これに限る必要はない。酸素イオン(O-)を照射し
たいときはプラズマ源から電極を用いてO-イオンのみを
引き出し他の成分を排気し、原子状酸素(O)を照射し
たいときはプラズマ源から電極を用いてイオン成分を除
去した後、基板に照射すれば良いことは明らかである。
なおECRプラズマ源からの酸素プラズマには、O-、Oの
他に酸素分子(O2)も含まれているが、本発明では低温
で酸化するのでO2は酸化にはほとんど寄与しない。
Further, in the present embodiment, both oxygen ions (O ) and atomic oxygen (O) from the ECR plasma source were used for oxidation, but the present invention is not limited to this. Oxygen ions (O -) using the electrode from the plasma source when desired to be irradiated with O - only exhausting the other ingredients pull the ions, using an electrode from the plasma source when desired to be irradiated with atomic oxygen (O) ions It is clear that the substrate may be irradiated after removing the components.
Oxygen plasma from the ECR plasma source contains oxygen molecules (O 2 ) in addition to O and O. However, in the present invention, the oxygen plasma oxidizes at a low temperature, so O 2 hardly contributes to the oxidation.

(発明の効果) 以上、詳細に述べた通り本発明によれば、室温で、電
気的に熱酸化膜と同等な界面準位の極めて少ない酸化膜
の形成を行うことができる。
(Effects of the Invention) As described in detail above, according to the present invention, it is possible to form an oxide film having an extremely small interface state electrically equivalent to a thermal oxide film at room temperature.

【図面の簡単な説明】[Brief description of drawings]

第1図は、本発明方法の原理の概念図、第2図は、従来
技術の原理の概念図、第3図は、従来技術の原理の概念
図、第4図は、I−V特性のSiO2形成方法依存性を示す
図である。
FIG. 1 is a conceptual diagram of the principle of the method of the present invention, FIG. 2 is a conceptual diagram of the principle of the conventional technique, FIG. 3 is a conceptual diagram of the principle of the conventional technique, and FIG. 4 is an IV characteristic diagram. is a diagram illustrating a SiO 2 forming method dependent.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】真空槽内で清浄面を出した半導体上に、酸
素イオン(O-)および原子状酸素(O)のうち少なくと
も一方を照射することにより表面に第1シリコン酸化膜
を形成し、続けて同一真空槽内で第1シリコン酸化膜上
に薄いポリシリコン膜を形成し、酸素イオン(O-)およ
び原子状酸素(O)のうち少なくとも一方を照射するこ
とによりポリシリコン膜を酸化することを、所望の酸化
膜厚になるまで繰り返すことを特徴とする酸化シリコン
膜の形成方法。
1. A semiconductor having a clean surface in a vacuum chamber is irradiated with at least one of oxygen ions (O ) and atomic oxygen (O) to form a first silicon oxide film on the surface. Then, a thin polysilicon film is continuously formed on the first silicon oxide film in the same vacuum chamber, and the polysilicon film is oxidized by irradiating at least one of oxygen ions (O ) and atomic oxygen (O). A method for forming a silicon oxide film, characterized in that the above steps are repeated until a desired oxide film thickness is obtained.
【請求項2】第1シリコン酸化膜形成前に薄いポリシリ
コン膜を形成し、酸素イオン(O-)および原子状酸素
(O)のうち少なくとも一方を照射して前記ポリシリコ
ン膜を酸化して第1シリコン酸化膜を形成する請求項1
に記載の酸化シリコン膜の形成方法。
2. A thin polysilicon film is formed before forming a first silicon oxide film, and the polysilicon film is oxidized by irradiating at least one of oxygen ions (O ) and atomic oxygen (O). The first silicon oxide film is formed.
A method for forming a silicon oxide film according to item 1.
JP34031089A 1989-12-28 1989-12-28 Method for forming silicon oxide film Expired - Fee Related JPH088251B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34031089A JPH088251B2 (en) 1989-12-28 1989-12-28 Method for forming silicon oxide film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34031089A JPH088251B2 (en) 1989-12-28 1989-12-28 Method for forming silicon oxide film

Publications (2)

Publication Number Publication Date
JPH03201434A JPH03201434A (en) 1991-09-03
JPH088251B2 true JPH088251B2 (en) 1996-01-29

Family

ID=18335723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34031089A Expired - Fee Related JPH088251B2 (en) 1989-12-28 1989-12-28 Method for forming silicon oxide film

Country Status (1)

Country Link
JP (1) JPH088251B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5443863A (en) * 1994-03-16 1995-08-22 Auburn University Low-temperature oxidation at surfaces using ozone decomposition products formed by microwave discharge
JP2013254794A (en) * 2012-06-05 2013-12-19 Fujitsu Ltd Manufacturing method of oxide film

Also Published As

Publication number Publication date
JPH03201434A (en) 1991-09-03

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