JPH0320436U - - Google Patents

Info

Publication number
JPH0320436U
JPH0320436U JP7952589U JP7952589U JPH0320436U JP H0320436 U JPH0320436 U JP H0320436U JP 7952589 U JP7952589 U JP 7952589U JP 7952589 U JP7952589 U JP 7952589U JP H0320436 U JPH0320436 U JP H0320436U
Authority
JP
Japan
Prior art keywords
semiconductor device
photoresist
impurity
view
main part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7952589U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7952589U priority Critical patent/JPH0320436U/ja
Publication of JPH0320436U publication Critical patent/JPH0320436U/ja
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図AおよびBはこの考案を電界効果型のp
−MOSに適用した第1実施例を示し、第1図A
はその露光工程を示す要部拡大断面図、第1図B
はイオンの打込み工程を示す要部拡大断面図、第
2図AおよびBはpn接合の半導体装置に適用し
た第2実施例を示し、第2図Aはその露光工程を
示す要部拡大断面図、第2図Bはイオンの打込み
工程を示す要部拡大断面図、第3図は従来のpn
接合の半導体装置のイオン打込み工程を示す断面
図である。 10……シリコン基板、17……フオトレジス
ト、19……フオトレジストの除去部分、20…
…壁面、21……p型領域。
Figures 1A and B show this idea in a field-effect type p
- Fig. 1A shows the first embodiment applied to MOS.
Figure 1B is an enlarged cross-sectional view of the main part showing the exposure process.
2 is an enlarged sectional view of the main part showing the ion implantation process, FIGS. 2A and B show a second embodiment applied to a pn junction semiconductor device, and FIG. 2A is an enlarged sectional view of the main part showing the exposure process. , FIG. 2B is an enlarged sectional view of the main part showing the ion implantation process, and FIG. 3 is a conventional PN
FIG. 3 is a cross-sectional view showing an ion implantation process for a semiconductor device with a junction. 10...Silicon substrate, 17...Photoresist, 19...Removed portion of photoresist, 20...
...Wall surface, 21...p-type region.

Claims (1)

【実用新案登録請求の範囲】 フオトレジストを部分的に除去し、この除去し
た部分から不純物が打込まれた半導体装置におい
て、 前記フオトレジストが前記不純物の打込み角度
とほぼ同じ角度の傾斜面をもつて除去されている
ことを特徴とする半導体装置。
[Claims for Utility Model Registration] A semiconductor device in which a photoresist is partially removed and an impurity is implanted from the removed portion, wherein the photoresist has an inclined surface having approximately the same angle as the implantation angle of the impurity. A semiconductor device characterized in that the semiconductor device is removed by
JP7952589U 1989-07-07 1989-07-07 Pending JPH0320436U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7952589U JPH0320436U (en) 1989-07-07 1989-07-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7952589U JPH0320436U (en) 1989-07-07 1989-07-07

Publications (1)

Publication Number Publication Date
JPH0320436U true JPH0320436U (en) 1991-02-28

Family

ID=31623757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7952589U Pending JPH0320436U (en) 1989-07-07 1989-07-07

Country Status (1)

Country Link
JP (1) JPH0320436U (en)

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