JPH03210620A - Key input device - Google Patents

Abstract

PURPOSE:To prevent the output of radiant noise of high frequencies to the outside with no deterioration of the response performance of key operation by taking out each key signal that has a level change only with operation of a key for each key and coding these key signals with priority. CONSTITUTION:When a key code is outputted from a code generating part 6, a key action detecting circuit 8 works to send a latch signal to a latch circuit 7 and also to send an interruption to a microprocessor 14. Thus the circuit 7 latches the applied key code, and the microprocessor 14 reads the key coded latched by the circuit 7. Meanwhile a key signal generating circuit 2, the part 6, etc., keep their static states as long as no key operation is carried out. Thus no radiant noise is outputted to the outside. As a result, the output of the radiant noise having high frequencies can be prevented to the outside without deteriorating the response performance of key operations.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a key input device in which a microprocessor reads the key code of each key arranged on an operation panel, and in particular, the present invention relates to a key input device in which a microprocessor reads the key code of each key arranged on an operation panel. The present invention relates to a key input device that is useful in measurement devices whose performance is affected by internal and external radiation noise because the key code of the key can be read statically.

[Prior Art] A key input device for reading the key code of an operated key from a keyboard having a large number of keys is configured as shown in FIG. 4, for example. Signal lines are wired vertically and horizontally for each key arranged in a matrix, and contacts that respond to key operations are interposed at the intersections of each signal line. Then, scanning signals ROI to ROV7 are outputted from the keyboard control circuit 1 via the decoder circuit 2 to, for example, each horizontal signal line 3 at preset time intervals. At the same time, the detection signals COLUMO to COLU of each signal line 4 in the vertical direction are
Decode M7 to identify the operated key.

When the operated key is specified, the keyboard control circuit 1 sends an interrupt signal IRQ to the MPU (microprocessor) 5.

Upon receiving the interrupt signal IRQ, the MPU 5 reads the key code latched in the keyboard control circuit 1.

[Problems to be Solved by the Invention] However, the key input device shown in FIG. 4 still has the following problems to be solved.

That is, in order to improve the response performance of key operations, the scanning signal ROVO~ output from the keyboard control circuit 1 is
It is necessary to shorten the time interval of ROW7.

In a typical personal computer, this time interval is on the order of a few aS. In this way, regardless of whether the operator presses or releases a key, the TTL level scanning signal RO is always sent at the above-mentioned time interval on the keyboard.
Outputs VO to ROV7. Therefore, this scanning signal ROWO-ROV7 and the detection signal COLLIMO
~COLUM7 is constantly being electromagnetically radiated to the surroundings as radiation noise.

On the other hand, also in a measuring device for detecting weak radio waves in the air, a large number of keys are provided on the operation panel in order to set various 71-1 fixed conditions and execute measurement operations.

Therefore, when the key input device shown in FIG. 4 described above is incorporated into this measurement device in order to monitor the key operation status of each key arranged on this operation panel, the scanning signal ROvO ~ROw7 and detection signal CO
LUMO~COLUM71: Due to radiation noise mixed in,
A problem arises in which the measurement accuracy of the entire measuring device is reduced.

Additionally, there is a concern that the radiation noise will have a negative effect on other measuring instruments.

The present invention was made in view of these circumstances, and
By extracting a key signal whose level changes only when the key is pressed for each key, prioritizing this key signal, and converting it into a key code, high-frequency radiation noise is output to the outside without degrading the response performance of key operations. It is an object of the present invention to provide a key input device that can prevent users from being

[Means for Solving the Problems] In order to solve the above problems, the key input device of the present invention has a plurality of keys and a dedicated output line for each key, and a key input device for on/off operation of each key. A key signal generating section outputs each key signal whose level changes in response, and the key signal output from this key signal generating section is converted into a key code and outputted, and when multiple key signals change in level, it is set in advance. A code generation section that outputs the key code of the key with the highest priority priority and prevents the input of the key signal with the lowest priority order, and a latch signal in response to the key code output from this code generation section. and a key operation detection circuit that outputs an interrupt signal, a latch circuit that latches the key code output from the code generator in response to the latch signal output from the key operation detection circuit, and a key operation detection circuit that outputs an interrupt signal. The apparatus includes a microprocessor that reads a key code latched in a latch circuit in response to an output interrupt signal.

[Operation] According to the key input device configured in this way, when a key is operated, a key code corresponding to the key is outputted from the code generating section and applied to the latch circuit. When the key code is output from the code generator, the key operation detection circuit is activated and sends a latch signal to the latch circuit and an interrupt signal to the microprocessor.

Therefore, the latch circuit latches the applied key code, and the microprocessor reads the key code latched by the latch circuit.

Conversely, unless a key is operated, the key signal generating circuit, code generating section, etc. maintain a static state, so they do not output radiation noise to the outside.

Furthermore, when multiple keys are operated at the same time, the key code corresponding to the key with a higher priority is output preferentially, thereby preventing important key operation errors.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing a key input device according to an embodiment. For example, 63 key signals whose level changes in response to the on/off operation of each key 1 are generated by a priority encoder 3. from a key signal generation circuit 2 built into an operation panel on which 63 keys 1 are arranged. Bit detection circuit 4 and digit detection circuit 5
The code is inputted to a code generation section 6 consisting of. Code generation section 6
One key code consisting of 6 bits (3 bits from the bit detection circuit 4 and 3 bits from the digit detection circuit) corresponding to the operation key outputted from the latch circuit 7 is applied to the latch circuit 7. Also,
The 6-bit key code output from the code generator 6 is input to the key operation detection circuit 8.

The 6-bit key code inputted to the key operation detection circuit 8 is decoded into 3 bits by the decoder circuit 9, and the 6-bit key code is input to each level change detection circuit 14). 11. Input to 12. The level change detection signal output from any one of the level change detection circuits 14) and 11.12 is transmitted to the interrupt signal generation circuit 13.
It is converted into a 1-bit interrupt signal i and applied to the interrupt terminal INT of the MPU (microprocessor) 14, and is also sent out as a latch signal to the latch circuit 7.

The latch circuit 7 to which the latch signal is input latches the key code applied from the code generator 6. Also,
The MPU 14 to which the interrupt signal i has been input reads the key code latched by the latch circuit 7. Then, for example, measurement conditions corresponding to the read key code are set in the measurement unit 15 and stored in the storage unit 16.

FIG. 2(a) shows the key signal generating section 2 and the code generating section 6.
FIG. In the key signal generation circuit 2, a voltage of 5 is applied to one end of each of the 63 contacts 2a, which are closed by the pressing operation of each of the 63 keys 1, through a resistor 2b.
v is applied, and the other end is grounded. Therefore, when one key 1 is pressed down, the key signal of the corresponding key becomes L level, and when this key 1 is released, it returns to H level.

The 63 key signals output from the key signal generation circuit 2 are divided into 8 groups, each of which is connected to 8 priority encoders (IC element number 7411C14g) 3 in series, which constitute the priority encoder 3 of the code generation section 6.
It is input to the respective input terminals DO to p7 of a to 3h. Each encoder 3a-3h has the same configuration, converts 8-bit data inputted to input terminals DO-D7 into 3-bit data, and outputs it from output terminals AO-A2. That is, when one key signal goes to L level, that key signal can be specified by 3-bit data. In addition, in the encoders 38 to 3h, when a plurality of key signals change to L level at the same time, the input terminals DO to
It is assumed that only the key signal of the input terminal with the larger number D7 has changed to the L level, and this key signal is outputted as 3-bit data from the output terminals AO to A2. Also,
When the bit data of the key-operated key signal is output from the output terminal AO-A2, an H level signal is output from the output terminal EO, and an L level signal is output from the signal detection terminal SG.

Further, the H level signal outputted from each output terminal EO of the encoders 38 to 3h is inputted as a Hay enable signal to the input terminal E1 of the encoders 3a to 3h, into which the key signal of the key with the lower priority located on the left side is inputted. . Therefore,
The right encoder has a higher priority than the left encoder. Therefore, when keys are operated at the same time, the higher the key number, the higher the priority. Therefore, for example, the 63rd key signal has the highest priority, and the 1st key signal has the lowest priority.

Further, the lowest input terminal DO of the encoder 3a having the lowest priority is connected to the +5■ power supply, and key signal input is prohibited.

Low (L) of each output terminal AO of each encoder 38 to 3h
The active output signal constitutes the bit detection circuit 4.
It is input to (or game) 4a which has an input terminal, and similarly,
The output signal of each output terminal A1 of each encoder 38 to 3h is input to the OR gate 4b of the bit detection circuit 4, and the output signal of each output terminal A2 of each encoder 3a to 3h is input to the OR gate 4C of the bit detection circuit 4. be done. As mentioned above, each key signal from No. 1 to No. 63 is prioritized, so the eight output signals input to each OR gate 48 to 4c do not go to L level at the same time. That is, this bit detection circuit 4 detects a 3-bit bit signal indicating which key signal among the eight key signals inputted to each input terminal AO to A7 of each encoder 38 to 3h has changed to L level. Output.

Further, the signals output from the signal detection terminals SG of each of the encoders 3a to 3h are inputted to each input terminal DO-D7 of a digit detection circuit 5 having the same configuration as each of the encoders 3a to 3h. In this case, since L level signals are not output simultaneously from the signal detection terminals SG of the plurality of encoders 3a to 3h, the 3-bit digit signal indicating which encoder 38 to 3h has sent out the L level signal is Output terminal AO
, AI, and A2. Further, the output signal of the signal detection terminal SG of the digit detection circuit 5 is inverted in level by the inverter 5a and sent to the latch circuit 7.

The 3-bit bit signal output from the bit detection circuit 4 and the 3-bit digit signal output from the digit detection circuit 5 are input to each input terminal AO to A2 . Applied to A3 to A5. In other words, the total of the bit signal and digit signal is 6.
Key signals of keys 1 to 63 can be specified using bits. Therefore, with this 6-bit signal, each key 1
can identify the key code given to it. Further, this 6-bit signal is input to a decoder circuit 9 within the key operation detection circuit 8.

FIG. 2(b) shows the key operation detection circuit 8 and the MPU 14.
FIG. 3 is a detailed circuit diagram showing the key operation detection circuit 8.
and a time chart showing the operation of the MPU 14.

The decoder circuit 9 compresses the 6-bit signal input to the input terminals D1 to D6 into a 3-bit signal and outputs the compressed signal to the output terminals AO,
Output from AI and A2. Each output terminal AO, AI, A2
Each output signal outputted from the circuit is input to a level change detection circuit 12.11.14).

Each level change detection circuit 12, 11.14) is a circuit that detects a change in the signal level of an input signal. For example, in the level change detection circuit 12, an inverter 12a, an exclusive logic axis gate) 12b, D type flip-flop 12C. That is, as shown in FIG. 3, the output signal a of the output terminal AO of the decoder 9
For example, at time t. When the output signal of the inverter 12a changes to L level, the time of change of the output signal of the inverter 12a is at the time t depending on the response characteristics and the like. slightly later than that. Therefore, a pulse signal C having a time width corresponding to the delay time is applied from the exclusive logic axis gate 12b to the clock terminal of the flip-flop 12c. As a result, the level change detection signal d of L level is output from the flip-flop 12c to the interrupt signal generation circuit 1.
3) is sent to 13b. Other level change detection circuits 11.14) perform the same operation.

Level change detection signal e output from OR gate 13a
is input to the monostable circuit 13b. When the level change detection signal e is input to the monostable circuit 13b, a specified time Ts determined by a time constant circuit of a resistor and a capacitor starts from the input time.
The signal f which becomes L level by (=lO Kasumi S) is sent to the clock terminal of the next flip-flop 13c. The flip-flop 13c is connected to the single-chamber circuit 13b for a specified time T,
The level change detection signal g delayed by
Apply as a latch signal.

Note that the specified time T set in the monostable circuit 13b
s is provided to prevent a malfunction by distinguishing a signal level change due to chattering that occurs when a key is operated from a signal level change caused by the next key operation.

Thus, the OR gate 13a, the monostable circuit 13b, the flip-flop 13C1, and the OR gate 13d output a latch signal and an interrupt signal i in response to the level detection signal output from the level change detection circuit 14), 11°12. An interrupt signal generation circuit 13 is configured.

When a latch signal is input to the latch terminal LE, the latch circuit 7 latches the 6-bit signal consisting of the bit signal and digit signal applied to the input terminals AO-A5 as a key code.

Read/write (R) of MPU 14 in response to interrupt signal 1 input
The H level read signal j outputted from the /W) terminal is inverted in level by the inverter 15a, and then outputted from the AND gate 15b.
is input to. A panel selection signal (PEL) k for selecting an operation panel output from the MPU 14 is input to the other input terminal of the AND gate 15b. Therefore, the time t when the panel selection signal (PEL) k changes to L level
At step 2, the selection terminal OE of the latch circuit 7 becomes L level.

The MPU 14 then reads the key code latched by the latch circuit 7 via the data bus.

At the same time that the read signal j is applied to the selection terminal OE of the latch circuit 7, this read signal is applied to each flip-flop 14)c, llc of the key operation detection circuit 8.

Clear the set status of 12c and 13c. Then, the interrupt signal i is returned to the original H level.

After the key code reading process by the MPU 14 is completed,
When the panel selection signal (PEL) k returns to the H level at time t3, the latch signal also returns to the original H level.

When the pressed key is released at time t4, the output signal a corresponding to the corresponding key output from the decoder circuit 9 rises from the L level to the H level. and,
A level detection circuit 12 detects a signal level change at the time of rise. Therefore, the subsequent interrupt signal generation circuit 13
Each circuit 13a.

The operations of 13b, 13c, and 13d are performed when the output signal a is at time t. The key code of the corresponding key is read by the MPU 14 in the same procedure as when the key is turned off.

In the key input device configured in this way, when any key 1 arranged on the operation panel is pressed, the corresponding key 1
The key code is read by the MPU 14. Further, when the pressed state of the corresponding key 1 is released, the key code of the released corresponding key is read by the MPU 14 at the time of release.

That is, the code generation section 6. Each component that makes up the key input device, such as the key operation detection circuit 8 and the latch circuit 7, operates only when the key 1 is operated, and performs the same operation while the operator is not performing any key operation. It remains completely static. Therefore, since the scanning signal is not constantly outputted at fixed time intervals as shown in FIG. 4, no radiation noise is emitted to the outside. Therefore,
Even if this key input device is incorporated into a measuring device that measures weak radio waves, no noise will be mixed into the 71-1 constant results, so the measurement accuracy can be greatly improved.

Furthermore, since no radiated noise radio waves are output, it is possible to prevent adverse effects on other measuring instruments.

In addition, since the priority encoder 3 is adopted as the code generation unit 6, the various keys arranged on the operation panel are prioritized, and for example, when an important key and a less important key are pressed at the same time, Only important keys are accepted with priority. Therefore, important key operation mistakes can be prevented.

Furthermore, a voltage of +5V is applied to the input terminal DO at the lowest rank in the encoder 3a at the lowest rank constituting the priority encoder 3, and the input terminal DO is forcibly set to H level, thereby prohibiting key signal input. ing. In other words, the key signals of all keys including the lowest order are sent to the priority encoder 3.
If the key is connected to each input terminal of
is applied. When the interrupt signal i is input, the MPU 14
reads the key code latched in the latch circuit 7 unconditionally. However, if the key is not pressed,
If a key with number 0 exists and the key with number 0 is used as a key switch, the key code that is not pressed and the state where the key is pressed will be the same key code.

Therefore, it is not possible to determine whether the key is not pressed. Therefore, encoder 3a corresponding to key number 0
The input terminal DO is disabled, and when the key code corresponding to key number 0 is read, it is determined that the key is not pressed.

[Effects of the Invention] According to the key input device of the present invention as described above, each key signal that is leveled only when the key is operated is extracted for each key, and each key signal is prioritized and coded. By doing so, it is possible to prevent high-frequency radiation noise from being output to the outside without degrading the response performance of key operations, and it is possible to prevent high-frequency radiation noise from being output to the outside. It is possible to prevent an adverse effect on the functions that the device is trying to perform. In particular, this is an H effect for measurement devices that are susceptible to radiation noise.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a key input device according to an embodiment of the present invention, FIGS. 2(a) and 2(b) are detailed circuit diagrams of the same embodiment, and FIG. 3 is a detailed circuit diagram of the same embodiment. A time chart showing the operation, and FIG. 4 is a block diagram showing a conventional key input device. 1...Key 2...Key signal generation circuit, 3...Priority encoder, 4...Bit detection circuit, 5...
Digit detection circuit, 6... Code generation section, 7... Latch circuit,... Key operation detection circuit, 9... Decoder circuit, 14)゜2... Level change detection circuit, 3... Interrupt signal generation circuit, 14...MPU.

Claims (1)

[Claims] a plurality of keys (1), a key signal generator (2) having a dedicated output line for each key and outputting each key signal whose level changes in response to the on/off operation of each key; The key signal output from this key signal generating section is converted into a key code and outputted, and when the level of multiple key signals changes, the key code of the key with the higher priority set in advance is output preferentially, and the priority a code generation section (6) which prohibits input of the lowest key signal; and a key operation detection circuit (8) which outputs a latch signal and an interrupt signal in response to the key code output from the code generation section. A latch circuit (7) that latches the key code output from the code generation section in response to the latch signal output from the key operation detection circuit; and a microprocessor (14) for reading the key code latched in the latch circuit.