JPH03211679A - Designing method for logic circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a method for designing a logic circuit, more specifically, to a method for creating a logic circuit pattern based on a combination of a plurality of basic logic elements constituting peripheral circuits of a main circuit. When designing, it is possible to prevent the omission of detailed functions and simple design mistakes due to repetition of simple tasks such as placement of basic logic elements and drawing wiring, and to significantly reduce the number of man-hours in the logic design stage. The purpose of this paper is to provide a method for designing logic circuits that can be developed and developed, and based on the required logic information, the layout of basic logic elements that constitute peripheral circuits connected between the main circuit and external terminals. In a logic circuit design method in which data and logic connection data are created, a display including all types of basic logic elements that can configure peripheral circuits prepared in advance for each external terminal is displayed. By specifying a desired basic logic element, the desired basic logic element is selected for each external terminal, and the basic logic element and each external terminal are connected.

[Industrial Application Field] The present invention relates to a method of designing a logic circuit, and more particularly to a method of creating a peripheral circuit connected between a main circuit and an external terminal by combining basic logic elements.

In recent years, as LSIs have become more highly integrated and their life cycles have become shorter, it has become necessary to design and manufacture higher performance LSIs in a shorter period of time. Therefore, there is a need for a means for easily and speedily inputting user-created logical information, which is increasing in number.

[Prior Art] Conventionally, for example, ROM (read only memory), RAM (random access memory), PL as shown in FIG.
Memory circuit 1 such as A (programmable logic array)
When designing a peripheral circuit with main circuits as shown in FIG. Ex-OR circuit 4. After placing the basic logic elements such as the D flip-flop circuit 5, connect the basic logic elements or cells by moving the cursor to the line start position, line bend position, and line end point. It was like that.

[Problems to be Solved by the Invention] The above design method is suitable for designing complex logic circuits with no regularity or designing logic circuits in which the same pattern is repeated. However, in a logic design where the circuit configuration is slightly different even though the same pattern is repeated, such as the design of a logic circuit including a memory circuit 1 such as ROM, RAM, or PLA, input/output buffers, encoders, decoders, etc. The basic logic elements, cells, etc. used in the peripheral circuits are fixed to some extent, but others are a combination of basic logic elements. Therefore, designers have to repeat the simple work and modification of combinations of basic logic elements to proceed with the design of peripheral circuits, resulting in frequent omission of detailed functions and simple input errors, leading to an increase in design man-hours for simple work. There is a problem.

The present invention has been made to solve the above problems, and its purpose is to design logic circuits by repeatedly performing simple tasks such as arranging basic logic elements and drawing wiring, etc. The object of the present invention is to provide a logic circuit design method that can prevent simple design mistakes, greatly reduce the number of man-hours in the logic design stage, and achieve short-term LSI development.

[Means for solving the problem] Based on required logic information, layout data and logic connection data of basic logic elements constituting a peripheral circuit connected between a main circuit and an external terminal are created. In a logic circuit design method, by displaying a display including all types of basic logic elements that can form a peripheral circuit prepared in advance for each external terminal, and specifying a desired basic logic element from the display. A desired basic logic element is selected for each external terminal, and the basic logic element and each external terminal are connected.

[Function] By displaying a display that includes all the types of basic logic elements that can form a peripheral circuit prepared in advance for each external terminal, and specifying a desired basic logic element from the display, each external terminal can be The desired basic logic elements are selected for each, and the connections are made between the basic logic elements and each external terminal. Function leakage,
Simple design mistakes and the like are prevented, thereby greatly reducing the number of man-hours in the logic design stage, and facilitating short-term development of LSIs.

[Embodiment 1] An embodiment in which the present invention is applied to the logic design of a peripheral circuit whose main circuit is a memory circuit will be described in detail below with reference to FIGS. 1 to 5.

In order to design a logic circuit consisting of logic information created by a user as shown in FIG. 6, first, as shown in FIG. 3. Ex-OR circuit 4. A basic logic element such as a D flip-flop circuit 5 is divided with respect to the external terminal 2.

Next, as shown in FIG. 2, on the screen of the CAD (computer-aided design) device, a memory circuit 1, a plurality of external terminals T1 allocated to the left side of the memory circuit 1, and a plurality of external terminals Tr allocated to the right side of the memory circuit 1 are displayed. In addition to displaying the pattern, an operation instruction menu H is also displayed. In this state, operate the cursor movement key in the upward arrow direction according to the operation instruction menu H to move the cursor to the desired external terminal T!
For example, use the "rCR" key to connect the external terminal T.
I! , 8.

When the external terminal Tffi8 is selected, a macro selection menu M is newly displayed on the face of the CAD device as shown in FIG. From this menu M, move the cursor to rPR
When moved to OGRAMJ and selected by operating the "CR" key, all basic logic elements that can configure the peripheral circuits of the memory circuit 1, such as the inverter 3 and the Ex-OR circuit 4, are displayed on the screen as indicated by the thick line frame. ．． D flip-flop circuit 5, flip-flop circuit 6□ three-state buffer 7, etc., and output enable terminal OE.

A pattern including candidate terminals of the external terminal T18, such as the OR input terminals ORI, OR2, and the AND input terminal AN, and part of the wiring information is displayed.

In this state, the cursor is moving between a pair of basic logic elements within the thick line frame shown in FIG. (or downward) to change the wiring route sequentially, and when the desired route is reached, press rCR.
Operate the J key to connect both circuits 4 and 6. Incidentally, a state is shown in which the connection between the inverter 3 and the three-state buffer 77 has already been completed. Then, the wiring is determined within this thick line frame, and the external terminal TP8 is the output enable terminal OE, the OR input terminal ORI, the AND input terminal A
When either N is determined, the thick line frame pattern shown in FIG. 4 disappears, and the cursor moves to the external terminal Tffi9 shown in FIG. 2.

FIG. 5 is a flowchart showing the design process in this embodiment, and as long as there are unprocessed external terminals, basic logic elements and connections are determined in the same manner as above.

As described above, in this embodiment, the inverter 3 . Ex-OR circuit 4°D flip-flop circuit5. Flip-flop circuit6. Displays a pattern that includes basic logic elements such as the three-state buffer 77, candidate terminals for the external terminal Tj28 such as the output enable terminal OE, OR input terminals ○R1, OR2, AND input terminal AN, and part of the wiring information. The desired basic logic element is selected by determining the connection between a pair of basic logic elements or between a basic logic element and a terminal. It is possible to significantly reduce the number of man-hours in the logical design stage by preventing omission of detailed functions and simple design mistakes due to repeated simple tasks such as
It is possible to develop SI in a short period of time.

[Effects of the Invention 1] As detailed above, according to the present invention, when designing a logic circuit, there are problems such as omission of detailed functions due to repetition of simple tasks such as placement of basic logic elements and drawing of wiring, and simple design. This has the excellent effect of preventing mistakes, greatly reducing the number of man-hours in the logic design stage, and shortening the development time of LSIs.

[Brief explanation of drawings]

1 to 6 are diagrams showing an embodiment in which the present invention is embodied in the logic design of peripheral circuits of a memory circuit, and FIG. 1 is a diagram showing a process of grouping peripheral circuits according to external terminals. Figure 2 shows the process of selecting external terminals, Figure 3 shows the process of selecting basic logic elements, Figure 4 shows the wiring process, and Figure 5 shows the process of designing a logic circuit in one embodiment. FIG. 6 is an electrical block circuit diagram showing an example of a logic circuit. FIG. 7 is a flowchart showing a conventional logic circuit design process. In the figure, 1 is a memory circuit as a main circuit, 3 is an inverter, 4 is an Ex-OR circuit, 5 is a D flip-flop, 6 is a flip-flop, and 7 is a three-state buffer. Figure 1: A diagram showing a process for grouping peripheral circuits into groups by external terminals - Embodiment Figure 4: Flowchart showing the design process of a logic circuit in this example Figure 6: Showing a condensation process! ! Figure 7 of the electric pro-schiff circuit diagram showing an example of the four-way circuit.

Claims (1)

[Claims] A logic circuit that creates placement data and logic connection data for basic logic elements constituting a peripheral circuit connected between a main circuit and an external terminal based on required logic information. In the design method, each external terminal is created by displaying a display that includes all types of basic logic elements that can form a peripheral circuit prepared in advance for each external terminal, and specifying the desired basic logic element from the display. 1. A method for designing a logic circuit, comprising selecting a desired basic logic element for each of the elements, and connecting the basic logic element to each external terminal.