JPH03211850A - Device and method for inspecting semiconductor device - Google Patents

Device and method for inspecting semiconductor device

Info

Publication number
JPH03211850A
JPH03211850A JP745990A JP745990A JPH03211850A JP H03211850 A JPH03211850 A JP H03211850A JP 745990 A JP745990 A JP 745990A JP 745990 A JP745990 A JP 745990A JP H03211850 A JPH03211850 A JP H03211850A
Authority
JP
Japan
Prior art keywords
conductive foil
printed circuit
circuit board
under test
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP745990A
Other languages
Japanese (ja)
Inventor
Yoki Nakakoji
中小路 陽紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP745990A priority Critical patent/JPH03211850A/en
Publication of JPH03211850A publication Critical patent/JPH03211850A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To realize a semiconductor device inspecting method which does not use any socket and handler contact by providing a positioning means and pressing means which brings the external lead of a device to be measured into contact with the first conductive foil section. CONSTITUTION:A printed board 2 in which the first conductive foil section 2a is connected with the second conductive foil section 2a through a through hole 2b is prepared and a positioning means 3 provided with a hole which is formed to surround a device 1 to be measured is provided on the first conductive foil 2a side of the board 2. After the device 1 is loosely put on the means 3, the device 1 is fixed by means of a pressing means 8 which brings the external lead 1a of the device 1 into contact with the first conductive foil section 2a and the electric properties of the device 1 are inspected. Accordingly, insertion and removal of the device 1 into and from this inspection device become easier and peripheral parts can be arranged on the conductive foil 2a of the board 2 at distances shorter than that to the lead 1a of the device 1. Therefore, the device to be measured can be placed directly and brought into contact on and with the inspection device and can be measured stably for high-frequency characteristics without using any socket and contact.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は完成後の半導体デバイスの電気特性を測定する
ための検査装置および検査方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an inspection apparatus and inspection method for measuring the electrical characteristics of a completed semiconductor device.

従来の技術 通信技術の開発と、高度情報化のニューメディア発展に
向けて、衛生放送や自動車電話など、VHF帯域からU
HF帯域の高周波信号利用の最近の状況は著しいもので
ある。半導体デバイスの検査もIGH2以上の周波数帯
域での保証品位を要望されている。
Toward the development of conventional communication technology and the development of advanced information-oriented new media, we are expanding the range from the VHF band to the U
Recent developments in the use of high frequency signals in the HF band are remarkable. Inspection of semiconductor devices is also required to guarantee quality in a frequency band of IGH2 or higher.

第2図(a)、 (b)は、従来例の検査装置の要部断
面図であり、半導体デバイスの用途にもよるが、およそ
数百MH2までの検査に用いられる検査装置である。以
下、第2図(a)に基づいて説明する。2は検査装置本
体に設けられたプリント基板である。21は導電性のキ
ャップであり、プリント基板2に設けた透孔2b内に挿
入され、はんだ5によって導電箔2aに接続されている
。このキャップ21は、第2図(b)に詳細に示すよう
に、上方に開口部をもつ円筒状のキャップ本体21aと
、その内部に圧入され、一部がキャップ本体21aの開
口部から外へ引き出され、さらにその先端がキャップ本
体21aの外面に沿うように折り曲げられたばね部材2
1bとで構成されており、この折り曲げられたばね部材
の先端部分がキャップ本体21 aの中央部分とともに
プリント基板2の透孔2b内に挿入され、この状態でキ
ャップ21がはんだ5により導電箔2aに固着されてい
る。
FIGS. 2(a) and 2(b) are sectional views of main parts of a conventional inspection apparatus, which is used for inspection of up to several hundred MH2, depending on the application of the semiconductor device. The following will explain based on FIG. 2(a). 2 is a printed circuit board provided on the main body of the inspection device. A conductive cap 21 is inserted into a through hole 2b provided in the printed circuit board 2 and connected to the conductive foil 2a with solder 5. As shown in detail in FIG. 2(b), this cap 21 includes a cylindrical cap body 21a having an opening at the top, and is press-fitted into the interior of the cylindrical cap body 21a, with a portion extending outward from the opening of the cap body 21a. The spring member 2 is pulled out and further bent so that its tip follows the outer surface of the cap body 21a.
1b, and the tip of this bent spring member is inserted into the through hole 2b of the printed circuit board 2 together with the center part of the cap body 21a, and in this state, the cap 21 is attached to the conductive foil 2a by the solder 5. It is fixed.

透孔2bは、プリント基板2に千鳥足状に形成されてお
り、したがってキャップ21も千1足状に配置されてい
る。そしてソケット12に設けた千1足状の端子13が
各キャップ21の中に着脱自在に圧入される。なお、上
記例では、プリント基板2の両面に(第2図は片面のみ
図示)導電箔2aを形成した例を示している。
The through holes 2b are formed in the printed circuit board 2 in a staggered pattern, and therefore the caps 21 are also arranged in a staggered pattern. Then, the terminals 13 in the shape of a thousand and one legs provided in the socket 12 are press-fitted into each cap 21 in a detachable manner. In the above example, the conductive foil 2a is formed on both sides of the printed circuit board 2 (only one side is shown in FIG. 2).

上記構成において、第2図に示すようにソケット12内
に半導体デバイス(以下デバイスと称す)1を載置し、
蓋12cを閉めるとデバイス1の外部リード1aが端子
13の上端に接触する。
In the above configuration, as shown in FIG. 2, a semiconductor device (hereinafter referred to as a device) 1 is placed in the socket 12,
When the lid 12c is closed, the external lead 1a of the device 1 comes into contact with the upper end of the terminal 13.

この状態で測定器から導電箔2a、はんだ5、キャップ
21、端子13を介してデバイス1の外部リード1aに
測定用の信号を加え、他の外部リードla、キャップ2
1、はんだ5、導電箔2aを介して出力信号を取り出せ
ば、デバイス1の電気的特性を測定することができる。
In this state, a measurement signal is applied from the measuring device to the external lead 1a of the device 1 via the conductive foil 2a, the solder 5, the cap 21, and the terminal 13.
1. By extracting the output signal via the solder 5 and the conductive foil 2a, the electrical characteristics of the device 1 can be measured.

そしてソケット12の交換時には、ソケット12の端子
13をキャップ21から引き抜き、新しいソケット12
の端子13をキャップ21に差し込むだけでよい。この
ためソケット12の交換がワンタツヂで行える。しかも
ソケット交換時に抵抗15、コンデンサ16の方向がず
れることな(、また、高周波特性の測定精度が変化する
こともなく、さらに、導電箔2aが剥がれることもない
When replacing the socket 12, pull out the terminal 13 of the socket 12 from the cap 21, and then replace the socket 12 with a new one.
Simply insert the terminal 13 into the cap 21. Therefore, the socket 12 can be replaced in one go. Furthermore, the directions of the resistor 15 and capacitor 16 will not shift when replacing the socket (also, the measurement accuracy of high frequency characteristics will not change, and furthermore, the conductive foil 2a will not peel off).

発明が解決しようとする課題 一般に半導体デバイスの検査においては、検査装置く測
定器)、ハンドラ、とその双方に介在し、被測定デバイ
スに直接接触するソケットやコンタクトが構成要素とし
て要求される。ところが、ソケット、コンタクトはとも
に数万回以上におよぶ検査後に摩耗や破損による取り換
え作業が発生し、それに伴なう再取付作業の時間ロスと
、前記ソケット、コンタクトとプリント基板間の配線の
取りはずし、デバイス周辺部品の取りはすしと再取付等
によるデバイスの高周波特性の測定値変化は避けられな
い。従来例はこれらの課題を解決するため、プリント基
板の透孔に導電性のキャップを取り付け、このキャップ
にソケットの端子を着脱自在に圧入するように構成した
ものである。しかし、数百MH2〜I GH2以上の周
波数を扱う検査においては、ソケットのリードとそれを
保持するキャップの延長上の長さでさえ、高周波におい
ては、単なる接続線とは考えられない状態となる。そこ
で、理想的なデバイスの検査は実セットのプリント基板
上に装着される状態と同じようにプリント基板に直接は
んだ付すれば一番良いのが当然であるが、検査のたびに
デバイスのリード部分のはんだを溶かしてプリント基板
上へ直接挿入、取り出しをするロスは多大なるものとな
る。また、はんだの発生熱によるデバイス破壊の可能性
もあり、非現実的である。本発明は上記課題を解決する
もので、ソケットやハンドラーコンタクトを使用しない
検査装置および検査方法を提供するものである。
Problems to be Solved by the Invention In general, in the testing of semiconductor devices, components such as a testing device (measuring instrument), a handler, and a socket or contact that is interposed in both of them and directly contacts the device under test are required. However, both sockets and contacts have to be replaced due to wear and tear after being inspected tens of thousands of times, resulting in loss of time for reinstallation work, removal of the wiring between the sockets and contacts, and the printed circuit board. Changes in the measured values of the device's high frequency characteristics due to removal and reinstallation of peripheral parts of the device are unavoidable. In order to solve these problems, in the conventional example, a conductive cap is attached to the through hole of the printed circuit board, and the terminal of the socket is detachably press-fitted into the cap. However, in tests that handle frequencies of several hundred MH2 to IGH2 or higher, even the extended length of the socket lead and the cap that holds it cannot be considered as a mere connection wire at high frequencies. . Therefore, it is naturally best to test an ideal device by soldering it directly to the printed circuit board in the same way as it is mounted on an actual set of printed circuit boards. The loss of melting the solder and directly inserting and removing it onto the printed circuit board is enormous. Furthermore, there is a possibility that the device will be destroyed due to the heat generated by the solder, which is unrealistic. The present invention solves the above problems and provides an inspection device and an inspection method that do not use sockets or handler contacts.

課題を解決するための手段 本発明は、第1の導電箔部と第2の導電箔部がスルーホ
ール接続されたプリント基板を用意し、前記プリント基
板の第1の導電箔部側には被測定デバイスを包囲するよ
うに穴が形成された位置決め手段を設け、前記位置決め
手段上に前記被測定デバイスを遊嵌させ、その後前記被
測定デバイスの外部リードと前記第1の導電箔部とを当
接させる押圧手段で固定し、電気的特性を検査する装置
と方法である。
Means for Solving the Problems The present invention provides a printed circuit board in which a first conductive foil portion and a second conductive foil portion are connected through holes, and a printed circuit board is provided on the first conductive foil portion side of the printed circuit board. A positioning means having a hole formed so as to surround the measuring device is provided, the device under test is loosely fitted onto the positioning means, and then an external lead of the device under test and the first conductive foil portion are brought into contact with each other. This is an apparatus and method for fixing with a pressing means and testing electrical characteristics.

作用 このようにすれば、検査装置・\のデバイスの挿入、取
り出しが容易であり、デバイスのリードからより近い距
離でのプリント基板導電箔上で周辺部品の配置が可能と
なる。そして、これによると、ソケットを不要とし、デ
バイスのリードから検査装置へ最短距離で接続すること
ができ、また、デバイス下面のプリント基板導電箔部分
も接地(GND)ライン等に有効に利用でき、より安定
な高周波特性の測定が可能になる。
Function: By doing so, it is easy to insert and remove the device in the inspection apparatus/\, and peripheral components can be placed on the printed circuit board conductive foil at a closer distance from the device leads. According to this, there is no need for a socket, it is possible to connect the device lead to the inspection equipment in the shortest possible distance, and the conductive foil portion of the printed circuit board on the bottom of the device can also be effectively used as a ground (GND) line, etc. It becomes possible to measure more stable high frequency characteristics.

実施例 本発明の実施例を第1図の要部断面図にもとづいて説明
する。2は検査装置本体に設けられたプリント基板であ
り、被測定デバイス1のパッケージ各リード1aに独立
して対応する導電752 aを設け、スルーホール2b
により前記プリント基板2下面の導電箔2aへ接続する
。前記プリント基板上面の導電箔2aは被測定デバイス
のリード1aをプリント基板2上へ載面するためのもの
であり、前記プリンI・基板下面の導電R2aは前記上
面の導電7M 22と導通してデバイス1の一方のリー
ド1aへ検査装置より測定入力信号、バイアス等を加え
、前記デバイス1の他方のり一部1aからの出力結果を
取り出すためのものである。また、前記デバイス1の機
能特性を測定するための周辺回路部品、たとえば、チッ
プ抵抗6、チップコンデンサ7を接続するものである。
Embodiment An embodiment of the present invention will be described based on the main part sectional view of FIG. Reference numeral 2 designates a printed circuit board provided in the main body of the inspection apparatus, in which a conductive board 752a is provided that independently corresponds to each lead 1a of the package of the device under test 1, and a through hole 2b is provided.
It is connected to the conductive foil 2a on the lower surface of the printed circuit board 2. The conductive foil 2a on the upper surface of the printed circuit board is for mounting the lead 1a of the device under test on the printed circuit board 2, and the conductive foil 2a on the lower surface of the printed circuit board is electrically connected to the conductive foil 22 on the upper surface. This is for applying a measurement input signal, bias, etc. from an inspection device to one lead 1a of the device 1, and extracting an output result from the other lead 1a of the device 1. Further, peripheral circuit components for measuring the functional characteristics of the device 1, such as a chip resistor 6 and a chip capacitor 7, are connected thereto.

プリント基板2上面でデバイス1の下側導電箔部分とそ
の反対側にあたる前記プリント基板2の下面の導電箔部
分を有効に活用でき、周辺回路部品にあたるチップ抵抗
6、チップコンデンサ7を設置でき、また接地(GND
)ライン等を通すことも可能となり、デバイスの安定な
高周波の特性測定、検査にはより有利になる。プリント
基板2上のデバイスlの把持は、パッケージリード外周
に余裕をもたせた寸法で前記リードを包囲する四角形の
透孔3を持つデバイス1の位置決め手段としての絶縁体
基板4を前記プリント基板2上に接着し、前記絶縁体基
板4の透孔3ヘデバイス1を遊嵌するように挿入して、
プリント基板2上のパッケージ各リード1aに対応した
導電箔2a上て当接させる。
On the upper surface of the printed circuit board 2, the lower conductive foil portion of the device 1 and the lower conductive foil portion of the printed circuit board 2 on the opposite side can be effectively utilized, and the chip resistor 6 and the chip capacitor 7, which are peripheral circuit components, can be installed. Grounding (GND)
) line, etc., making it more advantageous for stable high-frequency characteristic measurement and inspection of devices. To hold the device 1 on the printed circuit board 2, an insulating substrate 4, which serves as a means for positioning the device 1 and has a rectangular through hole 3 surrounding the package lead with a dimension that leaves a margin for the outer periphery of the package lead, is placed on the printed circuit board 2. and insert the device 1 into the through hole 3 of the insulating substrate 4 so as to fit it loosely,
The conductive foil 2a corresponding to each lead 1a of the package on the printed circuit board 2 is brought into contact with the conductive foil 2a.

さらに、パッケージリード1a、導電箔2aの密着を良
くするため、パッケージ1を上方がら半固形絶縁体ゴム
8a等を用いた押圧手段8で押し下げる。そのため、被
測定デバイス1の検査装置上プリント基板への挿入、取
り出しは容易である。
Further, in order to improve the adhesion between the package lead 1a and the conductive foil 2a, the package 1 is pushed down from above by a pressing means 8 made of semi-solid insulating rubber 8a or the like. Therefore, the device under test 1 can be easily inserted into and removed from the printed circuit board on the inspection apparatus.

また、パッケージ表面を上面にしたデバイス1の挿入、
取り出しが行われるため、商品名のマークやデバイスの
一部ピンナンバー表示を常時監視することができ、デバ
イスの載置が18071回転して挿入されることによる
測定ビンの間違いを誘発する要因がなくなり、デバイス
と検査装置双方の破壊を防ぐこともできる。
In addition, inserting the device 1 with the package surface facing up,
Since the product is taken out, the product name mark and pin number display on some of the devices can be constantly monitored, and there is no longer a risk of incorrectly inserting the measurement bottle due to the device being inserted after 18071 rotations. , it is also possible to prevent destruction of both the device and the inspection equipment.

発明の効果 本発明によれば、高周波デバイスの測定検査において、
ソケットやコンタクトを使用せず被測定デバイスを検査
装置上へ直接載置、接触させ、さらに被測定デバイスの
下面にあたるプリント基板の両面でのスペースを有効に
活用して安定な高周波特性を測定できる検査装置とその
方法を実現できる。
Effects of the Invention According to the present invention, in measurement and inspection of high frequency devices,
Testing that allows stable high-frequency characteristics to be measured by placing and contacting the device under test directly onto the test equipment without using sockets or contacts, and making effective use of the space on both sides of the printed circuit board, which is the bottom surface of the device under test. The device and method can be realized.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における半導体デバイスの検
査装置の要部断面図、第2図(b)、 (b)は従来例
の要部断面図および一部拡大断面図である。 ■・・・・・・被測定デバイス(パッケージ含む)、1
a・・・・・・パッケージ外部リード部分、1b・・・
・・・パッケージ樹脂モールド部分、2・・・・・・検
査装置く図示せず)のプリント基板、2a・・・・・・
プリント基板上面、下面の導電箔、2b・・・・・・プ
リント基板の透孔(スルーホール)、3・・・・・・絶
縁体基板の透孔(穴)、4・・・・・・デバイスパッケ
ージ位置決め手段の絶縁体基板、5・・・・・・はんだ
、6,7・・・・・・抵抗、コンデンサ、8・・・・・
・パッケージ押圧手段、12・・・・・・ソケット、1
3・・・・・・端子、21・・・・・・キャップ。
FIG. 1 is a sectional view of a main part of a semiconductor device inspection apparatus according to an embodiment of the present invention, and FIGS. 2(b) and 2(b) are a sectional view of a main part and a partially enlarged sectional view of a conventional example. ■・・・Device under test (including package), 1
a...Package external lead part, 1b...
...package resin mold part, 2...printed circuit board of inspection device (not shown), 2a...
Conductive foil on the upper and lower surfaces of the printed circuit board, 2b...Through hole in the printed circuit board, 3...Through hole in the insulator board, 4... Insulator substrate of device package positioning means, 5... Solder, 6, 7... Resistor, capacitor, 8...
・Package pressing means, 12...Socket, 1
3...terminal, 21...cap.

Claims (2)

【特許請求の範囲】[Claims] (1)プリント基板上面に被測定デバイスを載置すべく
、前記被測定デバイスの外部リードに対応した第1の導
電箔部と、前記第1の導電箔部とスルーホール接続され
前記プリント基板下面に形成した第2の導電箔部と、前
記プリント基板上面にあって前記被測定デバイスを包囲
するように穴が形成された位置決め手段と、前記被測定
デバイスの外部リードと前記第1の導電箔部とを当接さ
せる押圧手段とから成ることを特徴とする半導体デバイ
スの検査装置。
(1) In order to place the device under test on the top surface of the printed circuit board, a first conductive foil portion corresponding to the external lead of the device under test is connected to the first conductive foil portion through a through hole and is connected to the bottom surface of the printed circuit board. a second conductive foil portion formed on the printed circuit board; a positioning means having a hole formed on the top surface of the printed circuit board so as to surround the device under test; an external lead of the device under test; and the first conductive foil. 1. A semiconductor device inspection apparatus comprising: a pressing means for bringing the parts into contact with each other;
(2)第1の導電箔部と第2の導電箔部とがスルーホー
ル接続されたプリント基板を用意し、前記プリント基板
の第1の導電箔部側には前記被測定デバイスを包囲する
ように穴が形成された位置決め手段を設け、前記位置決
め手段上に前記被測定デバイスを遊嵌させ、その後前記
被測定デバイスの外部リードと前記第1の導電箔部とを
当接させる押圧手段で固定し、電気的特性を検査するこ
とを特徴とする半導体デバイスの検査方法。
(2) Prepare a printed circuit board in which a first conductive foil section and a second conductive foil section are connected through a through hole, and the first conductive foil section side of the printed circuit board has a structure surrounding the device under test. A positioning means having a hole formed therein is provided, the device under test is loosely fitted onto the positioning means, and then fixed by a pressing means that brings the external lead of the device under test into contact with the first conductive foil part. A method for testing a semiconductor device, the method comprising testing the electrical characteristics of a semiconductor device.
JP745990A 1990-01-17 1990-01-17 Device and method for inspecting semiconductor device Pending JPH03211850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP745990A JPH03211850A (en) 1990-01-17 1990-01-17 Device and method for inspecting semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP745990A JPH03211850A (en) 1990-01-17 1990-01-17 Device and method for inspecting semiconductor device

Publications (1)

Publication Number Publication Date
JPH03211850A true JPH03211850A (en) 1991-09-17

Family

ID=11666405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP745990A Pending JPH03211850A (en) 1990-01-17 1990-01-17 Device and method for inspecting semiconductor device

Country Status (1)

Country Link
JP (1) JPH03211850A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276861A (en) * 1986-05-26 1987-12-01 Hitachi Hokkai Semiconductor Ltd Semiconductor evaluation device
JPH01251632A (en) * 1988-03-31 1989-10-06 Toshiba Corp Measuring socket for semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276861A (en) * 1986-05-26 1987-12-01 Hitachi Hokkai Semiconductor Ltd Semiconductor evaluation device
JPH01251632A (en) * 1988-03-31 1989-10-06 Toshiba Corp Measuring socket for semiconductor device

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