JPH03215993A - Package for semiconductor device and wiring board thereof - Google Patents

Abstract

PURPOSE:To dispense with an external terminal insertion through-hole and to facilitate a semiconductor device in positioning and mounting by a method wherein a positioning pin whose protrudent part is longer than an external terminal is provided protruding upright from the surface of a base where the external terminals are provided protruding upright. CONSTITUTION:A package of a ceramic base 2 provided with a recess 2a where a semiconductor device 4 is houses and a lid 3 which covers the recess 2a. External terminals 7 are provided protruding upright as long as prescribed to the side of the ceramic base 2 opposite to its side where the recess 2a is provided and arranged in gratings. A positioning guide pin 9 whose protrudent part is longer than that of the external terminal 7 is provided protruding upright at a prescribed position on the other side of the ceramic base 2. The outer terminals 7 and the guide pin 9 are fixed at the prescribed positions respectively on the ceramic base 2 through adhesive agent 8. By this setup, an outer terminal insertion through-hole can be eliminated and a semiconductor device can be facilitated in positioning and mounting.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a package for a semiconductor device suitable for accommodating a semiconductor element such as an RC, and a wiring board thereof.

[Conventional technology]

Conventionally, as a semiconductor device, the semiconductor device shown in FIG. 5(,+).
(b) shows the internal assembly state, and Fig. 6(a),
A semiconductor device paracage having a configuration as shown in (b), that is, one comprising a PAG (Pin Glysode Array) paracage 1, is known, and the PAG paracage 1 as an insulating case is , a ceramic heath 2 having a concave portion 2a formed on one side thereof.
and a lid (lid) 3 that closes the concave portion 2a.

In the recessed portion 2a of this ceramic base 2, I
A semiconductor element 4 such as C is housed, and an electrode (not shown) is formed on the outer surface of the semiconductor element 4.
and an internal terminal electrode 5 exposed only at the peripheral edge within the concave portion 2a.
,... (see Fig. 5(a)) means thin metal wire 6,...
are connected to each other through. Also, this P.A.
On the other side of the G-Passocage 1 (Fig. 5(b) and Fig. 6(f)
1), see (b)), the internal terminal electrodes 5,...
A plurality of external terminals 7, . . . are protrudingly connected to each other, and these external terminals 7, . . . are arranged in a grid pattern. Note that these external terminals 7, . . . are attached to predetermined positions on the ceramic base 2 via adhesives 8, .

On the other hand, as shown in FIGS. 7(a) and 7(b), the wiring board 10 on which the semiconductor device equipped with this PAG package 1 is mounted includes external terminals 7, which are provided protruding from the PAG package 1.
A through-hole 11 is formed through which the through hole 11 is inserted, while a wiring pattern 12 made of copper foil or the like is formed on one side of the through hole 11.
,... are formed. Therefore, this semiconductor device is shown in FIG. 8(a). As shown in (b), its PAG
The external terminal 7 of the Paso cage 1 is the through hole 11,
The wiring board 1 is soldered to...
It will be implemented in 0. Note that the reference numeral 13 in FIG. 8(b) indicates solder in a state where the external terminal 7 and the through hole 11 are connected.

3 Next, this PAC. The assembly procedure and mounting procedure of a semiconductor device including the package 1 will be explained.

First, a required semiconductor element 4 is mounted in the recess 2a of the ceramic base 2 on which the external terminals 7, . . . are protruded, and the electrodes and internal terminal electrodes 5, .
. . , are connected by thin metal wires 6, . Next, by conducting an electrical characteristic test on the assembled semiconductor devices, only non-defective products are selected. Thereafter, a wiring board 10 is prepared in advance with external terminals 7, .
are inserted into the through holes 11, . . . , and then the external terminals 7, . . . and the through holes 11, . This completes the mounting of the semiconductor device equipped with the PAG path cage 1 onto the wiring board 10.

[Problem to be solved by the invention]

By the way, the PAG panocage 1 and its wiring board 10 having the conventional structure have the following disadvantages 4.

That is, when mounting a semiconductor device equipped with this PAG path cage 1 on the wiring board 10, the through holes 11, . . . and the external terminals 7, .
Since it is necessary to solder the through balls 11,... to the external terminals 7,..., the inner diameter must be larger than the outer diameter of the external terminals 7,... Concomitantly, there is a limit (generally said to be 1.78 m) that can narrow the distance between the external terminals 7.... Furthermore, this wiring board 10 includes a PAG
Since it is necessary to form a number of through holes 11, . . . corresponding to the number of external terminals 7, . However, there were restrictions when forming a typical wiring pattern.

The present invention was devised in view of these inconveniences, and provides a semiconductor device with a structure that not only does not require the formation of through holes through which external terminals are inserted, but also allows for easy positioning and mounting. Its purpose is to provide a PASO cage and its wiring board.

[Means to solve the problem]

A package for a semiconductor device according to the present invention is a package for a semiconductor device in which a plurality of external terminals are protruded from the other surface of a ceramic base in which a recessed portion for accommodating a semiconductor element is formed. The device is characterized in that a positioning guide pin having a longer protrusion length than the external terminal is protruded on the protrusion surface.

Further, the wiring board according to the present invention is a wiring board on which the semiconductor device package is mounted, and has a reference hole for positioning through which the guide bin is inserted and soldered. , a recessed connection electrode is formed into which only the tip of each of the external terminals is inserted and can hold a necessary amount of solder for soldering.

[Effect]

According to the configuration described in item 2, the guide pin is provided protruding from the path cage for semiconductor devices, and the reference hole through which the guide pin is inserted is provided in the wiring board, so that the positioning of this PAG package with respect to the wiring board is easy. This can be easily done by inserting a guide bottle through the semi-hole.

In addition, at this time, an external terminal with a shorter protrusion length than the guide pin is protruded from the PAG PC cage, and only the tip of the external terminal is inserted into the wiring board, and the amount required for soldering is Since the external terminals are provided with recessed connection electrodes that can hold the solder, these external terminals can be positioned and supported along the height direction and then easily soldered in a state called surface mounting. Become.

〔Example〕

Embodiments of the present invention will be described below based on the drawings.

FIG. 1(a) is a plan view showing the internal assembly state of the semiconductor device, FIG. 1(b) is a sectional view taken along line bb in FIG. 1(a), and FIG. 2(a) is a plan view showing the internal assembly state of the semiconductor device. A side view showing its external shape, and FIG. 2(b) is a bottom view thereof. 7 Since the basic configurations of the semiconductor device paracage (PAG vancage) and the wiring board according to this embodiment are the same as those of the conventional example, parts and portions that are the same or equivalent to each other are given the same reference numerals and will be referred to here. A detailed explanation will be omitted.

The I)AG computer cage 1 according to this embodiment is composed of a ceramic case 2 in which a recess 2a for housing a semiconductor element 4 is formed on one side, and a lid (lid) 3 that closes the recess 2a. has been done.

Then, on the other surface of this ceramic base 2 (Fig. 1(b)
) and FIGS. 2(a) and (b)) have a plurality of protruding external terminals 7, . . . having a predetermined protruding length, and Arranged in a grid. Furthermore, at a predetermined position on the other surface of the ceramic base 2 on which these external terminals 7, . . . A guide pin 9.9 for use is provided protrudingly.

By the way, these guide pins 9, 9 may be used only for positioning and not electrically, or may be electrically used as external connection terminals such as ground terminals or power terminals. It may be used. And these external terminals 7,...
- Each of the guide bins 9, 9 is coated with adhesive 8.・
... are respectively attached to predetermined positions on the ceramic base 2. The procedure for assembling a semiconductor device equipped with this PAG path cage 1 is the same as that of the conventional example, so a description thereof will be omitted.

On the other hand, the wiring board 10 on which the semiconductor device equipped with this PAG package 1 is mounted is as shown in the plan view of FIG. 3(a) and the cross-sectional view taken along line bb in FIG. , a guide pin 9 protruding from the PAG path cage 1,
Through hole 1 serves as a reference hole for positioning through which 9 is inserted.
4.14 is formed. And this wiring board 10
On one side of the wiring pattern 12 made of copper foil, etc.
are formed, and only the tips of the external terminals 7, . Recessed connection electrodes 15, . Note that solder may be attached to each of these connection electrodes 15, . . . in advance by printing and applying cream solder.

Next, FIG. 4 (
The explanation will be given based on the plan view in a) and the sectional view taken along line bb in FIG. 4(b).

First, after performing a characteristic test on the assembled semiconductor devices to select only non-defective products, positioning guide pins 9. It is inserted into a through ball 14.14, which is a reference hole for positioning, formed in the wiring board 10 prepared in advance. Then, the guide pins 9, 9 pass through the through balls 14, 14, thereby positioning the PAG panocage 1 with respect to the wiring board 10.

At this time, the external terminals 7, .
Since the length of the external terminals 7, . . . is shorter than the protruding length of the external terminals 7, .
Only the tip of ... is inserted. Therefore, when the external terminals 7, . . . and the connecting electrodes 15, .
, (b), mounting of the semiconductor device equipped with the PAG package 1 onto the wiring board 10 is completed. In FIG. 4(b), the reference numeral 13 indicates the solder that connects the guide pin 9 and the through hole 14, and the reference numeral 16 indicates the solder that connects the external terminal 7 and the connection electrode 15.

By the way, if the guide pins 9, 9 protruding from the PAG path cage 1 are not used electrically, there is no need to solder these to the through hole 1414, and the connection electrode 15,... It goes without saying that if solder is applied to each in advance, soldering can be performed by reflow soldering.11 [Effects of the Invention] As explained below, In addition, the guide pin is provided protrudingly in the path cage for semiconductor devices according to the present invention, and the reference hole through which the guide pin is inserted is provided in the wiring board. This is easily accomplished by inserting the bottle through the reference hole. In addition, at this time, an external terminal with a shorter protruding length than the guy 1 pin is provided protruding from the PAG PC cage, and only the tip of the external terminal is inserted into the wiring board, and is necessary for soldering. Since the external terminals are provided with recessed connection electrodes that can hold a large amount of solder, these external terminals can be positioned and supported along the height direction and then easily soldered in a state called surface mounting. It turns out.

Therefore, according to the present invention, there is no need to form a through hole in the wiring board through which the external terminal protruding from the semiconductor device package is inserted and soldered.
In addition to preventing these inconveniences associated with soldering, it is possible to further narrow the spacing between external terminals. Furthermore, as a result of being able to effectively utilize both the front and back sides of this wiring board,
Excellent effects such as being able to form an efficient wiring pattern and easily positioning and mounting the semiconductor device can be obtained.

[Brief explanation of drawings]

1 to 4 relate to the present invention, FIG. 1(a) is a plan view showing the internal assembly state of the semiconductor device, and FIG. 1(b) is taken along line bb in FIG. 1(a). 2(a) is a side view showing its external shape, FIG. 2(b) is a bottom view thereof, FIG. 3(a) is a plan view showing the mounting board, and FIG. 3(b)
is the cross section along line bb in Fig. 3(a), Fig. 4(a)
4(b) is a sectional view taken along line bb in FIG. 4(a). Further, FIGS. 5 to 8 relate to the conventional example, and FIG.
) is a plan view showing the internal assembly state of the semiconductor device, and FIG.
b) is a sectional view taken along line bb of the fifth circle (a);
a) is a side view showing the external shape, FIG. 6(b) is a bottom view, FIG. 7(a) is a plan view showing the mounting board, and FIG. 7(b) is the same as that of FIG. 7(a). 8(a) is a cross-sectional view taken along line bb, and FIG. 8(a) is a plan view showing the mounting state of the semiconductor device.
b) is a sectional view taken along line bb in FIG. 8(a). In the figure, numeral 1 is a PAG path cage (path cage for semiconductor devices), 2 is a ceramic base, 4 is a semiconductor element,
7 is a guide bin, 10 is a wiring board, 14 is a reference hole, 15
is the connecting electrode. Note that the same reference numerals in the drawings indicate parts and portions that are the same or correspond to each other.

Claims (2)

[Claims] (1) In a package for a semiconductor device having a plurality of external terminals protruding from the other side of a ceramic base having a recess formed on one side for accommodating a semiconductor element, on the protruding surface of the external terminals, A package for a semiconductor device, comprising a protruding guide pin for positioning that has a longer protrusion length than the external terminal. (2) A wiring board on which this semiconductor device package is mounted, which has a reference hole for positioning through which the guide pin is inserted and soldered, and on one surface thereof, a tip of each of the external terminals. What is claimed is: 1. A wiring board characterized in that a recessed connection electrode is formed into which only a portion of the wiring board is inserted, and which can hold a necessary amount of solder for soldering.