JPH03216715A - Power-on reset circuit - Google Patents

Abstract

PURPOSE:To design a circuit to consume little current and to improve response sped by releasing reset when the power voltage of a microcomputer is high and resetting it when the power voltage is low. CONSTITUTION:In a circuit 1 having the same constitution as the oscillation circuit of the microcomputer, respective transistors are turned on when the power voltage to be impressed is high, and a high level voltage is supplied to a buffer circuit with pull down resistance 2. When the value of the power voltage impressed on the circuit 1 is less than that by which the oscillation circuit does not operate, a current to the degree of a leak current flows in respective transistors of the circuit 1, and the outputs come to almost high impedance, whereby the input-side of the circuit 2 is pulled down. The output of the circuit 2 is connected to the reset terminal of the microcomputer. When the power voltage is high, reset is released and the microcomputer is reset when the power voltage is low and the voltage comes to that with which the oscillation circuit cannot operate. Thus, responsiveness as against the fluctuation of the power voltage improves and the consumption of current is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power-on reset circuit, and particularly to a power-on reset circuit for a microcomputer. [Prior Art] A conventional power-on reset circuit has a resistor, a capacitor, and an inverter, as shown in Figure 2. Next, we will explain the operation. When the power is turned on, the inverter input is low level. Due to the time constant of the resistance and capacitance, the inverter input changes from low level to high level with a delay from the rise of the power supply voltage, so a power-on reset is required at this time. Furthermore, the power-on reset circuit shown in FIG. 3 includes a voltage comparison circuit for comparing voltages, a dividing resistor for detecting the power supply voltage value, and a resistor and diode for creating a constant voltage. Next, we will explain the operation. At power-on, a voltage representing the power supply voltage is applied to the negative input side of the voltage comparison circuit, and a constant diode voltage (approximately 0.6V) that is independent of the power supply voltage is applied to the positive input side. The output of the circuit is high level. After the power is turned on, when the power supply voltage reaches a normal voltage (such as 5V), the voltage of the negative input of the voltage comparison circuit becomes higher than that of the positive input, and the output of the voltage comparison circuit becomes a low level. At this time, a power-on reset is required. [Problems to be Solved by the Invention] The conventional power-on reset circuit shown in FIG. 2 has a problem in that the expected power-on reset does not occur when charge is accumulated in the capacitor. (There is a possibility that the inverter input is always at a high level.) The conventional power-on reset circuit shown in Figure 3 uses a voltage comparator circuit with a low current consumption design (5 μA
(below), the response speed is slow (100 ms to several S), so there is a problem that power-on reset cannot be performed in response to sudden power fluctuations.

[Means to solve the problem]

The power-on reset circuit of the present invention includes a circuit that is independent of and has the same configuration as an oscillation circuit for operating the CPU of a microcomputer, and a buffer circuit that includes a pull-up or pull-down resistor. [Example] Next, the present invention will be described with reference to the drawings.

FIG. 1 shows a power-on reset circuit according to an embodiment of the present invention.

In the circuit 1, which has the same configuration as the oscillation circuit of a microcomputer, each transistor turns on when the applied power supply voltage is high, and supplies a high level to the buffer circuit 2 with a pull-down resistor. If the power supply voltage applied to the above circuit l is below the value at which the oscillation circuit does not operate (power supply voltage 1-1.5V), a current equivalent to the leakage current flows through each transistor of the circuit l, and the output is almost high. becomes an impedance, and the input side of circuit 2 is pulled down. The output of circuit 2 is connected to the reset terminal of the microcomputer. Therefore, when the power supply voltage is high, the reset is canceled, and when the power supply voltage is low and the oscillation circuit cannot operate, the microcomputer is reset. It also has good response to power supply voltage fluctuations (several milliseconds) and low current consumption. FIG. 4 shows a power-on reset circuit according to an embodiment of the present invention.

A resistor is added to the circuit having the same configuration as the oscillation circuit shown in FIG. 1 to facilitate high-level input to the next-stage buffer circuit.

〔Effect of the invention〕

As explained above, in the present invention, when the power supply voltage of the microcomputer is high, the reset is released, and when the power supply voltage is low, (
Since the microcomputer is reset (when the microcomputer does not operate or cannot operate), the reset is applied when the power is turned on, which has the effect of preventing the microcomputer from malfunctioning.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention, FIGS. 2 and 3 are circuit diagrams of a conventional example, and FIG. 4 is a circuit diagram of a second embodiment of the present invention. 1.3...Circuit with the same structure as the oscillation circuit of a microcomputer, 2,4...Buffer circuit with pull-down resistor.

Claims (1)

[Claims] A power-on reset circuit comprising a circuit independent of and having the same configuration as an oscillation circuit for operating a CPU of a microcomputer, and a buffer circuit incorporating a pull-up or pull-down resistor.