JPH03217116A - Level shifting circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a level shift circuit for changing signal voltage levels within the same semiconductor substrate.

BACKGROUND ART Signals that require voltage level conversion consume a large amount of current in a static state, which significantly degrades the performance of semiconductor devices. Therefore, it is important for semiconductor devices how to suppress the current in the static state.

A conventional signal voltage level shift circuit will be described below.

FIG. 3 shows a specific example of a conventional signal voltage level shift circuit.

This circuit consists of a P-channel transistor 1.3 and an N-channel transistor 2, 4.
．． An input signal 10 is input to the gate of transistor 2, the drain of transistor 1.2 and the gates of transistors 3 and 4 are connected by a signal line 11, and an output signal 12 is output from the drain of transistor 3.4. At this time, transistor 1
It is assumed that VL is applied to the source of transistor 3, and VH is applied to the source of transistor 3 (V o > V L ).

When the input signal 10 is VL, the transistor 1.4 is turned off and the transistor 2.3 is turned on, so the output signal 12 becomes Vo.

Next, when the input signal 10 becomes O, transistor 1 is turned on and transistor 2 is turned off, so that the signal line 11 has V
t is output. At this time, both transistors 3 and 4 are turned on, but the output signal l2 becomes 0 due to the difference in current.

Problems to be Solved by the Invention However, the conventional configuration described above has a problem in that when a low power supply voltage signal is applied to the gate of the transistor on the high power supply voltage side, a through current flows even in a static state. .

The present invention solves the above-mentioned conventional problems, and aims to provide a level shift circuit that can minimize current consumption in a static state.

Means for Solving the Problems To solve this object, the level shift circuit of the present invention includes an N-channel transistor that outputs a low power supply voltage and a booster circuit that boosts the low power supply voltage to a high power supply voltage.

Effect: With this configuration, the N-channel transistor and the booster circuit boost the low power supply voltage signal to the high power supply voltage.
Current consumption can be minimized.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a specific example of the level shift circuit of the present invention.

This circuit includes an inverter 5 operating at a low power supply voltage that receives an input signal 10, an N-channel transistor 6 that receives the output of the inverter 5 and outputs a low power supply voltage to a signal line 11, and a signal line 11 connected to a low power supply voltage. It is composed of a booster circuit 7 that boosts the voltage from a high power supply voltage to a high power supply voltage. Booster circuit 7 is composed of a P-channel transistor 71 and an inverter 72. Note that the P-channel transistor 3 and the N-channel transistors 2 and 4 have the same structure as the conventional example. An input signal 10 is input to the gate of the transistor 2, the drains of the transistors 2 and 6 and the gates of the transistors 3 and 4 are connected by a signal line 11, and an output signal 12 is output from the drain of the transistor 3.4. At this time, the low power supply voltage is VL and the high power supply voltage is VH.

The operation of the level shift circuit of this embodiment configured as described above will be explained below.

When the input signal 10 is VL, the transistor 4.6
is turned off and transistors 2.3 are turned off, so the signal line 11 becomes 0, the booster circuit 7 does not operate, and the output signal 12
becomes vH.

Next, when the input signal 10 becomes 0, the transistor 6 is turned on and the transistor 2 is turned off, so that the signal line 11 has Vt.
is output. Voltage level ML of signal line 11 is boosted by booster circuit 7 and becomes vH. As a result, transistor 3 is turned off and transistor 4 is turned on, so that output signal 12 becomes 0.

As described above, according to this embodiment, since the booster circuit 7 is connected to the signal line 11, the low power supply voltage level VL is not statically applied to the gate of the transistor 3. Further, when the signal line 11 is boosted to VH, the transistor 6
is turned off, so no current flows from the signal line 11 to the low voltage source. Therefore, when the device is in a static state, no through current flows, so current consumption can be minimized.

Note that, as shown in FIG. 2, the configuration 5 of the booster circuit 7 may be a P-channel transistor 71 whose gate input is the output signal 12.

Effects of the Invention The present invention can realize an excellent level shift circuit that can minimize current consumption by providing a signal voltage booster circuit and an N-channel transistor that prevents reverse flow of current generated by the booster.

[Brief explanation of drawings]

FIG. 1...P channel transistor, 2...
...N-channel transistor, 3...P-channel transistor, 4...N-channel transistor, 5...Inperter, 6...
N-channel transistor, 7...boost circuit,
10...Input signal, 11...Signal line,
12...Output signal, 71...P channel transistor, 72...Inverter.

Claims (1)

[Claims] A level shift circuit that includes an N-channel transistor that outputs a low power supply voltage level and a booster circuit that boosts the signal at the low power supply voltage level to a high power supply voltage level.