JPH03218683A - Photovoltaic element - Google Patents

Photovoltaic element

Info

Publication number
JPH03218683A
JPH03218683A JP2014011A JP1401190A JPH03218683A JP H03218683 A JPH03218683 A JP H03218683A JP 2014011 A JP2014011 A JP 2014011A JP 1401190 A JP1401190 A JP 1401190A JP H03218683 A JPH03218683 A JP H03218683A
Authority
JP
Japan
Prior art keywords
layer
type
silicon film
photovoltaic element
irregularities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2014011A
Other languages
Japanese (ja)
Inventor
Masayuki Iwamoto
岩本 正幸
Koji Minami
浩二 南
Toshihiko Yamaoki
山置 俊彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2014011A priority Critical patent/JPH03218683A/en
Publication of JPH03218683A publication Critical patent/JPH03218683A/en
Pending legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To improve a photovoltaic element in conversion efficiency by a method wherein irregularities having a certain height or above are provided to the joint surface of a polycrystalline silicon film with an amorphous silicon film or a fine crystal silicon film. CONSTITUTION:A photovoltaic element of this design is composed of two laminated unit photovoltaic elements and a so-called tandem type, where irregularities 2000Angstrom or above in height are formed on the surface of an N-type p-Si layer 2 deposited on a substrate 1 through a solid-phase growth method. A P-type muc-Si layer 3, an N-type a-Si layer 4, an I-type a-Si layer 5, and a P-type a-Si layer 6 are successively on the N-type p-Si layer 2 through a well-known plasma CVD method. As mentioned above, irregularities 2000Angstrom or above in height are formed on the N-type p-Si layer 2, whereby a photovoltaic element is increased in shortcircuit current and improved in conversion efficiency.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は、多結晶シリコン(以下、p−Siと称す)膜
と非品質シリコン(以下、a−Siと称す)膜または微
結晶シリコン(以下、μc−Siと称す)膜との接合を
備える光起電力素子に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Industrial application field The present invention is applicable to polycrystalline silicon (hereinafter referred to as p-Si) films, non-quality silicon (hereinafter referred to as a-Si) films or microcrystalline silicon. (hereinafter referred to as μc-Si) A photovoltaic element having a junction with a film.

(口)従来の技術 a−Si膜のみからなる光起電力素子より光電変換効率
が高くなるとして、p−Si膜とa−Si膜との接合を
備える光起電力素子が、Japanese Journ
al ofApplied Physics\’ol2
2 (1983) pp.L605に記載されているよ
うに、既に知られている。
(Example) A photovoltaic element having a junction between a p-Si film and an a-Si film has been proposed in the Japanese Journal, as it has higher photoelectric conversion efficiency than a conventional photovoltaic element consisting only of an a-Si film.
al of Applied Physics\'ol2
2 (1983) pp. Already known as described in L605.

(ハ)発明が解決しようとする課題 この光起電力素子は、p−Siウエハを用いているため
、コストが高くなる。
(c) Problems to be Solved by the Invention Since this photovoltaic device uses a p-Si wafer, its cost is high.

また、このような光起電力素子においても、従来十分な
光電変換効率は得られていなかった。
Further, even in such a photovoltaic element, sufficient photoelectric conversion efficiency has not been obtained in the past.

そこで、本発明の目的は、p−Si膜とa−Si膜また
はμc−Si膜との接合を備える光起電力素子を安価に
製造することができ、かつ高変換効率を備える光起電力
素子を提供するものである。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to produce a photovoltaic element having a junction between a p-Si film and an a-Si film or a μc-Si film, which can be manufactured at low cost, and which has high conversion efficiency. It provides:

(二)課題を解決するための手段 本発明は、固相成長法により形成したp−Si膜と、a
−Si膜またはpc−Si膜との接合を備える光起電力
素子において、上記p−Si膜の上記a−Si膜または
μc−Si膜との接合面に、高さ約2000人以上の凸
凹が形成されていることを特徴とする。
(2) Means for Solving the Problems The present invention provides a p-Si film formed by a solid phase growth method and a
- In a photovoltaic device having a junction with a Si film or a PC-Si film, the junction surface of the p-Si film with the a-Si film or the μc-Si film has an unevenness with a height of about 2000 or more. It is characterized by being formed.

(ホ)作用 本発明によれば、p−Si膜上に高さ約2000人以上
の凸凹を形成することにより、その上に形成したa−S
i層にも凸凹が形成され、光起電力素子の光入射面に6
凸凹が形成されることになる。従って、入射光は入射面
にて屈折し、発電層内に斜めに入るため、発電層内での
光路長が長くなり、光の吸収量が多くなるため光電変換
効率が向上する。
(E) Function According to the present invention, by forming irregularities with a height of about 2000 or more on the p-Si film, the a-S
I-layer is also formed with unevenness, and the light incidence surface of the photovoltaic element has 6
Unevenness will be formed. Therefore, the incident light is refracted at the incident surface and obliquely enters the power generation layer, so the optical path length within the power generation layer becomes longer, and the amount of light absorbed increases, so that the photoelectric conversion efficiency improves.

(へ)実施例 第1図は、本発明の一実施例の光起電力素子の構造を示
す概略的断面図である。
(f) Example FIG. 1 is a schematic sectional view showing the structure of a photovoltaic device according to an example of the present invention.

この光起電力素子は、2つの単位発電素子を積層した、
所謂タンデム型光起電力素子であり、1は基板、2は基
板l上に固相成長法により形成された膜厚5〜50μm
のn型p−Si層であり、その表面に約2000人以上
の凹凸が形成されている。3は膜厚100 − 500
人のp型lIc−Si層、4は膜厚100 − 500
人のn型a−Si層、5は膜厚1000 − 8000
人のi型a一Sl層、6は膜厚100 − 300人の
p型a−Si層である。
This photovoltaic element is a stack of two unit power generating elements.
It is a so-called tandem type photovoltaic device, and 1 is a substrate, and 2 is a film thickness of 5 to 50 μm formed on the substrate l by solid phase growth method.
It is an n-type p-Si layer, and its surface has a roughness of approximately 2,000 or more. 3 is film thickness 100-500
Human p-type lIc-Si layer, 4 has a film thickness of 100-500
Human n-type a-Si layer, 5 has a film thickness of 1000-8000
6 is a p-type a-Si layer with a film thickness of 100 to 300.

これらp型μc−Si層3、n型a−Si層4、i型a
−Si層5及びp型a−Si層6は、周知のプラズマC
VD法によりn型p−Si層2上に順に形成される。7
はITO (酸化インジウム) 、SnOz (酸化錫
)等のTCO(透光性導電酸化物冫からなる膜厚100
0〜2000人の透明電極である。
These p-type μc-Si layer 3, n-type a-Si layer 4, i-type a
-Si layer 5 and p-type a-Si layer 6 are formed using well-known plasma C
They are sequentially formed on the n-type p-Si layer 2 by the VD method. 7
is a film made of TCO (transparent conductive oxide) such as ITO (indium oxide) or SnOz (tin oxide) with a thickness of 100 mm.
0-2000 transparent electrodes.

なお、p型pc−Si層3に代えて、p型a−Si層3
を用いてもよい。
Note that instead of the p-type PC-Si layer 3, the p-type a-Si layer 3
may also be used.

第2図は、n型p−Si層2表面の凸凹の高さと光起電
力素子の変換効率との関係を示す。なお、同図は、凸凹
がない場合の変換効率を1としたときの相対値を示して
いる。
FIG. 2 shows the relationship between the height of the unevenness on the surface of the n-type p-Si layer 2 and the conversion efficiency of the photovoltaic element. Note that this figure shows relative values when the conversion efficiency in the case of no unevenness is set to 1.

第2図から明らかなように、n型p−Si層2の表面に
2000人以上の凸凹を形成することにより、凸凹がな
い場合と比べ変換効率を向上し得ることが分かる。これ
はn型p−Si層2の表面に2000人以上の凸凹を形
成することにより、光起電力素子の短絡電流が増加した
ためである。なお、2000人以下で変換効率がほとん
ど変化しないのは、凸凹が小さすぎるため、その効果が
少ないためであると考えられる。
As is clear from FIG. 2, it can be seen that by forming irregularities of 2000 or more on the surface of the n-type p-Si layer 2, the conversion efficiency can be improved compared to the case where there are no irregularities. This is because the short circuit current of the photovoltaic element increased due to the formation of 2000 or more irregularities on the surface of the n-type p-Si layer 2. The reason why the conversion efficiency hardly changes when the number of people is 2,000 or less is considered to be because the unevenness is too small, so the effect is small.

次に、本発明の実施例の光起電力素子のn型p−Si層
2の具体的な形成方法について、3つの例を示す。
Next, three examples will be shown regarding specific methods for forming the n-type p-Si layer 2 of the photovoltaic device according to the embodiment of the present invention.

(第1例ラ 基板1としては、石英もしくはセラミック等を用いる。(First example la As the substrate 1, quartz, ceramic, or the like is used.

アセトン中に81もしくはSin,の結晶粉末(粒径2
 0 0 0〜100QQ人)をイ容かして撹拌し、こ
の溶液中に基板1を入れ、10〜30分超音波洗浄する
。そうすることにより、基板1上に粉末が吸着される。
81 or Sin, crystal powder (particle size 2) in acetone
0 0 0 to 100 QQ people) was stirred in a volume, and the substrate 1 was placed in this solution and ultrasonically cleaned for 10 to 30 minutes. By doing so, the powder is adsorbed onto the substrate 1.

こうして粉末が吸着した基板1上に、下記の条件による
プラズマCVD法により、リンドープのn型a−Si層
を形成する。
A phosphorus-doped n-type a-Si layer is formed on the substrate 1 on which the powder has been adsorbed in this manner by plasma CVD under the following conditions.

* C V D形成条件 ガス流量比: PI−1,,/’ SiH. = 1〜
3%基板温度 ゜400〜700℃ 膜厚   :5〜50μm その後、このn型a−Si層を、600 〜800℃の
N2ガス雰囲気中にlO〜30時間曝して固相成長させ
ることにより、表面に2000〜10000人の凸凹を
持ったn型p−Si層2が形成される。
*CVD formation conditions gas flow rate ratio: PI-1,,/' SiH. = 1~
3% Substrate temperature ゜400~700℃ Film thickness: 5~50μm Thereafter, this n-type a-Si layer is exposed to a N2 gas atmosphere at 600~800℃ for 10~30 hours to cause solid phase growth, thereby forming a surface layer. An n-type p-Si layer 2 having 2,000 to 10,000 irregularities is formed.

(第2例) 基板I (第1例と同じ基板)の表面を研摩し、表面に
2o O Cl人〜1.5μmの凸凹を形成する。その
上に第1例と同じ条件でn型a−Si層を形成した後、
これを第1例と同じ条件で固相成長させる。これにより
、表面に2000人〜1μmの凸凹を有するn型p−S
i層2が形成される。
(Second example) The surface of a substrate I (same substrate as in the first example) is polished to form irregularities of 20 O Cl to 1.5 μm on the surface. After forming an n-type a-Si layer thereon under the same conditions as in the first example,
This is grown in a solid phase under the same conditions as in the first example. As a result, an n-type p-S with irregularities of 2,000 to 1 μm on the surface.
An i-layer 2 is formed.

(第3例) 基板1 (第1例と同じ基板)上に第1例と同じ条件で
a−Si層を形成した後、これを第1例と同じ条件で固
相成長させ、n型p−Si層を形成する。
(Third example) After forming an a-Si layer on substrate 1 (the same substrate as in the first example) under the same conditions as in the first example, this was grown in solid phase under the same conditions as in the first example to form an n-type p-Si layer. - Forming a Si layer.

その後、その表面を下記に示す条件で、Arガスもしく
はCF. + otガス中でスパッタする。
Thereafter, the surface was treated with Ar gas or CF. +Sputter in ot gas.

*貸の場合のスパッタ条件 Ar流量 : 10 − 100SCCM圧力  : 
0.5−5X 10−’Torr基板温度:室温 RFパワー:10〜100W 時間  :10〜100分 *(F4+Osの場合のスパッタ条件 総流量 :10〜IOOSCCM 流量比 : CF. :O. = 9: 1圧力  :
 0. 5− 5X It)−’Torr基板温度:室
温 RFノマワ ー : 10〜 100〜〜′時間  :
1〜30分 これらスパッタにより、表面に2000人〜IIIn+
の凸凹が形成されたn型p−Si層2が形成される。
*Sputtering conditions for rental Ar flow rate: 10-100SCCM pressure:
0.5-5X 10-'Torr Substrate temperature: Room temperature RF power: 10-100W Time: 10-100 minutes* (Sputtering conditions for F4+Os Total flow rate: 10-IOOSCCM Flow rate ratio: CF.:O. = 9: 1 pressure:
0. 5- 5
By sputtering for 1 to 30 minutes, 2000 to IIIn+ is applied to the surface.
An n-type p-Si layer 2 having irregularities formed therein is formed.

(ト)発明の効果 本発明によれば、固相成長法により形成した多結晶シリ
コン膜と、非晶質シリコン膜または微結晶シリコン膜と
の接合を備える光起電力素子において、上記多結晶シリ
コン膜の上記非品質シリコン膜または微結晶シリコン膜
との接合面に、高さ約2000人以上の凸凹が形成され
ているので、発電層内での光の吸4又が多くなり、光起
電力素子の変換効率を向上することができる。
(G) Effects of the Invention According to the present invention, in a photovoltaic element comprising a junction between a polycrystalline silicon film formed by a solid phase growth method and an amorphous silicon film or a microcrystalline silicon film, the polycrystalline silicon Since unevenness with a height of about 2,000 or more is formed on the bonding surface of the film with the above-mentioned non-quality silicon film or microcrystalline silicon film, the absorption of light in the power generation layer increases, resulting in a decrease in photovoltaic power. The conversion efficiency of the element can be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す概略的断面図、第2図
はp−Si層表面の凸凹の高さと光起電力素子の変換効
率の関係を示す特性図である。 O 2000 4000 6000 8000 +0000 凸凹0高さlス)
FIG. 1 is a schematic cross-sectional view showing an embodiment of the present invention, and FIG. 2 is a characteristic diagram showing the relationship between the height of unevenness on the surface of a p-Si layer and the conversion efficiency of a photovoltaic element. O 2000 4000 6000 8000 +0000 Unevenness 0 Height l)

Claims (1)

【特許請求の範囲】[Claims] (1)固相成長法により形成した多結晶シリコン膜と、
非晶質シリコン膜または微結晶シリコン膜との接合を備
える光起電力素子において、上記多結晶シリコン膜の上
記非晶質シリコン膜または微結晶シリコン膜との接合面
に、高さ約2000Å以上の凸凹が形成されていること
を特徴とする光起電力素子。
(1) A polycrystalline silicon film formed by solid phase growth method,
In a photovoltaic device having a junction with an amorphous silicon film or a microcrystalline silicon film, a bonding surface of the polycrystalline silicon film with the amorphous silicon film or the microcrystalline silicon film has a height of about 2000 Å or more. A photovoltaic element characterized by having unevenness formed therein.
JP2014011A 1990-01-24 1990-01-24 Photovoltaic element Pending JPH03218683A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014011A JPH03218683A (en) 1990-01-24 1990-01-24 Photovoltaic element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014011A JPH03218683A (en) 1990-01-24 1990-01-24 Photovoltaic element

Publications (1)

Publication Number Publication Date
JPH03218683A true JPH03218683A (en) 1991-09-26

Family

ID=11849259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014011A Pending JPH03218683A (en) 1990-01-24 1990-01-24 Photovoltaic element

Country Status (1)

Country Link
JP (1) JPH03218683A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4315959A1 (en) * 1993-05-12 1994-11-24 Max Planck Gesellschaft Electronic device with microstructured electrodes and method for producing such a device
US7075002B1 (en) 1995-03-27 2006-07-11 Semiconductor Energy Laboratory Company, Ltd. Thin-film photoelectric conversion device and a method of manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50158290A (en) * 1974-06-10 1975-12-22
JPS5760875A (en) * 1980-09-25 1982-04-13 Sharp Corp Photoelectric conversion element
JPS60216585A (en) * 1984-04-12 1985-10-30 Matsushita Electric Ind Co Ltd Solar cell element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50158290A (en) * 1974-06-10 1975-12-22
JPS5760875A (en) * 1980-09-25 1982-04-13 Sharp Corp Photoelectric conversion element
JPS60216585A (en) * 1984-04-12 1985-10-30 Matsushita Electric Ind Co Ltd Solar cell element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4315959A1 (en) * 1993-05-12 1994-11-24 Max Planck Gesellschaft Electronic device with microstructured electrodes and method for producing such a device
US5810945A (en) * 1993-05-12 1998-09-22 Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. Method of fabricating an electronic micropatterned electrode device
US7075002B1 (en) 1995-03-27 2006-07-11 Semiconductor Energy Laboratory Company, Ltd. Thin-film photoelectric conversion device and a method of manufacturing the same

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