JPH03220652A - Control system for non-volatile memory - Google Patents

Abstract

PURPOSE:To correctly compensate contents in a memory area when a power source is activated although it is once turned off by setting information concerning the memory area to be checked in a non-volatile memory (NVM) to the prescribed set area of the NVM. CONSTITUTION:Out of data stored in an NVM 10, especially important data such as the ID number of a radio telephone system, for example, is stored in a data area 11 and each time an electronic equipment is activated for securing the reliability of the electronic equipment, an operation check is executed to the data area 11. As a work area for this operation check, a set area 12 is provided in the NVM 10 and an initial data save area 21 is provided in a RAM 20. Thus, even when the data in the memory area under the check is made still illegal by the interruption of the power source during the check, the data can be correctly compensated based on the information set in the set area when the power source is next turned on.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a nonvolatile memory management method.

(Prior Art) In recent years, electronic devices that process various types of information as digital data have become widespread.

Some of these electronic devices, such as ID numbers stored in car phone devices or phone numbers registered as abbreviated numbers, can be stored for a certain amount of time even when power is not supplied to the electronic device. There are some types of data that do not disappear and require that the stored data be rewritable.

In electronic devices with such requirements, battery-backed RAM and EE-FROM (ELE
Critically Erasable and Pr
ogramable ROM, electrically erasable FROM
), etc., so-called non-volatile memory that can rewrite data at will and store data even when power is not supplied to the electronic device itself.
Memory; hereinafter abbreviated as NVM. ) has been widely used to store data.

By the way, the data stored in these NVMs is often relatively important data, and when rewriting the data, the NVM
If the VM malfunctions, various damages will be caused to the users of this electronic device.

For this reason, some electronic devices are stipulated to check whether the NVM is operating normally or not on the storage area where these important data are stored when the electronic device is started. .

When checking the operation of NVM in such electronic equipment, it is necessary to check the operation without destroying already stored data.

Next, an example of an NVM management method for checking the operation without destroying stored data will be explained using the flowchart shown in FIG.

First, R
Saving to AM (Step 401) Next, check data generated by logically inverting each bit of this initial data is written to the check address. (Step 402).

Thereafter, the check data written to the check address is read out (step 403), and the read check data is compared with the logically inverted version of each bit of the initial data stored in the RAM (step 404).

When these data are compared, if they match, it is determined that this check address operates normally, and the initial data stored in the RAM is returned to the check address (step 405). Additionally, if these data do not match, it is determined that there is an abnormality in the NVM operation at this check address.
Predetermined error handling is performed.

After this, it is checked whether there is an address left to check next (step 40B), and if there is an address left to check next, the address to be checked next is set as the check address (step 407), and then Operational checking continues (step 401). If there is no address to be checked next, it is assumed that all addresses are operating normally and the process is terminated.

Conventionally, the operation of a predetermined area of the NVM was checked in this way without destroying the data stored in that area.

By the way, in the above-mentioned NVM management method, the data stored in the NVM is prevented from being destroyed by saving the initial data of the check address to the RAM and then writing the check data to the check address.

However, if the electronic device is powered off between steps 402 and 404, the initial data of the check address stored in the volatile RAM will be lost, and the check address of the NVM will contain no check data. There was a problem that the data remained written.

(Problem to be Solved by the Invention) As described above, in the conventional nonvolatile memory management method, if the power of an electronic device is turned off while checking the operation of the nonvolatile memory, depending on the timing, the nonvolatile memory may There was a problem that the memory contents of the computer would be destroyed.

The present invention has been made in view of the above-mentioned problems, and provides a nonvolatile memory management method that can compensate for the stored contents of the nonvolatile memory even if the power is cut off during an operation check of the nonvolatile memory. It is.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides an electronic device including a nonvolatile memory.
When checking the storage contents of a predetermined storage area of the non-volatile memory, compensation information consisting of at least the storage contents of the storage area and position information of the storage area on the non-volatile memory, and the storage area are stored in the non-volatile memory. A setting area is provided for setting a flag indicating whether or not a check is being performed, and when checking the storage area, the compensation information is set in the setting area and the flag is set; When the check of the storage area is completed, the flag is set to a reset state, and if the set state of the flag is detected after the electronic device is powered on, the flag is reset based on the compensation information set in the setting area. The storage contents of the storage area are for compensation.

(Function) In the present invention, when checking the storage contents of the nonvolatile memory, information regarding the storage area to be checked is set in a predetermined setting area of the nonvolatile memory.

Therefore, even if the power is turned off during a check and the data in the storage area being checked remains incorrect, the next time it is started, the data will be correct based on the information set in the setting area. It can be compensated.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing a memory arrangement in a nonvolatile memory (hereinafter abbreviated as NVM) management system according to an embodiment of the present invention.

In the same figure, 10 is an NVM that can read and write 8-bit data such as EE-PROM or battery-backed RAM to any address, and 20 is also an 8-bit memory.
It is a volatile RAM in which bit data can be written to an arbitrary address.

NVMIO stores data that must be maintained at all times.

Particularly important data among the data stored in NVMIO, such as the dialing number of a wireless telephone device, is stored in the data area 11, and in order to ensure the reliability of the electronic device, the data area is saved every time the electronic device is started. 11 is checked for operation.

As a work area during this operation check, a setting area 12 is set in NVMlo, and an initial pig save area 21 is set in RAM 20.
is provided.

Note that CA is the address to be checked in the data area 11, DT is the initial data stored in address CA,
SAI to SA3 indicate addresses of each data set in the setting area 12.

The procedure for checking the operation of NVM using the memory arranged in this way will be explained according to the flowchart shown in FIG.

First, the initial data DT stored in the check address CA is stored in the initial data storage address SA2 (step 201).

Next, the address value of the check address CA is stored in the check address value storage address SA3 (step 2
02).

Further, an inversion flag indicating that the data at the check address CA is inverted is set in the data inversion flag storage address SAI (step 203). This means that, for example, “OIH
This is done by storing ``.

Through the above operations, check address information consisting of initial data, check address value, and data inversion flag is set in the NVMIO setting area 12.

Further, the initial data DT is saved in the initial pig save area 2 of the RAM 20 (step 204).

Thereafter, check data obtained by logically inverting each bit of the initial data DT is written to the check address CA (step 205). This means that the initial data DT of the check address CA is, for example, "], 0101111
B'', each bit is logically inverted and is 01.010.
000 B" is written to check address CA.

Then, the check data written to the check address CA is read (Step 206), and the read check data is compared with the logically inverted version of each bit of the initial data DT saved in the initial data save area 2]. (step 207). This means that the check data written to the check address CA is the initial data DT (“1010
11], IB”) is logically inverted (“O]010000B”), so if the operation at this address is normal, the read check data will also be '010
10000B". Therefore, the read check data and each bit of the initial data DT saved in the initial data save area 21 are logically inverted ("010").
, 0000 B"), and if they match, it is determined that the operation of the check address CA is normal, and the initial data DT saved in the initial data save area 2 is transferred to the check address CA. (step 208).

Note that if the comparison result is a mismatch, predetermined error processing is performed.

After this, the data inversion flag is reset.

This is done by storing, for example, "OOH" in the data inversion flag storage address SA].

Then, it is checked whether there are any remaining addresses to be checked next (step 210).

As a result of the investigation, if there are any addresses left to check,
Set the next check address (step 21.1),
The operation of the check address is checked (step 201). Note that if there are no addresses remaining to be checked, the process ends.

In the operation check flow described above, step 20
If the electronic device is powered off between Step 5 and Step 207, the check data will remain written in the check address CA.

2 However, since the check address compensation information is set in the setting area 12 of NVMl,0, it is possible to compensate the data of the check address CA to the initial data DT based on this.

FIG. 3 is a flowchart showing a procedure for compensating data of check address CA based on check address compensation information.

First, the contents of the data inversion flag storage address SA in the setting area 12 of N VM ], 0 are read to check whether the data inversion flag is set. (Step 301).

As a result, the data inversion flag is set (the content of the data inversion flag storage address SAI is “OIH
”), the initial data DT stored in the initial data storage address SA2 is returned to the check address CA indicated by the address value stored in the check address value storage address SA3 (step 302).Note that the data is being inverted. If the flag is set (the content of the data inversion flag storage address SAI is "OOH"), the data stored in the 3-check address CA has not been destroyed, and the process ends.

Next, the data inversion flag is reset (step 303). This is done by writing "00H" to the data inversion flag storage address SAI, similarly to step 209.

Therefore, the power was cut off during the operation check and the NVMIO
Even if the data stored in the NV becomes invalid, the NV
Since the check address information is stored in the setting area 12 of the MIO, it is possible to compensate the data of the check address CA to the initial f-date DT based on this information.

In addition, in the above embodiment, the blocks to be checked are 1
Although the explanation has been made for each address, the present invention is not limited thereto, and the operation check may be performed by dividing the data area 1 into blocks each consisting of a plurality of addresses.

Furthermore, although this embodiment has been explained using an example of an electronic device that handles 8-bit data, the present invention can be similarly applied to an electronic device that handles data other than 8-bit, such as 16-bit.

Furthermore, although the check data is obtained by logically inverting each bit of the initial data, check data composed of other bit patterns may be used.

Further, in this embodiment, the initial data saved on the RAM is returned to the check address, but the initial data set in the NVM setting area may be returned to the check address without using the RAM.

[Effects of the Invention] As described above, in the present invention, information regarding the storage area to be checked in the nonvolatile memory is set in a predetermined setting area of the nonvolatile memory.

Therefore, even if the power is turned off during the check and the stored contents in the storage area being checked in the nonvolatile memory remain invalid, they will be set in the setting area the next time the device is started. The content in the storage area can be correctly compensated based on the information that is stored in the storage area.

] 5

[Brief explanation of drawings]

FIG. 1 is a diagram showing a memory arrangement in a non-volatile memory management system according to an embodiment of the present invention, FIG. 2 is a flowchart showing a procedure for checking the operation of non-volatile memory in the embodiment, and FIG. FIG. 4 is a flowchart showing the procedure for compensating data in the nonvolatile memory in this embodiment, and FIG. 4 is a diagram showing the procedure for checking the operation of the nonvolatile memory in the conventional example. 10...NVM, core i...data area, 12...
Setting area, 20...RAM, 21...Evacuation area, C
A...Check address, DT...Initial data, SA
I: Pig inversion flag storage address, SA2: Initial data storage address, SA3: Check address value storage address.

Claims (5)

[Claims] (1) In an electronic device equipped with a non-volatile memory, when checking the storage contents of a predetermined storage area of the non-volatile memory, at least the storage contents of the storage area and the non-volatile storage area of the storage area are stored in the non-volatile memory. A setting area is provided for setting compensation information consisting of position information on the memory and a flag indicating whether or not the storage area is being checked, and when checking the storage area, the compensation information is set in the setting area. When setting the flag, the flag is set to a set state, and when the check of the storage area is completed, the flag is set to a reset state, and if the set state of the flag is detected after the electronic device is powered on, A nonvolatile memory management method, characterized in that storage contents of the storage area are compensated based on the compensation information set in the setting area. (2) Non-volatile memory is EE-PROM (Elect
Rally Erasable and Prog
2. The non-volatile memory management method according to claim 1, wherein the non-volatile memory is a non-volatile memory (ROM). (3) The nonvolatile memory management method according to claim 1, wherein the electronic device is a wireless telephone device. (4) The nonvolatile memory management system according to claim 1, wherein the operation check is performed by inputting/outputting predetermined check data to the nonvolatile memory. (5) The non-volatile memory management system according to claim 1, wherein the area in which the operation check is performed consists of one address.