JPH03220758A - Package for resin sealing type semiconductor - Google Patents
Package for resin sealing type semiconductorInfo
- Publication number
- JPH03220758A JPH03220758A JP1554790A JP1554790A JPH03220758A JP H03220758 A JPH03220758 A JP H03220758A JP 1554790 A JP1554790 A JP 1554790A JP 1554790 A JP1554790 A JP 1554790A JP H03220758 A JPH03220758 A JP H03220758A
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor package
- thermoplastic resin
- resin sheet
- underside
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、樹脂封止型半導体用パッケージ（以下半導体
用パッケージと略称する）に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a resin-sealed semiconductor package (hereinafter abbreviated as semiconductor package).
従来の技術
従来、半導体用パッケージを両面基板に実装する場合、
まず片面に半導体用パッケージを実装し半田リフロー炉
で半田付を行ない、実装基板を裏がえしもう一度同し行
程を行ない両面実装していた。この２回目の半田リフロ
ー工程でパッケージクラックが発生することがある。Conventional technology Conventionally, when mounting a semiconductor package on a double-sided board,
First, a semiconductor package was mounted on one side, soldered in a solder reflow oven, then the mounting board was turned over and the same process was performed again to mount both sides. Package cracks may occur during this second solder reflow process.
第３図は従来の方法により実装された半導体用パッケー
ジの側面図を示し、第４図は同パッケージクラックが発
生した状態を示す要部拡大断面図を示す。FIG. 3 shows a side view of a semiconductor package mounted by a conventional method, and FIG. 4 shows an enlarged cross-sectional view of a main part showing a state in which cracks have occurred in the package.
第３図において、半導体用パッケージＢは実装基板３に
外部リード４を介して半田接合により固着され、２は半
田接合部である。In FIG. 3, a semiconductor package B is fixed to a mounting board 3 via an external lead 4 by soldering, and 2 is a solder joint.
第４図において、ダイパッド７上にチップ６が固着され
、５は半田リフロー工程で半導体用パッケージの下面に
発生したパッケージクラックである。その他各部の符号
とその構成は第３図と同様であるため説明を省略する。In FIG. 4, a chip 6 is fixed on a die pad 7, and 5 is a package crack that occurs on the lower surface of the semiconductor package during the solder reflow process. Since the symbols and configurations of other parts are the same as those in FIG. 3, their explanations will be omitted.
発明が解決しようとする課題
このような従来の構成では１回目に実装した半導体用パ
ッケージは、２回目の半田リフロー炉中では半導体用パ
ッケージのリードの半田接着力によってのみで支えられ
ているため脱落するという課題があった。また近年実装
密度の向上とデツプのシュリンク化にともなうパッケー
ジの多ピン大型化２発熱量増加のため放熱板付半導体用
パッケージなどの出現により、半導体用パッケージ１個
当りの重量が大きくなり、前記課題がクローズアップさ
れて来ている。Problems to be Solved by the Invention In such a conventional configuration, the semiconductor package mounted the first time may fall off during the second solder reflow oven because it is supported only by the solder adhesive force of the semiconductor package leads. There was an issue to do. In addition, in recent years, the number of pins and the size of packages have increased due to improvements in packaging density and shrinking of the depth.2 Due to the increase in heat generation, the weight of each semiconductor package has increased due to the appearance of semiconductor packages with heat sinks. It's getting close up.
また１回目の後、２回目の半田リフロー炉を通ずまでに
長時間を要する場合、１回目に実装した半導体用パッケ
ージが吸湿をしてしまい、特に近年開発されている薄型
表面実装型半導体用パッケージにおいては２回目の半田
リフロー工程でパッケージクラックが発生し、信頼性が
著しく低下するという課題が生じている。本発明はこの
ような課題を解決するもので、半導体用パッケージの半
田リフロー炉での脱落と、パッケージクラックの発生に
よる信頼性の低下を防止することを目的とする。In addition, if it takes a long time to go through the solder reflow oven for the second time after the first solder reflow, the semiconductor package mounted in the first time will absorb moisture, especially for thin surface mount semiconductors developed in recent years. In the package, a problem arises in that package cracks occur during the second solder reflow process, resulting in a significant decrease in reliability. The present invention is intended to solve these problems, and aims to prevent a semiconductor package from falling off in a solder reflow oven and a decrease in reliability due to the occurrence of package cracks.
課題を解決するための手段
この課題を解決するため、本発明は半導体用パッケージ
の下面に熱可塑性樹脂シートを貼り付けた構成とする。Means for Solving the Problems In order to solve this problem, the present invention has a configuration in which a thermoplastic resin sheet is attached to the bottom surface of a semiconductor package.
作用
この構成により、半導体用パッケージと実装基板とが熱
可塑性樹脂シートにより接着固定され、脱落を防止し、
またパッケージクラックが半導体用パッケージの下面に
生した場合でも熱可塑性樹脂で覆われているため、信頼
性の低下を防止することとなる。Effect: With this configuration, the semiconductor package and the mounting board are adhesively fixed by the thermoplastic resin sheet, preventing them from falling off.
Furthermore, even if a package crack occurs on the bottom surface of the semiconductor package, it is covered with the thermoplastic resin, thereby preventing a decrease in reliability.
実施例
第１図は本発明をＳＯタイプの半導体用パッケージに実
施したときの一実施例を示したものであり、第２図は同
パッケージクラックが発生した状態を示す要部断面図で
ある。第１図において、下面に熱可塑性樹脂シート１を
貼り付けた半導体用パッケージＡは実装基板３に外部リ
ード４を介して半田接合により固着され、２は半田接合
部である。実装基板３と半導体パッケージ下面との間隔
は通常０ 、１ ｍｍ程度であるため、熱可塑性樹脂シ
ートとして厚さ０．１５〜０ 、２０ ｍｍのポリフェ
ニレンザルファイドなどのなかから効果の大きなものを
選択できる。第２図において、ダイパッド７上にチップ
６が固着され、５は半田リフロー工程で半導体用パッケ
ージの下面に発生したパッケージクラックである。その
他各部の符号とその構成は第１図と同様であるため説明
を省略する。第２図に示すように、パッケージクラック
５が発生しても、その箇所を熱可塑性樹脂シート１で覆
っているため信頼性の低下を防止することができる。Embodiment FIG. 1 shows an example in which the present invention is applied to an SO type semiconductor package, and FIG. 2 is a sectional view of a main part of the same package showing a state in which cracks have occurred. In FIG. 1, a semiconductor package A having a thermoplastic resin sheet 1 attached to the bottom surface is fixed to a mounting board 3 by soldering via external leads 4, and 2 is a solder joint. Since the distance between the mounting board 3 and the bottom surface of the semiconductor package is usually about 0.1 mm, a highly effective thermoplastic resin sheet such as polyphenylene sulfide with a thickness of 0.15 to 0.20 mm is selected. can. In FIG. 2, a chip 6 is fixed on a die pad 7, and 5 is a package crack that occurs on the lower surface of a semiconductor package during a solder reflow process. The symbols and configurations of other parts are the same as those in FIG. 1, so their explanations will be omitted. As shown in FIG. 2, even if a package crack 5 occurs, since the crack is covered with the thermoplastic resin sheet 1, a decrease in reliability can be prevented.
本発明の半導体用パッケージは、多ピン大型パッケージ
、放熱板付パッケージ、薄型表面実装用パッケージに用
いるときに特に有効である。The semiconductor package of the present invention is particularly effective when used as a multi-pin large package, a package with a heat sink, and a thin surface mounting package.
発明の効果
以上のように本発明の詳細な説明から明らかなように本
発明によれば半導体用パッケージ下面に熱可塑性樹脂シ
ートを貼り付けた構成とすることにより半田リフロー炉
での脱落の防止とパッケージクラックによる信頼性の低
下を防止することができるという効果が得られる。Effects of the Invention As is clear from the detailed description of the present invention, according to the present invention, by affixing a thermoplastic resin sheet to the lower surface of a semiconductor package, it is possible to prevent the solder from falling off in a solder reflow oven. This provides the effect of preventing a decrease in reliability due to package cracks.
第１図は本発明にかかる樹脂封止型半導体用パッケージ
の形状を示す側面図、第２図は本発明の樹脂封止型半導
体用パッケージの形状を示す側面図、第４図は従来の樹
脂封止型半導体用パッケージにクラックが発生した状態
を示す要部拡大断面図である。
Ａ・・・・・・半導体用パッケージ、１・・・・・・熱
可塑性樹脂シート。FIG. 1 is a side view showing the shape of a resin-sealed semiconductor package according to the present invention, FIG. 2 is a side view showing the shape of a resin-sealed semiconductor package of the present invention, and FIG. 4 is a side view showing the shape of a resin-sealed semiconductor package according to the present invention. FIG. 2 is an enlarged cross-sectional view of a main part showing a state in which a crack has occurred in a sealed semiconductor package. A... Semiconductor package, 1... Thermoplastic resin sheet.
Claims (1)
る樹脂封止型半導体用パッケージ。A resin-sealed semiconductor package characterized by having a thermoplastic resin sheet attached to the bottom surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1554790A JPH03220758A (en) | 1990-01-25 | 1990-01-25 | Package for resin sealing type semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1554790A JPH03220758A (en) | 1990-01-25 | 1990-01-25 | Package for resin sealing type semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03220758A true JPH03220758A (en) | 1991-09-27 |
Family
ID=11891809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1554790A Pending JPH03220758A (en) | 1990-01-25 | 1990-01-25 | Package for resin sealing type semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03220758A (en) |
-
1990
- 1990-01-25 JP JP1554790A patent/JPH03220758A/en active Pending
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