JPH03224242A - High voltage MOS transistor and its manufacturing method - Google Patents

Abstract

PURPOSE:To improve breakdown strength and drive a large current by forming an oxide film on a low concentration drain layer and a high concentration drain layer, whose film thickness dereases the electric field intensity of the drain part, and makes the low concentration drain layer generate intensive inversion under an applied voltage. CONSTITUTION:An isolation oxide film 2, an oxide film 3, and a silicon nitride film 4 are formed on a P-type substrate 1, and the film 4 except the part on a channel region is etched and eliminated. A low concentration drain layer 5 and a high concentration drain layer 6 are formed by self-alignment ion implantation using a pattern of the film 4 as a mask. An oxide film 8 is formed on the layers 5 and 6 so as to have a thickness to decrease the electric field intensity of the drain part and make the layer 5 generate intensive inversion. Hence high breakdown strength structure and superior driving capability can be realized by selecting the thickness of the film 8, so that an MOS transistor having high breakdown strength and capable of driving a larger current can easily be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides an MO with high withstand voltage and good drive ability.
S) Regarding a transistor and its manufacturing method.

[Conventional technology]

Conventionally, the high voltage MOS transistor in ■C is D-MO.
This has been achieved by creating an offset structure for the S or drain.

However, in the former case, although the gate length can be easily formed to about 1 μm, it requires a thermal process at high temperature and for a long time.

Furthermore, if the gate oxide film is made thinner in order to increase the current flow, the withstand voltage will decrease, resulting in contradictory characteristics between the withstand voltage and the drive capability.

Also, in the latter case, a long heat process at high temperature is not required (although it does increase the drain resistance and decrease the drive capacity, and as in the former case, the withstand voltage and drive capacity are contradictory characteristics). There is.

[Problem to be solved by the invention]

As described above, in the structure of the conventional high-voltage MOS transistor, it is difficult to provide a good drive ability as well as a breakdown voltage.

The present invention was made to solve the above problems.
An object of the present invention is to provide a MOS transistor having sufficient voltage resistance and drive capability, and a method for manufacturing the same.

[Means to solve the problem]

The present invention forms a pattern of a silicon nitride film covering the channel region, weakens the electric field strength of the drain part on the drain layer by oxidizing LOGO5 using the pattern as a mask, and strongly inverts the lightly doped drain part at the voltage used. Then, the silicon nitride film on the channel region is removed to form a gate oxide film, which creates an offset structure for the drain and reduces the on-resistance of the drain. .

〔Example〕

A manufacturing method will be described using an N-channel transistor as an example. The first part is an explanatory drawing showing the manufacturing method of the present invention.

A thick isolation oxide film 2 is formed on a P-type substrate 1 by the LOCOS method, and a thin (150 to 1000 oxide) oxide film 3 is formed on the surface of the active region [Figure (a)].

Next, a silicon nitride film 4 with a thickness of 500 to 2,000 thick is formed over the entire surface [Figure (BL)], and the silicon nitride film 4 other than on the channel region is removed by etching [Figure (C)]. Using the pattern of the silicon film 4 as a mask, self-line ion implantation is performed to cover it with a reduced cyst, and the high concentration drain layer 6 is formed at the same time as the source layer 7 by ion implantation [FIG. (e)].

Next, by thermal oxidation, the electric field strength of the drain portion on the low concentration drain layer 5 and the high concentration drain layer 6 is weakened, and the low concentration drain layer 5 is strongly inverted at the working voltage (usually 5 to 20 μm). An oxide film 8 is formed to a thickness of [Figure (f)].

In the case of an N-channel transistor, the oxide film on the heavily doped drain layer 6 is thicker than the oxide film on the lightly doped drain layer 5.

Next, the silicon nitride film 4 on the channel region is removed by etching [Figure (g)), a necessary gate oxide film 9 is formed, and an N-type polysilicon layer 10 is formed on the surface [Figure (h)].
)), this polysilicon layer 10 is patterned to form a polysilicon gate electrode 10a that partially overlaps the oxide film 8 on the low concentration drain layer 5 [see FIG.
].

The steps after the above steps, such as forming a protective film and wiring electrodes, are completely the same as in the conventional method, and therefore will not be explained.

The MOS transistor structured by the above process can have a high breakdown voltage structure and good drying ability by selecting the thickness of the oxide film 8.

A channel is formed in the lightly doped drain layer 5, and the on-resistance can be reduced.

〔Effect of the invention〕

As explained above, according to the present invention, an MO can easily drive a large current with a high withstand voltage through a simple process.
S) Rungis can be obtained, which has a great practical effect.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing the manufacturing method of the present invention. DESCRIPTION OF SYMBOLS 1... P-type substrate, 2... Isolation oxide film, 3... Oxide film, 4... Silicon nitride film, 5... Low concentration drain layer, 6... High concentration drain layer, 7 ...source layer, 8
...Oxide film 9...Gate oxide film, Process 0...Polysilicon layer, 10a...Polysilicon gate electrode. Note that the same reference numerals in the figures indicate the same parts.

Claims (2)

[Claims] (1) Separated by a thick LOCOS oxide film, a low concentration drain layer is provided between the high concentration drain layer and the channel layer, and the electric field strength of the drain part is weakened and used on the high concentration drain layer and the low concentration drain layer. A polysilicon gate electrode that has an oxide film thick enough to strongly invert the lightly doped drain portion with a voltage (usually 5 to 20 V), and partially overlaps the upper lightly doped drain layer via the oxide film. A high voltage MOS transistor characterized by being equipped with. (2) Form a thick LOCOS oxide film for element isolation, form a thin oxide film in the active region, and form a silicon nitride film on the entire surface, leaving only the silicon nitride film on the channel region and covering other parts. A step of removing the silicon nitride film by etching and forming a low concentration drain layer by ion implantation using the silicon nitride film on the channel region as a mask, and covering a part of the low concentration drain layer on the channel layer side with photoresist and by ion implantation. A highly doped drain layer is formed at the same time as the source layer, the electric field strength of the drain part is weakened on the lightly doped drain layer and the highly doped drain layer by thermal oxidation, and the low doped drain layer is formed at the working voltage (usually 5 to 20 V). An oxide film with a thickness such that the layer is strongly inverted is formed, the silicon nitride film on the channel region is removed, a gate oxide film with a predetermined thickness is formed, and a portion of the silicon nitride film is formed on the gate oxide film. A method of manufacturing a high voltage MOS transistor, comprising the step of forming a polysilicon gate electrode overlapping an oxide film on a low concentration drain layer.