JPH03225559A - Printed circuit board layout device - Google Patents

Abstract

PURPOSE:To improve the efficiency of layout work by sorting respective logical elements from circuit diagram information in accordance with driving power sources, calculating the number of IC packages for allocating the logical elements in each logical element group and then allocating respective logical elements. CONSTITUTION:A logical element sorting means 12 sorts logical elements to be specified by the identification (ID) names of parts and ID codes out of circuit diagram information read out by a circuit diagram information reading means 11 in accordance with the parts ID names and the driving power sources. An automatic IC package calculating means 13 calculates the number of IC packages necessary for the allocation of all logical elements based upon the information of the maximum logical element allocation number out of the circuit diagram information read by the means 11 in each logical element group sorted by the means 12. An automatic logical element allocating means 14 automatically allocates respective logical elements sorted by the means 12 to IC packages calculated by the means 13. An allocated data storage means 15 stores data allocated by the means 14 and an allocated data writing means 16 writes the allocated data in a circuit diagram information storing means 10.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a printed circuit board layout device that layouts a printed circuit board from circuit diagram information created by an electrical circuit diagram creation device using CAD, etc. The present invention relates to a technique for automatically allocating a large number of logic elements to an IC package.

[Conventional technology]

In recent years, electrical circuit diagrams are often created using electrical circuit diagram creation devices such as CAD, and mounting information is also added to the circuit diagram information (data) (for example, Japanese Patent Laid-Open No. 63 (Refer to Publication No. 206869) 9 However, in order to lay out an actual printed circuit board from the created circuit diagram, each logic element in one circuit diagram must be
Must be assigned to the C package.

Furthermore, in this case, each logic circuit must be assigned to an IC package that matches its driving power source.

Therefore, in conventional printed circuit board layout apparatuses, an operator generally manually finds logic elements from a circuit diagram spanning many pages, classifies them according to drive power sources, and assigns them to required ICs.

[Problem to be solved by the invention]

However, in this conventional manual allocation of logic elements, if the 16 circuit diagram is complex and spans many pages, it is difficult to extract the logic elements.

It took a lot of work time to assign two categories.

In addition, in the printed circuit board layout equipment, not only is it time-consuming to manually define the open power supply to the IC package and the assignment of the IC package, but also the drive power supply for the IC element is manually defined. Sometimes I made mistakes.

This invention has been made in view of the above points, and it is possible to automatically allocate each logic element to an IC package correctly from the created circuit diagram information, thereby improving work efficiency of printed circuit board layout. , the purpose is to enable the driving power source of each IC element to be defined without error.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a circuit diagram and identification names of each component used in the circuit.

A circuit diagram information storage means stores circuit diagram information including component information such as identification code, drive power supply, and number information for maximum logic element allocation to one IC package, and the circuit diagram is stored from this circuit diagram information storage means. A circuit diagram information reading means for reading information, a logic element classification means for classifying logic elements that can be identified by component identification names and identification codes in the read circuit diagram information by component identification names and drive power supplies, IC package automatic calculation means calculates the number of IC packages required to allocate all the logic elements based on the information on the maximum logic element allocation among the circuit diagram information read for each logic element group read above. , a logic element automatic allocation means for allocating each logic element classified by the logic element classification means to each IC package calculated thereby, and an allocation data storage means for storing data for the allocation. A layout device is provided.

[For production]

With the above-described configuration, the printed circuit board layout device according to the present invention reads required circuit diagram information from the circuit diagram information storage means, and automatically sorts logic elements in the circuit diagram information according to their component identification names and drive power supplies. Then, for each classified logic element group, the maximum logic element allocation of the above circuit diagram information automatically calculates the number of IC packages required to allocate all the logic elements based on the number information. The calculated logical elements are automatically allocated to each IC package, and the data for the allocation is stored in the data storage means.

Therefore, each logic element can be automatically and correctly allocated to a required IC package from the created circuit diagram information.

〔Example〕

Embodiments of the present invention will be specifically described below with reference to the drawings.

FIG. 2 is a block diagram showing the configuration of a printed circuit board layout apparatus according to an embodiment of the present invention, in which a data processing section 1 is a section that executes various processes according to the present invention.
A microcomputer consisting of a CPU, ROM, RAM, etc. is used.

This data processing unit 1 includes a keyboard 2 for inputting operation information from an operator, a memory 3 for storing created circuit diagram information and layout data, and a CRT display for displaying layout information. FIG. 1 is a functional block diagram showing the functions of this printed circuit board layout apparatus according to the present invention, in which a device 4 and a printer 5 for printing out are respectively connected.

That is, this printed circuit board layout apparatus includes circuit diagram information storage means 102 circuit diagram information reading means 11. Logic element classification means 12. IC package automatic calculation means 13. Logic element automatic allocation means 142 allocation is performed by data storage means 15. and layout are provided with each function of the data writing means 16.

The circuit diagram information storage means 10 stores the created circuit diagram and the identification name of each component used in the circuit.

It stores component information such as identification code and active power supply, maximum logic element allocation to one IC package, number, and circuit diagram information including address and other information, as shown in Figure 2. A part of memory 3 is used.

The circuit diagram information reading means 11 reads designated circuit diagram information from the circuit diagram information storage means 10 stored therein.

The logic element classification means 12 classifies logic elements that can be identified by the component identification name and identification code from the circuit diagram information read by the circuit diagram information reading means 11, based on the component identification name and drive power source.

The IC package automatic calculation means 13 calculates the maximum logic element allocation among the circuit diagram information read by the circuit diagram information reading means 11 based on the number information for each logic element group classified by the logic element classification means 12. Calculate the number of IC packages required to allocate all logic elements.

The logic element automatic allocation means 14 automatically allocates each logic element classified by the logic element classification means 12 to each IC package calculated by the IC package automatic calculation means 13.

For the allocation, the data storage means 15 is the logical element automatic allocation means 1.
The allocation according to No. 4 stores data, and the allocation data writing means 16 writes the data into the circuit diagram information storage means 10.

FIG. 3 is a flowchart showing the processing by the data processing unit 1 of FIG. 2 that executes each of these functions.

Hereinafter, the operation of this embodiment will be explained according to this flowchart.

First, in step 1, when the same circuit name is input from the keyboard 2, in step 2, the component identification code indicating the logic element and the IC package in the circuit diagram information of the specified circuit diagram are stored in the memory 3. Reads only the component information that has the component identification code shown and the identification code showing the power supply.

Then, in steps 3 and 4, it is checked whether the drive power supply information is included in the component name of the logic element (already entered), and if there is not, in step 5 the component name has the identification code that indicates the power supply read earlier. The names of the power sources are displayed on the CRT display device 4, and the operator selects the drive power source from among the power sources and inputs it using the keyboard 2.

Next, in step 6, each logic element is classified by component identification name and drive power source.

Thereafter, it is determined whether the printed circuit board layout of this circuit diagram is a new layout or a layout of a design change based on input from the keyboard 2 by the operator.

If it is a new layout, proceed to step 8, and regardless of the presence or absence of the loaded IC package, for each logic element group classified in step 6, the maximum logic element allocation that each component has is determined by the number required for each classification. Automatically calculates the number of IC packages.

Next, in step 9, logic elements are allocated to each IC package calculated for each classified logic element group by the number corresponding to the maximum logic element allocation.

In step 10, the data is written in the memory 3 in a certain format and displayed on the CRT display device 4 at the same time.

Furthermore, in step 11, the assignment writes the data into the circuit diagram stored in the memory 3.

The data to be written includes the IC package identification name, identification code, and drive power source calculated in step 8, and the IC package identification name and allocation address of each logic element allocated in step 9.6 On the other hand, in step If it is determined in step 7 that the layout is not a new layout but a design change, proceed to step 12, and for each logic element group classified in step 6, the ICs that each component has and were assigned when it was laid out last time are
Attempts to allocate the IC package read in step 2 using the package name and allocation address.

Here, three types of data checks are performed.

Data check (2) in step 13 is a check to see if the logic element to be allocated has the data allocated during the previous layout.

Data check ■ in step 14 shows that the assigned IC package identification name of the logic element is the same as in step 2.
This is a check to see if it exists in the IC package identification name read in.

The data check (2) in step 15 is a check to check that the assigned address of the logic element is not used by another logic element and that the driving power source is the same.

Those that pass these three checks are allocated as they are in step 16, and those that do not pass any one of them are checked in step 17, where the allocated IC package identification name and allocation of the logic element are determined. Clear the address and use it as a newly generated logic element.

Then, in step 18, the newly generated logic element is transferred to the IC package read in step 2.
The allocation is performed while applying the same checks as in step 5.

If all IC package addresses for primary allocation are exhausted, proceed from step 19 to step 20, generate IC packages one by one, and step 1
The assignment of 8 is processed.

When all the logic elements have been assigned, in step 21 an IC package to which no logic element has been assigned is searched for and written into the memory 3.

Then, in step 22, the allocated data is displayed on the CRT display device 4, and certain data is written in the memory 3.

Next, in step 23, the allocation writes the data into the circuit diagram. At this time, only the increased IC packages are written, and the IC packages searched in step 21 to which no logic element has been assigned are deleted from the circuit diagram.6 Other data to be written in the circuit diagram is the same as step 11. .

After writing the layout data on the circuit diagram in step 11 or 23, if it is desired to output the layout data, the printer outputs the data as a list.

During printed circuit board layout, step 10°21.
At step 22, the data written in the memory 3 is read into the layout device.

According to this embodiment, work efficiency can be greatly improved not only when creating a new layout but also when designing a layout (re-layout) due to design changes.

〔Effect of the invention'〕

As explained above, according to the present invention, each logic element is classified according to the driving power source from circuit diagram information, and the number of IC packages for allocating logic elements to each logic element group is determined. Calculate it.

Each logic element is automatically assigned correctly and the assignment data is memorized, which greatly improves the efficiency of printed circuit board layout work, eliminates the possibility of assigning the wrong drive power supply, and improves layout quality. It also improves.

[Brief explanation of drawings]

FIG. 1 is a functional block diagram showing the functional configuration according to the present invention in the embodiment shown in FIG. 2, FIG. FIG. 3 is a flow diagram showing processing by the data processing section of FIG. 2; 1...Data processing unit 2...Keyboard 3...
Memory 4... CRT display device 5... Printer 10... Circuit diagram information storage means 11...
Circuit diagram information reading means 12...logic element classification means 13...IC package automatic calculation means 14...logic element automatic allocation means 15...data storage means 16...allocation is done by data writing means Figure 1 Figure 2

Claims (1)

[Claims] 1. A circuit including a circuit diagram and component information such as the identification name, identification code, and drive power source of each component used in the circuit, and information on the maximum number of logic elements allocated to one IC package. a circuit diagram information storage means for storing diagram information; a circuit diagram information reading means for reading the circuit diagram information from the circuit diagram information storage means; and an identification name of a component in the circuit diagram information read by the means; Logic element classification means for classifying logic elements that can be identified by identification codes by component identification name and drive power supply; The I required to allocate all the logic elements based on the information on the number of element allocations.
IC package automatic calculation means for calculating the number of C packages; logic element automatic allocation means for allocating each logic element classified by the logic element classification means to each IC package calculated by the means; 1. A printed circuit board layout apparatus comprising: layout data storage means for storing layout data by the means.