JPH0322557A - Hybrid integrated circuit device - Google Patents

Abstract

PURPOSE:To enable a hybrid integrated circuit device to be miniaturized by a method wherein program data are written in an EPROM in serial signals through the intermediary of a parallel/serial conversion circuit by the use of a write only conductive path. CONSTITUTION:A switch is connected between an EPROM 4 and a microcomputer 5. The switch is electrically connected to the microcomputer 5 when the EPROM 4 is put in a normal operation, and it is electrically disconnected from the microcomputer 5 when data are written in the EPROM 4. On the other hand, one end of the switch whose other end is connected to the microcomputer 5 is connected to a parallel/serial conversion circuit 101 and then connected to write terminals 21 and 22, which are used for writing data in the EPROM 4 in serial signal, through the parallel/serial conversion circuit 101. That is, terminals 1-20 serve as read only (in normal operation) terminals and the terminals 21 and 22 serve as write only terminals. A terminal 23 serves as a conversion input only terminal used for converting the switch.

Description

[Detailed description of the invention] (A) Industrial application field The present invention is directed to mounting a chip-type non-volatile memory such as EFROM (ultraviolet erasable programmable read memory) on an integrated circuit board. The present invention relates to a hybrid integrated circuit device with a built-in EPROM that is capable of erasing, writing, and rewriting.

(B) Prior Art Recently, electronic devices using microcomputers have been used in many fields such as electronics, aviation, machinery, and automobiles. The reason behind this is that multifunctional operations can be easily realized by using a microcomputer. The programs and data that determine their operations tend to increase in capacity year by year as electronic devices become more multifunctional. Furthermore, the program data for operating a microcomputer is not necessarily constant from the design of the electronic device, and in reality, the program design may be changed several or even dozens of times before the electronic device is completed.

As mentioned above, in the field of electronic equipment, EPRO
There is a trend that integrated circuits equipped with M are required.

EP that has an ultraviolet irradiation window that can erase and rewrite previously written memory information by irradiating it with ultraviolet rays.
ROM elements are favorably used in various electronic devices.

Most of these EFROM elements are currently mounted on printed wiring boards together with control or driving integrated circuits, and are usually mounted on easily removable printed wiring boards in order to rewrite the information once written. has been implemented. Various electronic devices that require smaller size and lighter weight are equipped with semiconductor integrated circuits (ICs) on printed wiring boards using a technique called chip-on-board.
After the chip is directly mounted and the required wiring is provided, the IC chip, including the wiring portion, is covered with a synthetic resin, thereby achieving an extremely small size and light weight.

On the other hand, EPROM chips that require an ultraviolet irradiation window cannot be made smaller and lighter because the irradiation window is a bottleneck and they are still manufactured in a cerdip package and mounted on a printed wiring board.

The mounting structure of such a conventional EFROM element will be explained with reference to FIG. 14. FIG. 14 is a perspective view with a partial cross section of a conventional EPROM element, in which a conductive wiring pattern (41) is formed on the main surface. Through holes (
EPRO is incorporated into a Zardip type package in 43〉.
An M element (44) is mounted. This EPROM element (44) is connected to the header (
45) and a cap (46), and the header
45> is an external lead (4) on the ceramic base material (47).
8> or bonded with a low melting point glass material. In addition, this header (45>) has an element mounting part (50) made of sintered so-called gold paste in which a large amount of gold powder is mixed into glass, which is bonded onto the low melting point glass material or the ceramic base material (47>). This element mounting part (50) has an EPROM chip (51).
) is installed with the ultraviolet irradiation side facing up, and this chip (5
The electrode 1) and the external lead (48) are connected by a thin metal wire (52). Said Kikitsubu (46
) is a storage member, which includes a ceramic base material (54) having a window (53) in a portion facing the ultraviolet irradiation surface of the EPROM chip (51), and this key (46) is made of low melting point glass. EP placed in the header (45>
The ROM chip (51) is sealed. EPR like this
EPROM element (44) with sealed OM chip (51)
is fixed with solder by inserting the external lead (48) into the through hole <43> of the insulating substrate (42).The through hole (43) is connected to the required wiring by the conductive wiring pattern (41). The male connector terminal portion (55
> is connected to a female connector (not shown).

Now, the mounting structure of such a conventional EPROM element is
Compared to the ROM chip (51), the package external shape is extremely large, and not only the surface area is occupied but also three-dimensional, that is, the height is several times the height of the chip, which is extremely disadvantageous for thinning. Furthermore, after the external lead is inserted into the through hole (43), it is necessary to fix it with solder or the like. Another major drawback that should be noted is that EF is not performed before mounting on an insulating board.
This means that the ROM element is once assembled into a package.

Since the EFROM element has a window for irradiating ultraviolet rays, its package is assembled into a Zardip-type package made of ceramics, but since this package is sealed with low-melting glass, it can withstand high temperatures (400-500℃ C) If the thin metal wires that form a seal and connect the electrodes (aluminum) of the EPROM chip and the external lead-out nodes are not made of the same material, alloying will occur, resulting in an increase in wiring resistance or disconnection. Normally, thin aluminum wire is used to avoid this kind of situation, but this EPR
Because the OM chip requires the substrate to be at ground potential,
The ground electrode of the EFROM chip is connected by wire to the chip mounting portion formed of gold paste. Here, too, a secondary or multi-component alloy reaction progresses between the gold or foil in the gold paste and the aluminum, so a small piece of silicon whose head is coated with aluminum, called a ground die, is used as an EPROM. Separately from the chip, it is fixed to the chip mounting part that is better than the gold paste, and this ground die head and E
Conventional mounting structures are unsatisfactory in terms of small size, light weight, and low cost, as they involve extremely complicated work of connecting the PROM chip to the ground electrode.

In order to solve this problem, the EFROM shown in FIG.
There is an implementation structure.

The EPROM mounting structure shown in FIG. 15 will be explained below.

7 An insulating substrate (6
0> has a chip mounting area (60c) on which an EPROM chip (61) is placed, and the wiring pattern (60b)
) is routed from near this area on the main surface (60a) and connected to a male connector terminal portion (not shown).

The Elya (60c) has an EPROM chip (61)
is mounted, and the surface electrode of this chip (6l) and the wiring pattern (60b) are connected by a thin metal wire (62).Of course, one of the thin metal wires (62) is connected to the chip (6l).
In order to connect to the substrate of 61), this chip (
61) is wired with the wiring pattern (60b) mounted thereon. A UV-transparent resin (63) is placed on the UV-irradiated surface (61a) of the EPROM chip (61).
(For example, manufactured by Toray Industries, Model No. TX-978), an ultraviolet-transparent window material (64) is fixed thereto. This window material (64) is a known ultraviolet-transparent material such as quartz or transparent alumina. Since the top surface (64a) of the window material (64) is the surface that introduces light to the ultraviolet irradiation surface of the EPROM chip (61), the remaining window material excluding this top surface (64a) (64) portion,
The thin metal wire (62) and the connecting portion between the thin metal wire (62) and the wiring pattern (60b) are made of synthetic resin (65).
(For example, manufactured by Nitto Denko Corporation, model name MP-10). If it is necessary to further reduce the total thickness including the insulating substrate (60), the EFROM chip (61), and the window material (64), the chip mounting area (60c) of the substrate (60) This board (60〉) is used as a counterbored hole.
All you have to do is dig about half the thickness of the hole. Moreover, if such a counterbored hole is provided, a flow-stopping dam of synthetic resin (65) is formed, which effectively prevents moisture from entering.

The EPROM mounting structure shown in FIGS. 14 and 15 is described in Japanese Patent Laid-Open No. 60-83393 (IO5K1/18).

(c) Problems to be Solved by the Invention In the EFROM mounting structure shown in FIG. 15, since the EPROM chip is die-bonded onto the printed circuit board, it goes without saying that the size is reduced. However, the miniaturization referred to here is only the miniaturization of the EPROM itself. That is, although it is not clear from Fig. 15, since the microcomputer and its peripheral circuit elements fixed around the EPROM are composed of discrete electronic components, it is difficult to use the printed circuit board on which the EPROM is mounted. When looking at the entire system as an integrated circuit, there is a problem that the printed circuit board becomes larger as before, without any reduction in size, that is, the entire system becomes larger.

Furthermore, in the EFROM mounting structure shown in FIG.
Since the M chip is die-bonded, it is an EFROM.
Although chip programming and data can be easily erased,
Because rewriting after erasing is extremely difficult, for example, by the time a multifunctional integrated circuit equipped with an EFROM chip and a microcomputer is completed,
As mentioned above, several or even dozens of design changes, i.e.
There is a major problem in that it is difficult to easily respond to design changes, that is, changes to programs and data, because programs and data are changed and erasing and writing operations are required each time.

Furthermore, in the mounting structure shown in FIG. 14, as in FIG. 15, the peripheral circuits of the EFROM, that is, the circuit elements such as the microcomputer and its peripheral LSIs and ICs, are composed of discrete electronic components. However, there is a major problem in that the printed circuit board becomes larger, that is, the entire system becomes larger, and it is not possible to provide integrated circuits equipped with EPROMs that are light, thin, short, and small as required by users.

Furthermore, in the EFROM mounting structure shown in FIGS. 14 and 15, the entire system becomes larger as described above, and the conductive patterns that connect the EFROM and its surrounding circuit elements are exposed, which reduces reliability. There is a problem of deterioration.

Furthermore, in the EFROM mounting structure shown in FIGS. 14 and 15, the EPROM and surrounding circuit elements such as microcomputers, ICs, and LSIs are exposed, which creates unevenness on the top surface of the board, making it difficult to handle and work. There is a problem of deterioration.

(2) Means for Solving the Problems 1i The present invention has been made in view of the above-mentioned problems, and includes a chip-type EFROM mounted on a substrate and a monolithic EFROM.
It is equipped with a microcomputer connected to the ROM chip and its peripheral circuit elements, and the microcomputer and all its peripheral circuit elements are hermetically sealed by the case material, and only the EFROM chip is sealed by the hole provided in the case material. It has a structure mounted on an exposed substrate, and has a write-only mode used during a write operation to write predetermined program data to an EPROM chip, and a normal-only mode used during normal operation to read data from the EPROM chip. A plurality of switches for arbitrary conversion are connected to conductive paths on the board, and conductive paths for write-only mode and normal-only mode are formed on the board, and a parallel/serial conversion circuit is created using the write-only conductive paths. It is characterized in that program data is written into the EPROM using a serial signal via the .

Therefore, it is possible to provide a hybrid integrated circuit device with a built-in EPROM chip, which allows the hybrid integrated circuit equipped with an EFROM chip to be extremely miniaturized, and allows -12 erasing of the EPROM chip to be easily performed.

In addition, since a switch is provided to convert between write and normal dedicated modes, each dedicated mode can be set by converting the switch, and when in write-only mode, the write-only external lead fixed to the board can be used. Predetermined program data can be written to the EPROM.

Furthermore, when writing data to EPROM, data can be written using serial signals via a parallel/serial conversion circuit connected to the conductive path, so the number of external lead terminals dedicated to writing can be minimized. .

(E) Function As described above, according to the present invention, the EPROM is connected to the conductive path on the substrate.
Since the chip is connected and connected to the adjacent conductive path using a wire, the mounting position of the EPROM chip can be set arbitrarily, so it is possible to set the mounting position of the EPROM chip in an efficient manner by considering the electrical connection with the built-in microcomputer. A microcomputer can be connected thereto, and a signal line, that is, a wiring line for a conductive path can be made unnecessary. Furthermore, the most closely related microcomputer can be placed adjacent to the EFROM chip, and the data line for exchanging data between the EFROM chip and the microcomputer can be realized at the shortest or minimum distance, making implementation possible by routing the data lines. Density loss is minimized, allowing high-density packaging.

Furthermore, the present invention provides a hybrid integrated circuit device that is compact and easy to handle because all elements other than the EPROM chip are in the form of chips and are housed in a sealed space formed by the case material and the substrate. Can be done.

Furthermore, in the present invention, a switch is provided on the board to convert between write and normal dedicated modes, so when the write-only mode is converted, programs and data can be written using a write-only external lead. In addition, by providing a parallel/serial conversion circuit, program data can be written into the EPROM using a serial signal.

(F) Embodiments The hybrid integrated circuit device of the present invention will be explained in detail below based on the embodiments shown in FIGS. 1 to 13.

1 and 2 show a hybrid integrated circuit device (1) according to an embodiment of the present invention. This hybrid integrated circuit device (1) is used as an independent electronic component and is used as an integrated circuit having independent functions in a wide range of fields such as computers.

As shown in FIGS. 1 and 2, this hybrid integrated circuit device (1) includes an integrated circuit board (2), a conductive path (3) of a desired shape formed on the integrated circuit board (2), Conductive path (3)
a non-volatile memory chip (4) connected to the microcomputer (5), which is supplied with data from the memory chip (4) and connected to the conductive path (3) on the substrate (2);
〉 and its peripheral circuit elements (6), and memory chips (
A plurality of switches (15) convert between a write mode used during a write operation to write predetermined program data to the memory chip (4) and a normal mode used during normal operation to read data from the memory chip (4).
7>, a parallel/serial conversion circuit (101) that enables writing with serial signals, and a case material (8>) that is integrated with the substrate (2) and has holes (7>) at predetermined positions. has been done.

The integrated circuit board (2) is a hard substrate made of ceramics, glass epoxy, metal, or the like, and in this embodiment, a metal substrate with excellent heat dissipation and mechanical strength is used.

As the metal substrate, for example, an aluminum substrate with a thickness of 0.5 to 1.0 m is used. As shown in Figure 3, the surface of the substrate (2) is coated with an aluminum oxide film (
9〉(anodized aluminum layer) is formed, and 10〉 is formed on the whole surface side.
An insulating resin layer (10) of epoxy or polyimide or the like with a thickness of ~70μ is pasted. Further, on the insulating resin layer (10), a copper foil (11) with a thickness of 10 to 70 μ is placed on the insulating resin layer (10).
At the same time, it is attached using a roller or hot press.

On the surface of the copper foil (11) provided on the entire surface of the substrate (2), a conductive path of a desired shape is exposed by screen printing, masked with a resist, and a precious metal (gold, silver, platinum) plating layer is formed. is plated on the surface of the copper foil (11). After that, the resist is removed and a copper foil (
The desired conductive path (3) is formed by etching step 11).The thinness of the conductive path (3) by screen printing is limited to 0.5 ml, so when an ultra-fine wiring pattern is required, By using the well-known photo-etching technique, it is possible to form ultrafine conductive paths <3> of up to about 2 μm.

At predetermined positions on the conductive path (3), there is a nonvolatile memory chip (4), a microcomputer (5) to which data is supplied from the memory chip (4), and its peripheral circuit elements (
6) and a plurality of switches <17 〉 and a parallel/serial conversion circuit are mounted and connected to the conductive path (3).The conductive path (3) is formed to extend over almost the entire surface of the substrate (2), and extends to the peripheral edge of the substrate (2). Conductive path (3)
A lead fixing pad is formed at the tip of the lead, and an external lead terminal (12) is fixed to the pad. The external lid (12) is bent at a substantially right angle for attachment to a mounting board. Incidentally, the conductive path (3) formed on the substrate (2) includes a write-only conductive path (3) and a read-only conductive path (3) extending on the substrate (2). At the extended end of each conductive path (3), there are a write-only external lead (12a) and a read-only external lead (12a).
12b) is fixed. In addition, on the write-only conductive path (3), there is a parallel
A serial conversion circuit (101) is connected. The parallel/serial conversion circuit (101) converts a serial signal into a parallel signal, and is constituted by an LSI such as a microcomputer. In this embodiment, an Intel 8051 one-chip microcomputer is used.

EPROM (E
rasable Programmable Read
A non-volatile memory chip (4) is hereinafter referred to as an EFROM chip. As is well known, this EPROM chip (4) has electrons (programs and
It is an element that can be used by irradiating light to excite data (data) and rewriting it back into the unmemorized pellet. EPRO
The M chip (4) is commercially available, and its shape is not limited as long as it is a chip type, and a description of the EPROM chip (4) will be omitted in this embodiment.

On the other hand, the case material (8) is made of thermoplastic resin as an insulating member, and is formed into a box shape so that a space is formed when it is fixed to the substrate (2).The box-shaped case material (
The peripheral end portion of 8) is disposed substantially at the peripheral end portion of the substrate (2) and is firmly fixed and integrated with the substrate (2) using an adhesive sealant (J-sheet: trade name). As a result, the substrate (2
) and the case material <8>, a predetermined sealed space (14) is formed. Furthermore, a hole (7) is provided at a predetermined position of the case material (8) of this embodiment.The hole (7)
are EPROM chips (4) and EPROM chips (4)
It is formed in such a size as to expose the bonding wire connecting the conductive path (3) and the conductive path (19).In other words, it is formed larger than the EPROM chip (4).

The EPROM chip (4) is fixedly mounted on the conductive path <3> on the substrate (2) exposed through the hole (7>) of the case material (8>) using a brazing material such as Ag paste or solder, and is then mounted through the hole (7). One end of a plurality of conductive paths (3) connected to the EFROM chip (4) is formed on the exposed substrate (2). One end of the conductive path (3) and the EPROM chip (4) are connected to each other using Al wires. Ultrasonic bonding connection is performed using bonding wire lines such as .The other end of the conductive path (3) bonded to the EFROM chip (4) is connected to the EPROM chip
) is efficiently routed in the vicinity of the microcomputer (5) placed in connection with the chip-shaped microcomputer (5) and is electrically connected by ultrasonic connection using the Aj2 bonding wire.

Here, the positional relationship between the EFROM chip (4) and the microcomputer (5) will be described.As shown in Fig. ), the EFROM chip (4) and microcomputer (5) are placed adjacent to each other or as close as possible to shorten the length of the conductive path (3). Therefore, the EPROM chip (
4) and the microcomputer (5) can be routed over the shortest possible distance, and the mounting area on the board can be used effectively.

EPROM chip (4) and a chip-shaped microcomputer (5) placed near or adjacent to it
As shown in Fig. 1, an EFROM chip (4) is connected by ultrasonic bonding to the tip of a conductive path (3) extending near the microcomputer (5) by an Al wire.
electrically connected to.

As is clear from FIGS. 1 and 2, the EFROM chip (4) is mounted on the substrate (2) exposed through the hole (7) formed in the case material (8), and the hole (7) is shaped like the EFROM chip (4). Wall (7a
It becomes a structure surrounded by 〉. More specifically, what is surrounded by the wall (7a) is the EPROM chip (
4), its EPROM chip (4), and the nearby conductive path (3)
) and the wire line to be bonded to it will be surrounded.

Furthermore, the space surrounded by the wall 7a〉 (7b〉 has 1
It is filled with more than one layer of resin, and the EPROM chip (4) and wire lines are completely covered with the resin. The first layer of resin directly coated on the EPROM chip (4) is an ultraviolet transparent resin (15a) because it is necessary to transmit ultraviolet rays when erasing data on the EPROM chip (4).

The ultraviolet-transparent resin (15a) may be non-aromatic, for example, methyl-based silicone rubber or silicone gel.

In this example, the first layer of UV-transparent resin (15a)
A second resin layer (15b) is filled on top. Unlike the first layer, the second resin layer is an EPROM chip (
4) A UV-opaque resin (15b) is used to block UV rays to prevent erroneous erasing. This ultraviolet opaque resin (15b) is not limited as long as it contains an aromatic ring (benzene ring), and for example, an epoxy or polyimide resin is used, and it is substantially in line with the upper surface of the case material (8). It is filled until it is filled.

Therefore, only the EPROM chip (4) is surrounded by the wall (7a) and coated with resin, and the other microcomputer (5) and its peripheral circuit elements (6) are surrounded by the case material (8) and the board (2). It will be placed in a sealed space (14) formed by.

As mentioned above, the microcomputer (5) connected to the EPROM chip (4), the peripheral circuit elements (6), the switch (17), and the parallel/serial conversion circuit (101) are connected to the substrate (2) and the case material. The sealed space formed by (8) (
14). That is, all elements, including chip-shaped electronic components and resistance elements such as printed resistors and plated resistors, are provided within the sealing space (14).

By the way, in this embodiment, the space (
7b) has a two-layer resin structure of an ultraviolet-transparent resin (15a) and an impermeable resin (15b), but instead of the impermeable resin (15b), a light-shielding sealing material is used as shown in FIG. Glue (l6) onto the hole (7) of the case material (8).
3 can also completely block ultraviolet rays like the impermeable resin (15b).

In this embodiment, when erasing data on the EPROM chip (4), the ultraviolet opaque resin (15b) or sealing material (16) is removed and ultraviolet rays are irradiated for a predetermined period of time to erase data. When removing the ultraviolet transparent resin (15a), remove the resin (15a).
In a), the wire will not break due to the weak adhesive force.

Next, rewriting after erasing data in the EPROM chip (4) will be explained.

FIG. 5 is a block diagram showing the above-mentioned hybrid integrated circuit.

■~O is the input/output terminal to which the external lead (12) is connected,
(5> is a microcomputer, (4) is an EPROM,
(18) is a peripheral circuit, (19> is a write power supply circuit,
(17> is a switch, and (toi) is a parallel/serial conversion circuit.

The switch (17) is composed of an element having one circuit and two contacts, as shown in FIG.
A MOS MC 14053 multiplexer is used.

The switch (17) is connected between the EPROM (4) and the microcomputer (5).
) is electrically connected to the microcomputer (5>) during normal operation, and is electrically disconnected from the microcomputer (5>) when writing data to the EPROM (4).

The switches (17) have only the number necessary for writing program data to the EFROM (4). For example, in the case of a 128K bit EFROM, the switches (17)
A. ．． (14 lines), control and power supply V,,,PGM,O for writing/reading data Dφ~D, (8 lines)
A total of 26 switches (17) are required, including E and CE (4 switches), but since a ready-made MC I4053 is used here, the switch elements mounted on the board are actually 8 switches. In addition, if it is necessary to reduce the number of switch elements to be mounted, it is better to use an ASIC IC such as a CMOS gate array or a standard cell to reduce the size of the board.

On the other hand, one end of the switch (17) is connected to the microcomputer (5>), and the other end is connected to the parallel/serial conversion circuit (101).
), and is connected to two write terminals 00 for writing in serial signals from the parallel/serial conversion circuit (101). That is, terminals ① to [phase] are read-only terminals (during normal operation), and terminal @@ is a write-only terminal. In addition, the terminal [phase] is a terminal dedicated to conversion input for converting the switch (17), and the terminal [phase] is a terminal for converting the switch (17).
This is a dedicated power supply terminal for writing data to M(4).

Needless to say, the number of switches (17) may increase or decrease depending on the data capacity of the EFROM or the writing method.

Next, the actual writing method will be explained.

Power supply V, . ! :Address terminal Aφ~Als data terminal Dφ~ of terminals other than GND
D, write and read control terminals CE, OE, PGM,
A total of 26 Vpp terminals are connected to, for example, 26 switches (17) each having two contacts in one circuit.

Aφ~A,. The normal mode side terminals of the 24 switches (17>), Dφ to D,, CE, and OE, are connected to 24 signal lines from the microcomputer (5>) necessary for the EFROM data read operation.

The normal operation mode side terminals of the two switches 17) connected to PGM and Vpp of E PROM (4) are grounded to GND, and in normal mode, EF
The ROM (4) operation is limited to only read operations to prevent accidents caused by writing.

Among the write mode side terminals of the 26 switches (17), the V. The write mode terminals of the 25 switches (17) other than the switch (17) connected to the switch (17) are connected to the parallel/serial conversion circuit (101).

It is already well known that a parallel/serial conversion circuit is a circuit that has a function of converting a serial signal into a parallel signal.

As described above in this embodiment, Intel's one-chip microcomputer 8051 is used, but any device that has the function of converting a serial signal into a parallel signal may be used as long as it has that function by combining a plurality of elements. However, when forming it on the integrated circuit board 27, it is preferable that one element performs the function as much as possible.

By the way, two input/output lines are led out from the parallel/serial conversion circuit (101) and connected to the terminal (2)0. This terminal 00 becomes a terminal exclusively for writing serial signals. Needless to say, the terminals for normal operation ~@ are peripheral circuits <1
8>.

On the other hand, the parallel-to-serial conversion circuit (101) is in an OFF state during normal operation, that is, in a read state, and the EPROM (
It is designed so that it is turned on at the timing when data is written to 4>. This power supply may be supplied from the internal circuit if it has the same potential as the power supply of the internal circuit, and a separate power supply terminal may be provided separately.

By the way, do you want to put the hybrid IC into normal operation mode?
Switching to the write mode is performed by inputting a signal of level r H , r L to 0 of the input terminal dedicated to mode conversion. rH to the input terminal dedicated to mode conversion,
When a level signal is supplied, the switch (26 of 17)
The connections are converted to the write mode side and connected.

-28 Furthermore, at the same time, an rHJ level input signal is supplied to the base of the transistor Q1 to the VPP input required when writing data to the E F R OM (4>), so that the transistor Q is turned on, and the transistors Q, The base of is grounded, transistor Q is turned on, +21■ is energized from the input/output terminal, and switch (17) is turned on.
+21V for writing is supplied to the vpP input via , and the writing state is reset.

The operation of writing program data to the EPROM (4) is first performed by erasing data from the EPROM chip built in the hybrid IC.

Data can be erased by preparing an ultraviolet generator, usually an EFROM eraser, and irradiating ultraviolet light for about 30 minutes toward the ultraviolet irradiation hole (7) attached to the hybrid IC package. All the data entered will be at level 1.

Normally, the irradiation time is set with enough time to ensure that no data is omitted.

Next, prepare an EPROM WRITER, commonly known as an E-
Input the program data you want to store in FROM (4). ROMWRITER used in this example
is a ROM dedicated to serial signals that outputs serial signals.
It is important to be a WRITER.

Normally, ROM WRITER outputs parallel signals, but since the former requires a large number of external leads, in this embodiment, we intentionally use ROM WRITER for serial signals.
TER shall be used. As a result, as will be described later, external reads for writing can be reduced.

Making the ROM WRITER serial-only can be easily done by changing the design of the device, so this does not affect this embodiment in any way.

It is the EP that inputs data to the EPROM WRITER.
Although it is possible to manually input data one by one to each address in the ROM, due to time constraints and reliability of operation, it is usually necessary to enter the data on the host computer where the program is developed and R.
By electrically connecting the OM WRITER, data is transferred directly from the computer to the memory inside the ROM WRITER and stored. Hybrid IC and ROM WR
The ITEH connection is as shown in Figure 7.
This is done between the hybrid connection socket (20>) connected to the TER (20a).

Normally, if you are writing to a single EPROM, not a hybrid IC, the EPROM you want to write to! :ROMWRIT
Insert it into the EH's socket and put it into immediate data write operation. However, in the case of hybrid IC, ROM WR
Connect the EFROM socket (20) attached to the ITER to at least the write-only terminal 0@.

Next, input/output terminal 0 of the hybrid IC (8l and ROM
W R I T E R (20a) socket (20)
Connect the input/output terminals other than those connected to. That is, since it is necessary to convert from normal-only mode to write-only mode, it is connected to a predetermined connection part in order to supply "H" and "L" level signals to terminal 0 and convert the mode to write-only mode. There is. The r H level input signal switch <17) input from the mode conversion end 31,000 is connected to the ROM write mode side.

At this time, the VPP input terminal of the EPROM (4) is connected to the terminal [
+21V is supplied from the phase].

Electrical connection status in this state, ROM WR ITER
The state is exactly the same as when writing and reading a single EPROM, and from the next operation, it will be a normal ROM
It is just the same as the WRITER operation, except that the write signal is serial, but this serial signal is converted into a parallel signal at any time by the parallel/serial conversion circuit (101) and sent to the EP.
Written to ROM (4).

Next, as an operation on the ROM WR I TER (20a) side, the ROM WR I TER (20a)
Since the data to be written to the EFROM is prepared in the memory, data writing is started.

The actual write operation of ROM WRITEH is automatically performed according to the following procedure.

The ROM writer described here is a device compatible with Sinoal as described above. The ROM writer has 2-32 signal lines, one for transmitting and the other for receiving. These two tree lines are connected to write-only terminals of the HIC and perform data transmission and reception. That is, normal R.O.
The difference from the M writer is that timing control of the PGM, OE, and CE terminals is performed by a serial-parallel conversion circuit inside the HIC. This example uses Intel's 8051 one-chip microcontroller, so
It is also possible to add the function of a write and read timing generation circuit. Since this timing control differs between writing and reading, the ROM writer must command one of the controls. This can be done by sending a signal to distinguish between writing and reading together with the address and data.

First, (i) Confirm whether all memory in the EFROM has been completely erased, and give a read signal and address from the ROM writer. Within the HIC, serial data is received, the address is converted to parallel data, and the address is provided to the EPROM. Since it is a read, each control signal is set to the read state (PGM is set to H, OE, CE is set to active rl), and the EPR
Read data from OM. The read data is converted into serial data and sent to the ROM writer. The ROM writer checks the data to see if it has been erased. This is done by counting up the address sequentially from the youngest address, and if there is a part that has not been erased, the ROM writer will issue a warning sound and will not proceed to the next step.

(i) Data writing starts from the lowest address in the EPROM. Address Aφ~A from ROM writer
ls r Data Dφ to D7 and write signal are sent serially. Within the HIC, these are converted into parallel data and provided to the EFROM. Since it is a write, 8051 is δ
Set i to H, C ball to L, and then PGM for 1 msec width.
Apply a pulse of

(i) At the same address as in (i), put the EPROM in the read state (same state as in (I)), read the data written in (ii), and read the data written in (i). Compare to see if it is the same as the one you entered.

If the data is not the same, return to the operation (H) and write with the same address and data. When the written data becomes the same as the written data, the write operation (i) is further automatically performed several times to ensure a margin for improving the stability and reliability of data retention in the EPROM. Finish writing one address.

(iv>Count up the address by 1 and repeat writing the data from step (i).

The write operations (i) to (iv) are performed by ROMWRITER.
will proceed automatically, and when it is confirmed that all address data writing of E FROM is completed, ROMWRITE will automatically start.
The operation of H stops.

With the above operation, new data can be written to the EPROM in the hybrid IC using a serial signal, and R O
MWR ITER (20a) socket (20>
If you remove the external leads (12) connected to each terminal from 35, you will see the EFROM mounted inside the hybrid IC.
The data writing in (4) is completed.

A specific example of a hybrid integrated circuit device for a modem using the present invention will be shown below.

First, what is a modem? A modem exists for data communication in which digitized data handled by a data terminal such as a personal computer is sent and received at a distance using a telephone line. The function of a modem is to modulate digitized data using the frequency that can be used on the telephone line, convert it into an analog signal, and send it on the telephone line, and to send an analog signal that is modulated with the data sent from the other party. It has the ability to demodulate and return to digitized data.

The modem will be briefly explained based on the block diagram shown in FIG.

FIG. 8 is a block diagram when the modem is mounted on the integrated circuit board (2).

The modem stores data sent from the computer in its built-in memory and outputs the data.36 The modem outputs a predetermined output signal based on the data output from the DTE interface (21) and the DTE interface (2l). A microcomputer (5), an EPROM chip (4) containing data addressed by the microcomputer (5), and an NCU (NETW) that modulates and demodulates the output signal from the microcomputer (5).
The first and second modulation/demodulation circuits (22) and (23) output to the ORK CONTROLUNIT) and the desired DTM according to the output signals from the microcomputer (5).
A DTMF generator (24
) and . Furthermore, in the modem circuit of this embodiment, there is a switch for converting between a normal operation-only mode used for reading data from the EPROM (4) during normal operation and a write-only mode used for writing program data to the EPROM (4). (17) and a voltage switching circuit (17) that converts each voltage in normal operation mode and write mode.
c) and a parallel/serial conversion circuit (101) for writing data using serial signals.

3B DTE interface is, for example, STC9 6 10 (
As shown in Figure 9,
A transmitting memory part (25) that supplies the output signal of the personal computer, stores the output signal in the built-in memory, and outputs it to the microcomputer (5), and a signal to which the output signal from the microcomputer 5 is supplied. A part of the reception memory (26) that stores the data in the built-in memory and outputs it to the computer.
, a transmitting memory section (25) and a part of receiving memory (26)
) to switch the respective signals input and output via
27), and has a predetermined function for connecting the personal computer (28) and the microcomputer (5).

Microcomputer (5) It e.g. STC9 62
0 (Seiko Epson), etc., as shown in Figure 10, a command recognition section that recognizes the output signal output from the DTE interface (21), and a command decoder that decodes the output signal recognized by the command recognition section. a command execution unit that compares the data in the memory part based on the signal decoded by the command decoder and supplies the data to the modulation/demodulation circuit; a comparison result between the data in the command decoder and the data in the memory part; It consists of a response code generation section that outputs an output signal to the DTE interface (21) when incorrect data is supplied to the command execution section.

The modulation/demodulation circuit (28) converts the digital signal sent from the microcomputer (5) into an analog signal and sends it to the NC
Send to U department. On the other hand, it converts the analog signal sent from the NCtJ section into a digital signal and sends it to the microcomputer (5), and includes low-speed and medium-speed circuits. First modulation/demodulation circuit (2
2) is a 300 bps low speed modulation/demodulation circuit, and the second modulation/demodulation circuit (23> is a 1200 bp8 medium speed modulation/demodulation circuit.
3), one of the modulation and demodulation circuits is selected by the microcomputer (5).

DTMF generator (24) is a microcomputer (5)
By inputting the data output from the command execution unit of the C-39-OL and ROW input terminals, a predetermined D
It generates a TMF signal and outputs it to the transmitter A M P (29a) to supply the signal to the telephone line.

The switch (17) is, for example, the Motorola multiplexer CMOS MC 14053 as described above.The switch (17) is a microcomputer (CMOS MC 14053).
) and E F ROM (4).

Program data for setting various modes of the modem is stored in the EPROM chip (4), and is supplied to the microcomputer (5) based on the address of the microcomputer (5).

Next, the operation of the modem will be briefly explained. In explaining the operation of the modem, the switch (17) for converting between normal and write dedicated modes is selected to the normal dedicated mode for normal operation.

First, to start communication with the PC, switch (1) is activated based on the read signal from the microcomputer (5).
7), predetermined address data is supplied to the EPROM chip (4), and the program data of the EFROM chip (4) based on the address 40- is supplied to the microcomputer (40) via the switch (17).
5) The communication standard (
BELL/CCITT standard), communication speed (300
/1200bpS), whether the data formats match, and various modes such as dip switch mode switching are matched.

Assuming the various modes match, enter the answering modem's phone number into your computer.

The phone number is the DT for interfacing with the computer.
E-interface (21) and forwarded to the microcomputer (5) for decoding the telephone number.

Send the decoded result to the DTMF generator (24),
A DTMF signal is transmitted from the DTMF generator (24), and the signal is transferred to the general telephone line via the transmission A M P (29a) and the line transformer (29c).

The transferred DTMF signal sends a paging signal to the modem on the responding side, and the modem on the responding side receives the paging signal and automatically receives the call. Then, the modem on the responding side sends an answer tone for the connection procedure to the modem on the calling side.

The modem on the calling side passes through a line transformer (29c) and a receiving amplifier (29b), and a low-speed modulation/demodulation circuit (22) detects whether the answer tone is a predetermined answer tone for the modem on the calling side. . If the answer tone is a predetermined answer tone, the communication state is entered.

When the communication state is established, parallel data from the PC is input to the DTE interface (21) based on predetermined key manual signals from the keyboard of the calling party's PC,
The data is transferred to the microcomputer (5>).

Here, parallel data is converted to serial data. The digital signal converted into serial data is sent to a low-speed modulation/demodulation circuit (22). Here, the digital signal is converted to an analog signal, subjected to frequency modulation FSX based on the corresponding communication standard, and transmitted to the responding modem via the transmission AMP (29) and line transformer (32).

On the other hand, the frequency-modulated analog signal sent by the key input signal of the personal computer on the responding side is sent to the modem on the calling side, and is sent to the line transformer (29c) and the receiving A M P (2
9b) to the low-speed modulation/demodulation circuit (22).

Here, the analog signal is converted to a digital signal and input to the DTE interface (21), and the serial digital signal is converted to a parallel digital signal and input to the calling side personal computer. As a result, full duplex communication between the calling side personal computer and the responding side personal computer becomes possible, and personal computer communication is realized.

FIG. 11 is a plan view of the modem circuit shown in FIG. 8 mounted on the board (2) used in the wooden embodiment, and the circuit elements to be mounted have the same figure numbers. The connection between the EPROM chip (4) and the microcomputer (5>) is shown by a bus line. Note that conductive markings for connecting a plurality of circuit elements are omitted because they are complicated.

As shown in FIG. 11, a plurality of fastening pads (3a) to which external lead terminals (12) are fixed are provided at opposing peripheral ends of the substrate (2). Sticky pad (3
A plurality of circuit elements and an EPROM chip (4) are fixed at predetermined positions on the conductive path (3) extending from the conductive path (8).

As mentioned above, a plurality of circuit elements including an EPROM chip (4) and a microcomputer (5), and a switch (17) for converting between read and write modes are fixed on the substrate (2) as described above. , (21) is the DTE interface, (22) and (23) are the first and second modulation/demodulation circuits, (24) is the DTMF generation circuit, (17) is the switch, (17c) is the voltage conversion element, (101) is the A parallel/serial conversion circuit used for writing, (5) a microcomputer, and (6) chip components such as an IT capacitor.

As shown in FIG. 11, an EPROM chip (4) is fixed in a position near or adjacent to a microcomputer (5).An EPROM chip (4) is fixed in a position near or adjacent to a microcomputer (5). So, microcomputer (5) and EFROM chip (
4), that is, the wiring line for the conductive path (3), can be routed at the shortest distance of -44 mm, allowing for effective use of other mounting patterns and high-density mounting. . Note that the area surrounded by the dashed line indicates the area where the case material (8>) is fixed with the adhesive sheet.

Furthermore, an EFROM chip (4) and a microcomputer (
5) By providing a switch (17) between them, it is possible to easily switch between the read-only mode and the write-only mode using the switch (17>). As a result, data can be written easily.

Furthermore, by providing a parallel/serial conversion circuit (101) between the switch (17) and the write-only terminal, data can be written to the EFROM (4) using two write terminals, providing a hybrid with a small number of lead terminals. can do.

Figure 12 shows the case material (
8) is a plan view of the completed product of the hybrid integrated circuit device for a modem when the case material (8) is fixed;
A second resin layer (15) coated on the ROM chip (4)
b) Only the top surface is exposed. That is, EPR
All other elements except the OM chip (4) are made of case material (8)
and the substrate (2).

A large number of external leads (
A part of 12) is a lead that is used for both the normal operation and write operation of the EPROM chip (4) in each dedicated mode, and the external lead (12X) is used exclusively for applying input signals to convert each mode. This is the terminal.

EFRO, the hybrid integrated circuit device for modems detailed above.
In preparation for the diversification of product specifications, M can easily respond to specification changes requested by set manufacturers (users) such as destination, OEM, and in-house sales. In other words, circuit configurations other than EPROMs were designed in advance to accommodate various specification changes, but when a hybrid integrated circuit was designed based on a specific user's specifications, it sometimes did not match the specifications of other users. In this case, conventionally it was necessary to reconsider the design of the hybrid integrated circuit itself.

However, in the hybrid integrated circuit device of the present invention, the first and second modes are used to switch between the normal operation mode used when reading data from the EPROM chip (4) and the write mode when writing data to the EFROM chip (4). Switch (17a
) (17b), and predetermined program data can be written to the EFROM chip (4) while the EFROM chip (4) is mounted. ) The programs in )
EPROM chip (4) even if data changes
Program data can be easily written to.

In the embodiment described in detail above, the EPROM and the microcomputer are separate and individual ICs, but the nonvolatile memory also includes a microcomputer with a built-in EPROM. A microcomputer with a built-in EFROM can perform similar operations as described above.

FIG. 13 shows a block diagram when a microcomputer with built-in EFROM is used.

13th rl! As is clear from J, the first switch (1
747 is connected to the microcomputer with built-in ROM and the peripheral circuit (18).Of course, when the microcomputer with built-in EFROM shown in Fig. 13 is hybridized on the board, the microcomputer with built-in EPROM is mounted. A hole is provided in the upper case material. Therefore, erasing and writing of data in the EFROM can be performed in the same manner as described above.

According to the present invention, the Ff? of the case material (8)? Make a hole (7) at the desired position, connect the EPROM chip (4) to the conductive mark (3) on the board (2) exposed through the hole (7>), and connect it to the adjacent conductive path 3> with a wire. The hybrid integrated circuit and the EPROM chip ( 4
) has the great feature that it can be made extremely compact.

Furthermore, in the present invention, by providing a switch (17) that separates the conductive path dedicated to the normal mode and the conductive path dedicated to the write mode and selects each mode, the state in which the EFROM chip (4) is mounted is provided. Leave it as E
Predetermined program data can be written to the PROM chip (4). Further, the present invention has the advantage that by providing a parallel/serial conversion circuit (101), writing can be performed using two write leads, and the integrated circuit can be miniaturized.

(g) Effects of the Invention As detailed above, according to the present invention, firstly, the hole (7) is provided at a desired position of the case material (8), and the substrate (2) exposed through the hole (7) is Connect the EPROM chip (4) to the upper conductive path (3).
), it has the advantage that the mounting position of the EFROM chip (4) can be arbitrarily selected. Therefore, considering the electrical connection with the built-in microcomputer, it is possible to efficiently connect the EPROM chip (4) and the microcomputer (5), eliminating the need for routing signal lines. The most closely related microcomputer (5) can be placed adjacent to the chip (4), and as a result, the data line for exchanging data between the EFROM chip (4) and the microcomputer (5) can be shortened to -50 or more. It can be realized with the easiest layout to design, and loss in packaging density due to data line routing can be minimized.

Second, insert EPRO into the hole (7) at the desired position of the case material (8>).
In addition to arranging the M chip (4), an integrated circuit board (
2) By improving the mounting density of the microcomputer and its peripheral circuit elements, the previously required printed circuit board can be eliminated, resulting in an extremely compact EPRO.
A hybrid integrated circuit device incorporating an M chip (4) can be realized.

Thirdly, each mode has a conductive path dedicated to normal operation and a conductive path dedicated to write operation, which can be switched by a switch (17) to mount the EPROM chip (4) after erasing the data in the EFROM chip (4). Predetermined program data can be written into the EPROM chip (4) in the same state.As a result, the EFROM
Even if a change in the data specifications of the EPROM chip (4) occurs immediately before the hybrid integrated circuit device incorporating the chip (4) is delivered to the user, it has the great advantage of being able to cope with it extremely easily.

Fourthly, by providing a parallel/serial conversion circuit, EPR
It is now possible to write data to OM using serial signals, and as a result, the number of write-only leads can be minimized (two), making it possible to create a hybrid integrated circuit that has a built-in EPROM chip and is capable of erasing and writing. It can be realized in miniaturization.

Fifth, by using a metal substrate as the integrated circuit board (2), its release is improved. Thermal effects can be significantly improved compared to printed circuit boards, contributing to higher packaging density. In addition, by using copper foil (11) as the conductive path (3), the resistance value of the conductive path (3) can be significantly reduced compared to conductive paste.
The mounted circuit can be expanded to the same level or more than a printed circuit board.

Sixth, the microcomputer (5) and its peripheral circuit elements (6) connected to the EPROM chip (4) are placed in a sealed space (14) formed by the case material (8> and the integrated circuit board (2)). Since it is assembled in the form of a die or chip, it occupies an extremely small area compared to a conventional printed circuit board molded with 5 liters of resin, and has the advantage of greatly improving packaging density.

Seventh, by making the case material (8) and the peripheral edge of the integrated circuit board (2) substantially coincident, almost the entire surface of the integrated circuit board (2) can be used as a sealed space (14), which reduces the packaging density. Combined with this improvement, an extremely compact hybrid integrated circuit device can be realized.

Eighth, there is a light-shielding resin layer (
15b) is provided, so the EPROM chip (4
) can be protected from light and EPR
It has the advantage that the gap between the OM chip (4) and the hole (7) can also be sealed.

Ninth, the external leads (12) can be led out from one side or the opposing sides of the integrated circuit board (2), which has the advantage of realizing a hybrid integrated circuit device with an extremely large number of pins.

[Brief explanation of drawings]

Fig. 1 is a perspective view showing this embodiment, and Fig. 2 is an I-
I sectional view, Figure 3 is a sectional view of the substrate used in the example,
The figure is a sectional view showing another embodiment, FIG. 5 is a block diagram showing this embodiment, FIG. 6 is a block diagram showing a switch element used in this embodiment, and FIG. 7 is an EP of a hybrid integrated circuit device.
FIG. 8 is a block diagram showing the modem used in the wooden embodiment; FIG. 9 is a block diagram showing the DTE interface of model 11 shown in FIG. 8; FIG. The figure is a block diagram showing the microcomputer of the modem shown in Fig. 8, and Fig. 11 is a plan view when the block diagram shown in Fig. 8 is mounted on a board.
FIG. 12 is a plan view of the case material fixed onto the board shown in FIG. 11, FIG. 13 is a block diagram showing another embodiment, and FIGS. 14 and 15 show a conventional EPROM mounting structure. FIG. (1)...Hybrid integrated circuit device, (2)...Integrated circuit board, (3>...Conducting path, (4)...EF
ROM chip, (5)...microcomputer,
(6)...Circuit element, (7>...hole, (7a>)
...Wall body, (8>...Case material, (15a)...
・Ultraviolet-transparent resin, (15b)...Ultraviolet-opaque resin, (17>...Switch, (101)...Parallel/serial conversion circuit.

Claims (7)

[Claims] (1) An integrated circuit board, a conductive path having a desired pattern formed on the substrate, a nonvolatile memory chip connected to the conductive path, and a conductive path on the substrate that reads data from the memory chip. a microcomputer and its peripheral circuit elements connected to a path, and a case material integrated with the substrate; the electrode of the nonvolatile memory chip and the desired conductive path are connected with a bonding wire; At least the microcomputer and its peripheral circuit elements are disposed in a sealed space formed by the case material, and a write-only mode used during a write operation for writing and reading predetermined program data to and from the memory chip. A plurality of switch elements are connected to the conductive path on the substrate for arbitrarily converting between a normal-only mode used during normal operation in which only data is read, and one end of the switch element is connected to the switch element and used only during a write-only mode. What is claimed is: 1. A hybrid integrated circuit device comprising: a plurality of conductive paths arranged in parallel, and a parallel/serial conversion circuit connected to the conductive paths. (2) A claim characterized in that an external lead dedicated for serial signal input for inputting a serial signal is connected to the other end of the conductive path whose one end is connected to the conversion circuit and extends to one side of the substrate. The hybrid integrated circuit device according to item 1. (3) It has a conductive path dedicated to conversion, one end of which is connected to the memory chip, the switch element, and the conversion circuit, and is used for conversion in write or read mode, and the other end of which the conductive path is extended is converted. 2. The hybrid integrated circuit device according to claim 1, further comprising a dedicated external lead connected to the hybrid integrated circuit device. (4) The hybrid integrated circuit device according to claim 1, wherein a metal substrate whose surface is insulated is used as the integrated circuit board. (5) The hybrid integrated circuit device according to claim 1, wherein copper foil is used as the conductive path. (6) The hybrid integrated circuit device according to claim 1, wherein the microcomputer is incorporated in the form of a die on the conductive surface. (7) The hybrid integrated circuit device according to claim 1, wherein a peripheral edge of the case material substantially coincides with a peripheral edge of the substrate.