JPH03230606A - Amplitude detection circuit - Google Patents

Abstract

PURPOSE:To attain ease of circuit integration for an amplitude detection circuit by providing a 3rd transistor(TR) in parallel with a differential circuit receiving an input of an input signal so as to obtain an amplitude detection output signal from a base of the TR. CONSTITUTION:The detection circuit consists of TRs 101-104 formed nearly the same size, a differential amplifier circuit 130 comprising a constant current source 111, a current mirror circuit comprising TRs 105, 106 and resistors 120, 121, an emitter follower 132 comprising a TR 107 and a constant current source 113, resistors 108, 109 and a smoothing capacitor 110. Then a ratio of the sum between the collector current of the 1st TR 101 and the collector current of the 2nd TR 102 to the collector current of the 3rd TR 103 is made constant through the control. Thus, number of elements is reduced and circuit integration is facilitated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an amplitude detection circuit, and particularly to an amplitude detection circuit using a differential circuit.

[Prior Art] As shown in FIG. 3, the basic circuit of a conventional amplitude detection circuit of this type includes transistors 301 and 302 and a constant current source 3.
15, and a smoothing circuit 321 for smoothing the output of the differential circuit. In this circuit, the voltage of the input bias voltage source 312 of the differential circuit is VB, and the input signal sources 313 and 314 output signals whose phases are 180' different from each other. The output signal of the differential circuit is taken out from the common emitter terminal of the transistors 301 and 302, and is output to the output terminal 330 via the smoothing circuit 321.Next, the operation will be explained.

The input signal to input terminal 318 is VINI, input terminal 31
If the input signal to 9 is 1N2, the collector current of transistor 301 is Icl, the collector current of transistor 302 is Ic2, and the voltage of the common emitter of transistors 301 and 302 is VE, then VINI VF, = vt Jn (Ic+/ I
s)VIN2VE=vt! ;In
(IC2/Is) (where v is the thermal voltage of the transistor and I5 is the reverse saturation current value).

Next, if the signal change of the signal sources 313 and 314 is set as VIN, it can be written as V INI = V INI V s V IN2 = -V INIV B, so
From the above four equations, the following equation can be obtained: VINIVB VE
=V7 (l n (I c + / I s ) VINI
VB −VE = VT 1 n (I C2/ I s
) If the above two equations are added as they are, equation (2) is obtained.

2Va 2Vi=VtfnICIIC2/I52...
・■The mutual conductance of the differential circuit is gm, constant current source 3
If the current of 15 is 2Io, then Ic,: I. +2V+sgmI C2”F
I o 2 V + sg m (however, Io>V>gm).

Therefore, the formula ■ is 2Ve-2VE-VT 1n ((ro±2VINgm
) (IO2V+Ngm) /l521 =vr I n I (Ia2/ I s2)
(14V lN2g m2/Io2)). Here, since Io>V+Ngm, formula 0 is obtained.

2VB 2VE Saki2VT 1 n (In
/ I s ) V7 H4V IN2 g m2 /I02...0gm is expressed by V7 and Io, g m = 2 I o / 4 V T -I o
/ 2 VT, the common emitter potential VF is expressed by the equation 0.

VE=VIN2/2V7+VB-V7,
&n (Io / Is) ...0th order,
Let VIN be a sine wave with amplitude ■ (VIN=Va Si
nωt) and VE is given by the formula 0 6VE = Va2
sjn2&t/2 VT+Vavt, I n (Io
/ Is ) -■ Therefore, the amplitude detection output ■E after the smoothing circuit is V2. −PaVedt/2π = v a2/ 4 V 7 + v BVt 4
n (Io/I5)
... becomes ■. Therefore, the conventional amplitude detection output is proportional to the square of the signal amplitude Va, inversely proportional to the thermal voltage V7 of the transistor, and the DC component is VB
The DC voltage is expressed as V7ρn (I o / I s ).

Therefore, this amplitude detection output has an extremely small value when the signal amplitude V is small, so it cannot be said to be practical.
A circuit shown in FIG. 4 is generally used in an actual amplitude detection circuit.

In this figure, parts common to those in FIG. 3 are given the same reference numerals. In the circuit of FIG. 4, the smoothing circuit 321
is composed of a resistor 304 and a capacitor 311, and the signal passed through this smoothing circuit is input to an input terminal 323 of an operational amplifier 317. Other input terminals 32 of the operational amplifier
4 is connected to an output terminal of an emitter follower circuit 322 consisting of a transistor 303 whose base is connected to a bias voltage source 312 and a constant current source 316. A resistor 306. is connected between the input terminal 323 of the operational amplifier 317 and ground.
308 and a bias voltage source 310, and resistors 305 and 307 are connected between the input terminal 324 and the output terminal 320.

Voltage V3□4 input to input terminal 324 of operational amplifier
is given by the following equation.

V324=VB v7fn(Io/Is) -■Now, the potential difference between the input terminals 323 and 324 of the operational amplifier is Δ
■, the resistance value of resistor 305 and 306 is R300, resistor 30
7. Set the resistance value of 308 to R3o1, bias voltage source 310
If the voltage of is 11lo, then the output voltage 2E,' of the output terminal 320 is given by the equation 0.

VB@'=ΔV R301/ R300+ V BO
・=■Differential voltage Δ■ is ΔV = VF, a V324
Therefore, from equation 0, ΔV=V, 2/4VT, . . .■. ■, From formula 0, the output voltage V E @ ' is VE-'
= (V, 2/4 vt) ・(Rtot
/R300)+vBO.

[Problems to be Solved by the Invention] In the conventional amplitude detection circuit, as shown in FIG. 4, the number of elements increases considerably when smoothing circuits and operational amplifiers are included. Therefore, it is difficult to implement the conventional amplitude detection circuit into an IC, and the IC product becomes expensive.

[Means for Solving the Problems] In the amplitude detection circuit of the present invention, a DC bias voltage and a first signal superimposed on the DC bias voltage are input to the base, and the emitter receives the DC bias voltage through the first constant current source. A first transistor connected to a second power supply, a base having the DC bias voltage and a second signal superimposed on the DC bias voltage having an opposite phase to the first signal, and a collector connected to the DC bias voltage. a second transistor connected to the collector of the first transistor and having an emitter connected to the emitter of the first transistor; a third transistor having an emitter connected to the emitter of the first transistor; a first resistor connected to the base of the third transistor and having the other end connected to a DC bias voltage source that generates the DC bias voltage; one end connected to the base of the third transistor and the other end; a second resistor connected to the output terminal; and a first resistor connected between the collector of the first transistor and the first power source and/or between the collector of the third transistor and the first power source. and current control means for controlling the ratio of the sum of the collector current of the transistor and the collector current of the second transistor to the collector current of the third transistor to be constant.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which transistors 1 and 1 are formed to have approximately the same size.
01 to 104 and a constant current source 111, a differential circuit 130, transistors 105 and 106, and a resistor 120.
．． The current mirror circuit 131 includes a transistor 107, an emitter follower 132 includes a constant current source 113, resistors 108 and 109, and a smoothing capacitor 110.

Signals from input signal sources 115, 116 that are 180° out of phase with each other are input to the base of transistor 101, 102 via input terminals 117, 118, respectively;
The emitters of the transistors 101 to 104 are commonly connected and connected to a constant current source 111 whose one end is grounded.
The collectors of transistors 101 and 102 are commonly connected to the collector and base of transistor 105 and the base of transistor 106 which forms a current mirror circuit with transistor 105, and the collectors of transistors 103 and 102 are connected in common.
The collectors of 104 are commonly connected to a power supply 150.

The collector of the transistor 106 is connected to a constant current source 112 whose one end is grounded, the base of the transistor 107 and a smoothing capacitor 110 whose one end is connected to a power supply 150.
It is connected to the. The emitters of transistors 105 and 106 are connected to power supply 1 through resistors 120 and 121, respectively.
50.

The emitter of the transistor 107 is connected to a constant current source 113 whose one end is grounded, one end of the resistor 109, and an output terminal 119.
, and its collector is connected to a power supply 150.

The other end of the resistor 109 is connected to the commonly connected bases of the transistors 103 and 104 and one end of the resistor 108,
The other end of resistor 108 is connected to bias voltage source 114.

Next, the voltage value of the bias voltage source 114 is VB, the signal change amount of the signal source 115 is VIN, the signal change amount of the signal source 116 is -VIN, the common emitter potential of the transistors 101 and 102 is 6, and the transistor 101 Letting the collector currents of .102 be Icl and Ic2, respectively, the following equations 0 and 0 are obtained.

VIN+VB VE =vt4n (Ict/Is) ---■V
IN+VB VE: ■7 4 n (IC2/Is) -@>
Adding the 0 formula and the [Co.] formula, 2Va 2VE =vt, Rn (ICIIC2/l52)+・+■Here, the current of the constant current source 111 is 41°, and the constant current source 112 is
If the current is 2Io and Ic1+Ic2=21°, then Icl and Ic2 are obtained as follows, where gm is the mutual conductance of the transistors 101 and 102.

I c1= I O+ 2 g mvlN
+...@I c2= I (, -2gmV+N+
++■@, Substituting the 0 equation into the 0 equation and solving for the common emitter potential VE, VE -VB -V7, c n ((Io24gm2
VIN2)/I s21/2-va Vt In (Io2(1-4gm2VIN
2 / I o2) / I sJ / 2I o >
Assuming g m V IN, VB = VB V
T! 2 n (Io / I s ) + (4vt
gm 2VIN2)/2I o”VB
V7! ;tn(IO/Is)+
(2vt gm 2VIN2)/I o2-■
gm-I(, Substituting /2vd into the formula 0, VE = VB
VT ff1n (Io/I5)+v, N2/
2 VT -t8.

Here, since the collector currents of the transistors 101 and 102 are set to be Ic1+Ic2=21°, the sum of the collector currents of the transistors 103 and 104 (Ic3 and Ic4, respectively) is 2Io. Furthermore, since the transistors 103 and 104 are made to have the same size and have their bases and emitters connected in common, I(s: Ic4=■o).

Therefore, the common base voltage VBF of the transistors 103 and 104 is given by the following [phase] equation.

VBp=VB +v7 J2 n (Io/Is
) ”'@Substituting the 0 expression into this formula, you get ■2.

VBp=VB V71 n (I o / I s
)+VIN2 /2vt +vt , &n (I
o / Is ) Ve + V IN2 /
2y, ・0 Also, output terminal 11
■ the output voltage of 9. , the following equation holds true if the resistance value of the resistor 108 is R1 and the resistance value of the resistor 109 is R2.

(VOVBF) / R2= (VBF Va )
/ R+Vo-(1+R2/R1) VBF (R2/RI)Va...Substituting equation 0 into equation 00 and rearranging, VQ = (1+R2/R1) VIN2/2vt+VB
...Get a ◎. moreover,
By making the capacitance of the capacitor 110 sufficiently large,
At the output terminal 119, a smoothed output voltage ■E is obtained by the following equation.

■, = Joke■. Assuming d t/2π V IN= V m5jnωt and solving the above equation, Vta=Vm”(1+R2/R1)/4 vt +
Therefore, the output voltage is ■Ea is vOnn(Io/I
Since there is no influence of 5) and the DC output voltage when there is no signal is only 8, a stable amplitude detection output can be obtained by temperature-correcting the bias voltage VB.

Also, by setting R2 larger than R1,
It is possible to obtain a large output.

Note that in the circuit shown in FIG. 1, the transistor 107 is used as a buffer transistor, and plays the role of lowering the output impedance.

In the above embodiment, the transistors 103 and 104 were two transistors connected in parallel;
It is also possible to use multiple transistors. In this case,
The size of the combined transistor is transistor 10
1. Match the total size of 102. Also,
It is also possible to move the transistor 105 forming the current mirror circuit to the transistors 103 and 104 side.

FIG. 2 is a circuit diagram showing another embodiment of the present invention. In this figure, parts that are common to those in FIG. 1 are given reference numbers with the same last two digits, and therefore redundant explanation will be omitted. In this embodiment, the transistor 206 and the resistor 221 constituting the current mirror circuit are
04 and the power supply 250, and the constant current source for the current mirror is omitted.

According to this embodiment, in addition to obtaining the same effects as in the previous embodiment, the number of constant current sources can be reduced by one, so that the number of parts can be further reduced.

[Effects of the Invention] As explained above, the present invention provides a third transistor in parallel with the differential circuit into which an input signal is input, and obtains an amplitude detection output signal from the base of this transistor. Therefore, according to the present invention, an output signal equivalent to that of a conventional circuit using an operational amplifier can be obtained without increasing the number of elements. That is, according to the present invention, the function equivalent to the conventional amplitude detection circuit using about 30 elements can be achieved by using 13
Since this can be achieved with a circuit of 1 to 14 elements, the number of elements used can be reduced to less than half of the conventional number. Therefore, according to the present invention, the amplitude detection circuit can be easily integrated into an IC.

[Brief explanation of drawings]

1 and 2 are circuit diagrams showing embodiments of the present invention, FIG. 3 is a basic circuit diagram of a conventional example, and FIG. 4 is a circuit diagram of a conventional example. 101~107.201~207.301~303...
・Transistor, 108.109.120.12
1.208.209.220.221.304-308
...Resistor, 110.210.311...Capacitor, 111-113.211.213.31
5.316...constant current source, 114.214.31
2...Bias voltage source, 115.116.215
．． 216.313.314...Input signal source, 1
17.118.217.218.318.319...
Input terminal, 119.219.320... Output terminal, 150.250.309... Power supply.

Claims (3)

[Claims] (1) a first transistor whose base receives a DC bias voltage and a first signal superimposed on the DC bias voltage, and whose emitter is connected to a second power supply via a first constant current source; The DC bias voltage and a second signal superimposed on the DC bias voltage and having an opposite phase to the first signal are input to the base, the collector is connected to the collector of the first transistor, and the emitter is connected to the collector of the first transistor. a second transistor connected to the emitter of the first transistor; a third transistor having a collector connected to the first power supply and an emitter connected to the emitter of the first transistor; and one end connected to the third transistor. a first resistor connected to the base of the transistor and the other end connected to a DC bias voltage source that generates the DC bias voltage; one end connected to the base of the third transistor and the other end connected to the output terminal; a second resistor, one transistor is connected between the collector of the first transistor and a first power source, and the other transistor is connected between a second power source and a second power source. An amplitude detection circuit comprising: a current mirror circuit connected via a constant current source; (2) A DC bias voltage and a first signal superimposed on the DC bias voltage are input to the base, the collector is connected to the first power supply via one transistor of the current mirror circuit, and the emitter is connected to the first signal. a first transistor connected to a second power supply via a constant current source; a second transistor whose collector is connected to the collector of the first transistor and whose emitter is connected to the emitter of the first transistor; a third transistor connected to the power supply of the first transistor and having an emitter connected to the emitter of the first transistor; and a DC bias voltage having one end connected to the base of the third transistor and the other end generating the DC bias voltage. An amplitude detection circuit comprising: a first resistor connected to a source; and a second resistor, one end of which is connected to the base of the third transistor, and the other end of which is connected to an output terminal. (3) A fourth transistor according to claim 1 or 2, further comprising a fourth transistor whose base is connected to the collector of the other transistor of the current mirror circuit, whose collector is connected to the first power supply, and whose emitter is connected to the output terminal. Amplitude detection circuit.