JPH0324070B2 - - Google Patents

Info

Publication number
JPH0324070B2
JPH0324070B2 JP61043751A JP4375186A JPH0324070B2 JP H0324070 B2 JPH0324070 B2 JP H0324070B2 JP 61043751 A JP61043751 A JP 61043751A JP 4375186 A JP4375186 A JP 4375186A JP H0324070 B2 JPH0324070 B2 JP H0324070B2
Authority
JP
Japan
Prior art keywords
region
regions
semiconductor
gate electrode
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61043751A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62200757A (ja
Inventor
Shigeru Atsumi
Shinji Saito
Sumio Tanaka
Nobuaki Ootsuka
Kunyoshi Yoshikawa
Takashi Kamei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Priority to JP61043751A priority Critical patent/JPS62200757A/ja
Publication of JPS62200757A publication Critical patent/JPS62200757A/ja
Publication of JPH0324070B2 publication Critical patent/JPH0324070B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83125—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having shared source or drain regions

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
  • Static Random-Access Memory (AREA)
JP61043751A 1986-02-28 1986-02-28 Ｍｏｓ型半導体装置 Granted JPS62200757A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61043751A JPS62200757A (ja) 1986-02-28 1986-02-28 Ｍｏｓ型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61043751A JPS62200757A (ja) 1986-02-28 1986-02-28 Ｍｏｓ型半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP5327531A Division JP2653632B2 (ja) 1993-12-24 1993-12-24 マスクｌｄｄ構造のｍｏｓ型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS62200757A JPS62200757A (ja) 1987-09-04
JPH0324070B2 true JPH0324070B2 (fr) 1991-04-02

Family

ID=12672467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61043751A Granted JPS62200757A (ja) 1986-02-28 1986-02-28 Ｍｏｓ型半導体装置

Country Status (1)

Country Link
JP (1) JPS62200757A (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63302569A (ja) * 1987-06-01 1988-12-09 Mitsubishi Electric Corp 電界効果トランジスタ
JP2601664B2 (ja) * 1987-09-18 1997-04-16 日本テキサス・インスツルメンツ株式会社 絶縁ゲート型電界効果半導体装置
JP2549726B2 (ja) * 1989-01-30 1996-10-30 株式会社東芝 半導体集積回路とその製造方法
JPH03190278A (ja) * 1989-12-20 1991-08-20 Oki Electric Ind Co Ltd オフセット型ｍｉｓトランジスタ装置
JP2746087B2 (ja) * 1993-12-01 1998-04-28 日本電気株式会社 半導体集積回路
JP2972533B2 (ja) * 1994-11-29 1999-11-08 日本電気株式会社 Ｃｍｏｓ型半導体集積回路装置
US5895955A (en) * 1997-01-10 1999-04-20 Advanced Micro Devices, Inc. MOS transistor employing a removable, dual layer etch stop to protect implant regions from sidewall spacer overetch
US5793089A (en) * 1997-01-10 1998-08-11 Advanced Micro Devices, Inc. Graded MOS transistor junction formed by aligning a sequence of implants to a selectively removable polysilicon sidewall space and oxide thermally grown thereon
US6124610A (en) * 1998-06-26 2000-09-26 Advanced Micro Devices, Inc. Isotropically etching sidewall spacers to be used for both an NMOS source/drain implant and a PMOS LDD implant
JP4494344B2 (ja) * 2006-02-06 2010-06-30 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4494512B2 (ja) * 2009-08-21 2010-06-30 株式会社半導体エネルギー研究所 半導体装置及びその作製方法、液晶パネル

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5563873A (en) * 1978-11-07 1980-05-14 Seiko Epson Corp Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS62200757A (ja) 1987-09-04

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Legal Events

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EXPY Cancellation because of completion of term