JPH03242578A - Circuit for displaying radar image - Google Patents
Circuit for displaying radar imageInfo
- Publication number
- JPH03242578A JPH03242578A JP2040121A JP4012190A JPH03242578A JP H03242578 A JPH03242578 A JP H03242578A JP 2040121 A JP2040121 A JP 2040121A JP 4012190 A JP4012190 A JP 4012190A JP H03242578 A JPH03242578 A JP H03242578A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- weather
- video signal
- amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 101000860173 Myxococcus xanthus C-factor Proteins 0.000 abstract description 6
- 238000007493 shaping process Methods 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 206010047571 Visual impairment Diseases 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
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- Radar Systems Or Details Thereof (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は１次レーダ装置における映像表示回路に関し、
特にウェザ−クラッタ映像信号と目標信号とを視認でき
るレーダ映像表示回路に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video display circuit in a primary radar device,
In particular, the present invention relates to a radar image display circuit that can visually recognize a weather clutter image signal and a target signal.
従来、１次レーダ装置において、目標機を観測するだけ
でなく、目標機周辺のウェザ−・クラッタの状況を観測
する必要性がある場合がある。しかし、この種のレーダ
映像表示方式は、レーダ受信機にて受信処理された信号
をウェザ−信号と目標信号とを区別せずそのまま表示装
置へ送出し、表示装置に表示される映像信号の強度を制
御する方式となっていた。BACKGROUND ART Conventionally, in a primary radar device, there are cases where it is necessary to not only observe a target aircraft but also observe the weather clutter situation around the target aircraft. However, in this type of radar image display method, the signal received and processed by the radar receiver is sent to the display device as is without distinguishing between the weather signal and the target signal, and the intensity of the image signal displayed on the display device is It was a method of controlling the
上述した従来のレーダ映像表示回路は、ウェザ−信号と
目標信号とを表示装置内で混合し、表示装置のＰＰＩ表
示画面上に表示するようになっているので１．ウェザ−
領域内の目標機が観測しにくくなる場合があるという欠
点があった。The conventional radar image display circuit described above mixes the weather signal and the target signal within the display device and displays the mixture on the PPI display screen of the display device. weather
The drawback was that it could be difficult to observe target aircraft within the area.
本発明の目的は、前述の問題点を解決するために、ウェ
ザ−・クラッタ映像信号も視認でき、さらにウェザ−・
クラッタ内にある目標機の観測を容易にできるレーダ映
像表示回路を提供しようとするものである。SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, it is an object of the present invention to make it possible to visually recognize weather clutter video signals.
The present invention aims to provide a radar image display circuit that can easily observe a target aircraft in clutter.
本発明のレーダ映像表示回路は、ウェザ−ビデオ信号と
目標物ビデオ信号とを表示するレーダ映像表示回路にお
いて、前記ウェザ−ビデオ信号を２等分する分配器と、
この２等分された一方のウェザ−ビデオ信号を反転増幅
した後に定められた遅延時間を付与する遅延回路と、前
記２等分された他方のウェザ−ビデオ信号を増幅する増
幅器と、前記遅延回路の出力信号と前記増幅器の出力信
号とを入力して減算する減算器と、前記減算器の出力信
号における負極性成分を除去するリミッタ回路部と、前
記リミッタ回路部の出力信号を波形整形した後に目標物
を有するビデオ信号とともに重畳して表示する映像表示
部とを備えている。A radar image display circuit of the present invention is a radar image display circuit that displays a weather video signal and a target object video signal, and includes a divider that divides the weather video signal into two equal parts;
a delay circuit that inverts and amplifies one of the two halves of the weather video signal and then provides a predetermined delay time; an amplifier that amplifies the other of the two halves of the weather video signal; and the delay circuit. a subtracter that inputs and subtracts the output signal of the amplifier and the output signal of the amplifier; a limiter circuit that removes a negative polarity component in the output signal of the subtracter; The image display unit includes a video display unit that displays a video signal including the target object in a superimposed manner.
〔実施例〕 次に、本発明について図面を参照して説明する。〔Example〕 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例のｉ成因である。第１図にお
いて、受信機〈図示せず）から送出されるウェザ−のみ
の信号であるウェザ−・ビデオ信号２０は分配器１にて
Ａ信号２０とＢ信号２工とに等分配される。一方のＡ信
号２０は、増幅器２で増幅された後、減算器５に入力さ
れる。他方のＢ信号２１は反転増幅器３で、信号の極性
を反転し増幅した後に、後述するＡ信号２０と遅延調整
する遅延回路４経由減算器５に入力され、Ｃ信号２２と
Ｄ信号２３との差信号２２が抽出される。FIG. 1 shows an example of an embodiment of the present invention. In FIG. 1, a weather video signal 20, which is a weather only signal, sent out from a receiver (not shown) is equally distributed into an A signal 20 and a B signal 2 by a distributor 1. One A signal 20 is input to the subtracter 5 after being amplified by the amplifier 2 . The other B signal 21 is inverted and amplified by the inverting amplifier 3, and then inputted to the subtracter 5 via the delay circuit 4 which performs delay adjustment with the A signal 20, which will be described later, and is then inputted into the subtracter 5 to combine the C signal 22 and the D signal 23. A difference signal 22 is extracted.
この差信号２２は、分配器６にてＣ信号２３とＤ信号２
４とに等分配される。一方のＣ信号２３は、リミッタ−
回路７で負極性成分が除去され、合成器１０へ入力され
る。他方のＤ信号２４は、反転増幅器８で、信号の極性
を反転した後リミッタ−回路って負極性成分が除去され
、合成器１０へ入力される。合成器１０で合成された信
号２５は波形整形回路１１にて信号波形を整形した後、
レーダの映像表示装置１２へ送出される。なお映像表示
装置１２には外部から目標物のビデオ信号であるＭＴＩ
ビデオ信号２７またはノーマルビデオ信号２８が入力さ
れ前述のウェザ−ビデオ信号と重畳される。This difference signal 22 is divided into a C signal 23 and a D signal 2 by a distributor 6.
It is equally distributed between 4 and 4. One C signal 23 is a limiter
The negative polarity component is removed by the circuit 7 and inputted to the synthesizer 10. The other D signal 24 is inverted in polarity by an inverting amplifier 8, and a negative polarity component is removed by a limiter circuit, and then input to a combiner 10. After the signal 25 synthesized by the synthesizer 10 is shaped into a signal waveform by the waveform shaping circuit 11,
It is sent to the radar video display device 12. Note that the video display device 12 receives an MTI, which is a video signal of the target, from the outside.
A video signal 27 or a normal video signal 28 is input and superimposed on the weather video signal described above.
次に前述の遅延回路４の動作原理を第２図（ａ）。Next, the operating principle of the aforementioned delay circuit 4 is shown in FIG. 2(a).
（ｂ）に示す従来例のクラッタ表示（第２図（ａ））と
本実施例のクラッタ表示（第２図（ｂ））の説明図を対
比しながら説明する。第２図（ａ）の左側のＡスフ−１
表示は２個のクラッタビデオ信号３０３１がベーシック
雑音上に存在する状態を示し、図の右側のＰＰＩ表示は
このクラッタ残像３０、へ、３１Ａが映像表示としてわ
ずかに残っている状態を示している。本実施例を示す第
２図（ｂ）の左側のＡスフ−１表示は第１図におけるＢ
信号２１の反転信号に対して約数ナノ秒程度の遅延時間
を遅延回路４により付与している。したがってＣ信号２
２と遅延されたＤ信号２３とは第２図（ｂ）のＡスフ−
１表示に示すように消去されたクラッタビデオ信号３２
．３３のそれぞれ前縁３２Ａ、３３Ａと後縁３２Ｂ、３
３Ｂにおいてクラッタビデオ信号が相殺されずに残るこ
とになる。なお、クラッタ信号に時間による変化は左程
大きくないので十分に相殺される。したがって第２図（
ｂ）の右側のＰＰＩ表示に示すようにクラッタの位置３
２Ｃ，３３Ｃの輪郭のみが映像として残り、もし目標物
がクラッタ内に存在する場合に明瞭に区別して視認する
ことができる。A description will be given while comparing the explanatory diagrams of the conventional clutter display (FIG. 2(a)) and the clutter display of the present embodiment (FIG. 2(b)) shown in FIG. 2(b). A-1 on the left side of Figure 2 (a)
The display shows a state in which two clutter video signals 3031 are present on the basic noise, and the PPI display on the right side of the figure shows a state in which this clutter afterimage 30, 31A remains slightly as a video display. The A-1 display on the left side of FIG. 2(b) showing this embodiment is B in FIG.
The delay circuit 4 provides a delay time of approximately several nanoseconds to the inverted signal of the signal 21. Therefore, C signal 2
2 and the delayed D signal 23 are the A spectrum of FIG. 2(b).
1. Clutter video signal 32 erased as shown in display 1.
．． 33, respectively, leading edges 32A, 33A and trailing edges 32B, 3
3B, the clutter video signal will remain uncancelled. Note that the change in the clutter signal over time is not as large as the one on the left, so it is sufficiently canceled out. Therefore, Figure 2 (
Clutter position 3 as shown in the PPI display on the right side of b)
Only the outlines of 2C and 33C remain as images, and if a target exists within the clutter, it can be clearly distinguished and visually recognized.
以上説明したように、本発明は、ウェザ−・ビデオ信号
の前縁及び後縁酸分の信号のみ抽出し、波形整形後、レ
ーダ映像表示装置に入力されるので、他のレーダビデオ
、すなわちノーマルビデオによる映像信号又はＭＴＩビ
デオによる映像信号と重畳した場合にウェザ−領域内の
目標映像が容易に視認できるという効果がある。As explained above, the present invention extracts only the leading edge and trailing edge acid signals of the weather video signal, and inputs them to the radar image display device after waveform shaping. When superimposed with a video image signal or an MTI video image signal, there is an effect that the target image within the weather area can be easily recognized.
【図面の簡単な説明】
第１図は本発明の一実施例の構成図、第２図（ａ）、（
ｂ）はそれぞれ従来例および本実施例のウェザ−・ビデ
オ信号のＡスコープ、ＰＰＩ表示例の説明図である。
１．６・・・分配器、２・・・増幅器、３，８・・・反
転増幅器、４・・・遅延回路、５・・・減算器、７．９
・・・リミッタ回路、１０・・・合成器、１１・・・波
形整形回路、１２・・・映像表示装置。[Brief Description of the Drawings] Figure 1 is a configuration diagram of an embodiment of the present invention, Figures 2 (a), (
b) is an explanatory diagram of A-scope and PPI display examples of weather video signals in the conventional example and the present embodiment, respectively. 1.6...Distributor, 2...Amplifier, 3,8...Inverting amplifier, 4...Delay circuit, 5...Subtractor, 7.9
... limiter circuit, 10 ... synthesizer, 11 ... waveform shaping circuit, 12 ... video display device.
Claims (1)
ーダ映像表示回路において、前記ウェザービデオ信号を
２等分する分配器と、この２等分された一方のウェザー
ビデオ信号を反転増幅した後に定められた遅延時間を付
与する遅延回路と、前記２等分された他方のウェザービ
デオ信号を増幅する増幅器と、前記遅延回路の出力信号
と前記増幅器の出力信号とを入力して減算する減算器と
、前記減算器の出力信号における負極性成分を除去する
リミッタ回路部と、前記リミッタ回路部の出力信号を波
形整形した後に目標物を有するビデオ信号とともに重畳
して表示する映像表示部とを備えたことを特徴とするレ
ーダ映像表示回路。A radar image display circuit that displays a weather video signal and a target object video signal includes a divider that divides the weather video signal into two, and a splitter that divides the weather video signal into two, and a splitter that is determined after inverting and amplifying one of the two halves of the weather video signal. a delay circuit that provides a delay time; an amplifier that amplifies the other weather video signal divided into two equal parts; a subtracter that inputs and subtracts the output signal of the delay circuit and the output signal of the amplifier; A limiter circuit section that removes a negative polarity component in the output signal of the subtracter, and a video display section that waveform-shapes the output signal of the limiter circuit section and then displays it superimposed with a video signal having a target object. Features a radar image display circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2040121A JP2743550B2 (en) | 1990-02-20 | 1990-02-20 | Radar image display circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2040121A JP2743550B2 (en) | 1990-02-20 | 1990-02-20 | Radar image display circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03242578A true JPH03242578A (en) | 1991-10-29 |
| JP2743550B2 JP2743550B2 (en) | 1998-04-22 |
Family
ID=12571990
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2040121A Expired - Lifetime JP2743550B2 (en) | 1990-02-20 | 1990-02-20 | Radar image display circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2743550B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012058174A (en) * | 2010-09-13 | 2012-03-22 | Toshiba Corp | Precision approach radar and radar signal processing method |
-
1990
- 1990-02-20 JP JP2040121A patent/JP2743550B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012058174A (en) * | 2010-09-13 | 2012-03-22 | Toshiba Corp | Precision approach radar and radar signal processing method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2743550B2 (en) | 1998-04-22 |
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