JPH03250757A - Semiconductor device - Google Patents

Abstract

PURPOSE:To avoid the alignment slip between the mutual packages in the soldering steps while augmenting the connection strength between the mutual packages by a method wherein the lower end of an input.output terminal of an upper step package is inserted into the upper end side of the input.output terminal of a lower step package. CONSTITUTION:The lower end of an input.output terminal 3b of a middle step package Q is inserted into a hole l as an engaging part of the input.output terminal 3c of a lower step package R so as to be soldered. Furthermore, the lower end of an input.output terminal 3a of an upper step package P is inserted into another hole l as the engaging part of the input output terminal 3b so as to be soldered and then the metallic vessels 1 are brazed with each other. Through these procedures, a semiconductor device having high connection strength with upper-lower step packages P-R accurately aligned by the mutual insertion of the input.output terminals can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a structure for stacking pancages.

[Conventional technology]

BACKGROUND OF THE INVENTION There has been a demand for higher density semiconductor elements to be incorporated into mobile phones, small handheld devices, office automation equipment, etc. from the viewpoint of ease of use and design.

FIG. 5 is a side view showing an example of a conventional semiconductor device with high density, and in the same figure, B is a mounting board;
On top of that, packages P that house semiconductor elements (not shown) are stacked in multiple stages.

In this case, an input/output terminal T is provided on the outer periphery of each package P, the tip of which extends toward the front and back surfaces of the package P, and the upper and lower input/output terminals T and T are brought into contact with each other during stacking and are soldered. There is.

[The limbs that the invention attempts to solve]

However, according to conventional semiconductor devices, soldering tends to cause misalignment between the upper and lower package, making positioning difficult when soldering, and the connection between the upper and lower packages is made only by soldering. However, this method has the disadvantage that the connection strength between the packages is not sufficient.

The present invention was made to solve the above-mentioned problems, and provides a semiconductor device in which the upper and lower packages are accurately positioned and the connection strength is high.

[Means to resolve the heel]

The lower end of the input/output terminal of the upper package is fitted into the fitting part provided at the upper end of the input/output terminal of the lower package.

[Effect]

The lower end of the input/output terminal of the upper pancage is fitted and positioned on the upper end of the input/output terminal of the lower package.
Movement in left and right three front and back directions is blocked.

[Embodiments of the invention]

1 to 4 are a sectional view and a plan view showing an embodiment of a semiconductor device according to the present invention. In each figure, R is a lower package, P is an upper pancake, and Q is a middle package, each of which is rectangular. The bottom plate 1a of this and the bottom plate 1a of
It has a metal container 1 consisting of a side frame 1b provided on the outer periphery of the metal container 1. The upper package P has its bottom plate 1a facing upward, and the middle and lower pancakes Q and R have their bottom plates 1a facing downward. As shown in Figure 4, each package P, Q, R
A semiconductor element 5 is provided at the center of the surface of the bottom plate 1a, and ceramic members 2 are located at the left and right ends of the semiconductor element 5. At the same position of each ceramic member 2, a cylindrical high frequency input/output terminal 3a is provided.
, 3b and 3c are planted so as to extend upward and downward.

The upper ends of the input/output terminals 3a, 3b, 3c are exposed from the surface of each package, and the lower ends of the input/output terminals 3a, 3b, 3c protrude downward through the window m.

Further, a hole 1 is provided at the upper end of the input/output terminals 3b, 3c to serve as a fitting portion, and the lower end of the input/output terminal 3a, 3b is formed to have a small diameter so as to fit into the hole 1. Each input/output terminal 3a, 3b, 3c is connected to the semiconductor element 5 via a lead n and a bonding wire t. 6 is a flat sealing cap that seals the opening of each cage P and QR.

The metal container 1 is made of Kovar, and the ceramic member 2 has an internal lead portion including a wire bond portion that connects the metal container 1 and the input/output terminals 3 with tungsten or molybdenum metallized with acid disochloride. The metal container, the ceramic member 2, and the input/output terminal 3 are fixed with live shellfish and brazed together.

The characteristic impedance of the input/output terminals 3a, 3b, and 3c is
Adjustments are made using the ceramic member 2 using the metal container 1 as a ground. The characteristic impedance Z0 is expressed by the following equation, and can be arbitrarily set depending on the dimensions and shape between the ground, the dielectric, and the conductor.

Zo = ■, ・C (V p is the propagation speed determined by the dielectric material, and C is the capacitance per unit length of the line.) After die-bonding the semiconductor element 5 to the package assembled in this way, a seal cap is attached. It is sealed with 6.

For the seal cap 6, a radio wave absorber such as ferrite is used as necessary to avoid mutual interference between the upper and lower stages. Electrical connections between the stacked upper, middle, and lower packages P and QR are made by soldering by inserting the input/output terminals 3a, 3b into the holes l provided in the input/output terminals 3b, 3c.

The normal input/output terminals 4a, 4b, 4c have a flange 4m as shown in FIG. , the lower ends of 4b fit into the connection holes 9,
Connected by soldering.

The portions that will become the connection holes 9 of the input/output terminals 4a, 4b are manufactured by laminating and baking in an oven hole state.

Incidentally, the assembly of the metal container 1 and the ceramic member 2 is not limited to the brazing of the embodiment, and any other joining method may be used.

According to the above configuration, the input/output terminal 3 of the lower package R
The lower ends of the input/output terminals 3b, 4b of the middle package Q are fitted and soldered into the hole l and the connection hole 9, which serve as fitting parts, and the hole β serves as a fitting part for the input/output terminals 3b of the middle package Q. The lower ends of the input/output terminals 3a, 4a of the upper package R are fitted into the connections 9 and soldered, and the metal containers 1 are further brazed together to complete the assembly. Therefore, based on the fit between the input and output terminals, the lower packages P, Q, and R are accurately positioned in the ground and do not move, making soldering and brazing easier and ensuring an accurate three-dimensional stacked shape. can.

Further, even if an external force is applied due to the fitting force between the input and output terminals, there is no risk that the packages will easily peel off from each other. Moreover, according to this embodiment, the metal container 1 is used as the base substrate,
The characteristic impedance of the high-frequency input/output terminals 3a, 3b, and 3c is adjusted, and the seal cap 6 has a configuration that allows multi-stage stacking of packages using radio wave absorbers as necessary, so that the heat dissipation of the high-frequency element is improved. There are no problems such as signal loss or mutual interference due to interstage connections, and there is an effect of improving the accommodating ratio of high-frequency elements to the mounting area of the pancage.

In the present invention, the middle pancage Q may be omitted and stacked in two stages, or a plurality of them may be provided and stacked in three or more stages.

〔Effect of the invention〕

As described above, according to the present invention, the lower end of the input/output terminal of the upper package is fitted onto the upper end of the input/output terminal of the lower bar/7 cage, so that the packages can be connected to each other during soldering etc. Misalignment will not occur, and the connection strength between pan cages can be increased.

[Brief explanation of drawings]

1 to 4 are a sectional view and a plan view showing an embodiment of a semiconductor device according to the present invention, and FIG. 5 is a diagram showing an example of a conventional semiconductor device. ...Input/output terminal, 5. Semiconductor element, 6. Seal cap, P, Q, R... Upper, middle, lower package.

Claims (1)

[Scope of Claims] A semiconductor device containing a semiconductor element and comprising a lower package and an upper package stacked on each other, wherein the upper and lower packages are provided with input/output terminals extending upward and downward, and the lower package The input/output terminal has its upper end exposed from the upper surface of the lower package, and a fitting portion is formed at the upper end to fit the lower end of the input/output terminal of the upper package.