JPH03257553A - Exclusive storage area control system - Google Patents

Abstract

PURPOSE:To shorten the time during which a lock state is acquired via the hardware by providing a hardware lock control means which reads a control minor area with no hardware lock state based on the register information stored in a CPU and then carries out the exclusive control of an exclusive area. CONSTITUTION:A CPU 5 reads a control minor area 2-1 of an exclusive storage area 2 with no hardware lock state. When an input/output processor 6 decides that the area 2 is not being updated, the CPU 5 acquires a lock state caused by the hardware and fetches again the area 2-1. Then the CPU 5 writes an updating mode into the area 2-1 when 2 is not being updated. Thus the area 2-1 is opened and an exclusive access is given to the area 2. Therefore the CPU 5 can read the area 2-1 with no hardware lock state while having an access to the area 2 of a main storage 1. Then it is possible to shorten the time during which a lock state is acquired by the hardware and then to increase the processing speed.

Description

[Detailed description of the invention]

[0001]

[Industrial application field]

The present invention relates to an exclusive storage area control method that performs exclusive control of an exclusive storage area on main memory. In a computer that uses hardware locks to exclusively control an exclusive storage area in main memory that requires exclusive control, if multiple devices frequently access the exclusive storage area, contention between these devices may occur. It is desired to reduce the time loss due to this and improve the overall processing speed. [0002] Generally, when a main memory is accessed from a CPU, a hardware lock and a software lock of the main memory are performed. Hardware locking is achieved by setting the exclusive control area lock address to be locked in the lock address register in the storage controller, and then comparing the subsequent access address and lock address and canceling the access if they match. be. [0003] A software lock is information (1) indicating that a control small area of an exclusive storage area that is being accessed is locked from the exclusive storage area by the CPU or input/output processing unit.
It is possible to write the exclusive control area to other CPUs or
It is to enable the PU or input/output device to read and write. [0004] A hardware lock is placed on a limited number of exclusive storage areas. That is, at a certain point in time, only the address stored in the lock address register is hardware locked. Software locks can be applied to multiple exclusive control areas by writing 1 to multiple small areas of the main memory. [0005] The hardware lock is applied only when accessing each small area for updating the software lock, and therefore, is applied for accessing the small area for updating the software lock, A software lock is applied when a certain CPU or input/output device wants to have a certain exclusive control area exclusive for itself for a predetermined period of time. Therefore, the hardware lock locks as many exclusive storage addresses as there are lock address registers of the main storage controller at one time. Software lock is 1
It is possible to lock multiple exclusive storage areas at a time [0006]

[Conventional technology]

Conventionally, a device B (not shown) is currently updating a storage area that should be under exclusive control, and another device A (not shown) attempts to acquire the right to update the exclusive storage area. As shown in the flowchart 5, the control small area of the exclusive storage area is locked by hardware and then the contents of this control small area are read (FIG. 5 (21), (22)). That is, when device A accesses the exclusive storage area, it applies a hardware lock to a small area of the exclusive storage area, reads the contents, and determines whether the exclusive storage area is software-locked or not. If the exclusive storage area is being updated by device B, that is, the small area is 1, and the software lock is applied by device B, device A
(Figure 5 (23) YES) - Then, the hardware lock of the small control area is released (Figure 5 (26))
) Locked again by hardware (Figure 5 (21)
) and then read the contents of this control small area repeatedly (Figure 5 (21), (22), (23)
) YES, the loop of (26) was repeated until (23) became NO). [0007] Furthermore, when device B relinquishes the update right and device A subsequently acquires the update right, device A acquires a lock on the control small area by hardware and then sets the lock bit by software. By this, information indicating that the small control area is being updated is written in the small control area (24), and the small control area is locked by the hardware so that device B can access the small control area of other exclusive storage area. (25) [0008] The above conventional example will be further explained using a time chart. FIG. 6 is a time chart of a case in which device A and then device B attempt to obtain a software lock for an exclusive storage area without a software lock in the conventional example. Here, each sign has the following meaning: [0009] HL&F Obtain hardware lock & read small area SL Check: Determine whether there is a software lock. SuL & HuL: Write lock bit to a small area, that is, acquire software lock and release hardware lock.Due to hardware lock of device A, device B
This is an example where the lock and fetch of the two files are made to wait, making it impossible to take software locks on each other. First, 3
As shown in 1, in the past, whenever a software lock was applied, a hardware lock was also applied. After applying a hardware lock, I went to read the small control area that includes the pattern of whether or not a software lock is present (32). Device A
While the hardware lock was applied (33), attempts from device B to acquire the hardware lock and read the small area were canceled (34). Then, after device A writes the lock pattern to the control small area, that is, updates it (35), device A acquires a hardware lock (36). Next, device B performs an operation to apply a hardware lock in order to update the software lock that locks the control small area (37). In other words, device B repeatedly attempts to apply a hardware lock until the hardware lock by device A is released. Therefore, device B
Acquisition of a hardware lock and loading of a small area will be delayed. [0010] FIG. 7 shows another conventional example, and is a time chart of a case in which it is assumed that apparatus B has already applied a software lock and apparatus A wants to apply a software lock. Each symbol here has the following meaning. [0011] HuL Release of hardware lock SuL: Release of software lock, that is, clear the lock bit of the small area. [0012] As shown in 31, conventionally, device A also applied a hardware lock whenever a software lock was applied. After applying the hardware lock, I went to read the small area of the software lock (32). However, the software lock by device A has not yet been applied. While the hardware lock of device A is applied (33) Device B accesses the small area in order to perform SuL, that is, release the software lock, that is, change the lock bit of the small area from 1 to O. Even if you give me the address,
Cancel due to hardware lock by device A
(40) [0013] Since the content read by the device A from the small area is 1, the device A releases the hardware lock (41) according to 26) in FIG. When device A has not updated its software lock yet, and device A tries to lock the hardware again before accessing device B's main memory (42), device A's hardware lock continues. (4
3). When device B further accesses the small area to release the SuL, that is, the software lock, the access is canceled (44). Only when the hardware lock of device A is released (45) can device B release the software lock (46). [0014] For the first time, device A can acquire the hardware lock and fetch the contents of the small area to acquire the software lock (47). Therefore, device B is blocked by device A's hardware lock.
will be delayed in releasing the software lock. As a result, the software lock on device A is also 4.
You will be forced to wait until after the point indicated by 7. [0015]

[Problem to be solved by the invention]

As mentioned above, device B is updating, that is, device B has a software lock. Exclusive control is required. In other words, another device A is updating an exclusive storage area that device B has a software lock on. When attempting to acquire the update right for the exclusive storage area in order to update the exclusive storage area, the other device A may acquire and release the hardware lock for the control small area even if the update right for device A cannot be acquired. This will be repeated (Fig. 5 (21), (22), (23) Y
As a result, when device B relinquishes the update right, that is, when releasing the software lock, it becomes difficult to access the small area and the loop of (26) is repeated. There was a problem in that device B could not quickly relinquish the update right due to repeated accesses. That is, since device A repeatedly acquires and releases hardware locks, it becomes difficult for device B to update small areas, and therefore device B becomes difficult to release software locks. [0016] The present invention reads a small control area of an exclusive storage area without hardware locking, acquires a hardware lock when it is determined that the information is not being updated, and then reads the information that is being updated when it is not being updated. will be written and released,
The purpose is to shorten the lock acquisition time by hardware and speed up processing. [0017]

[Means for Solving the Problems] Means for solving the problems will be explained with reference to FIG. In FIG. 1, a control small area 2-1 is a small area that stores information as to whether the exclusive storage area 2 provided on the main memory 1 is being updated exclusively. [0018] The hardware lock control mechanism 4 has a control small area 2-1.
This is a mechanism that locks updates of the contents using hardware. According to the present invention, there is provided a software lock control means for reading the information of the small area without a hardware lock and controlling the software lock when the exclusive storage area has no hardware lock. This provides a unique exclusive storage control method. [0019]

[Effect]

As shown in FIG. 1, the present invention reads the contents of the control small area 2-1 without hardware locking when device A updates exclusive storage area 2, and allows other device B to update the contents. When the exclusive storage area 2 is not being updated, that is, O is set in the control small area.The hardware lock control mechanism 4 locks the hardware in the control small area 2-1.
Information indicating that the information is acquired and being updated, that is, 1, is stored to release the control small area. [00201 In other words, as shown in FIG. 2, if device A reads the control small area 2-1 of exclusive storage area 2 without hardware locking (11) and the exclusive storage area is not being updated by another device B, When it is determined (12) that device A acquires a hardware lock (13) that device A attempts to fetch the control micro-head area 2-1 again (14), and when the exclusive storage area is not being updated (15) (16) and releases the information to the small control area (17) to exclusively access the exclusive storage area 2. Therefore, when device A accesses the exclusive storage area of main memory 1, it can first read the small control area 2-1 without hardware locking, reducing the amount of time the hardware lock is acquired. Therefore, it becomes possible to realize high-speed processing of the target program. [0021]

【Example】

Next, the configuration and operation of one embodiment of the present invention will be explained in detail using FIGS. 1 and 2. [0022] In FIG. 1, a main memory 1 is a memory that stores data, and is composed of an exclusive storage area 2 and the like. The exclusive storage area 2 is a storage area for mutual communication by being exclusively updated by multiple devices such as the central processing unit 5 and the input/output processing unit 6, and is updated by obtaining exclusive access by hardware. It has a small control area 2-1 that stores information as to whether or not the exclusive storage area is locked by software. [0023] The control small area 2-1 stores control information such as information on whether or not the exclusive storage area 2 is being updated, for example at the beginning of the exclusive storage area 2 provided on the main memory 1. For example, when the lock bit is 1, information indicating that it is being updated,
This is a small area for control that stores information indicating that updating is not in progress when the lock bit is O. [0024] The storage control device 3 controls access to the main memory 1, and includes a hardware lock control mechanism 4 that performs hardware lock access. [0025] The hardware lock control mechanism 4 is a mechanism that performs a P-lock on the control small area 2-1 of the main memory 1 using hardware. The lock address stored in the exclusive control address register 4-2 and the central processing unit 5 or input/output device 6
Address comparator 4 compares the access address notified from
-1 is compared, and when they match, access to the main memory 1 is inhibited and locked by hardware. Note that when the central processing unit 5 cannot acquire a lock by hardware, it waits until it can acquire a lock, and on the other hand, the input/output processing unit 6 acquires a lock by hardware [0026] Software lock control means in the central processing unit 5 5-1
determines the content read without locking from the control small area 2-1 at the time of lock access, issues a lock access request to the storage control device 3 when the information indicates that it is not being updated, and re-reads the control small area 2-1. Read the contents of area 2-1, and if it is not being updated, write the update information and release the lock access (Figure 2 (11) to 17), which will be described later)
On the other hand, if updating is in progress (FIG. 2 (12) YES), this is to repeatedly read the contents of the control small area 2-1 without requesting hardware lock access. [0027] Signal 7-0 is a notification signal for canceling access to exclusive storage area 2. Next, the operation of the configuration shown in FIG. 1 will be described in detail in accordance with the order shown in the flowchart shown in FIG. [0028] In FIG. 2, (11) is a storage area (control small area 2-
1) Perform the fetch. (12) determines whether the lock bit is set. This is done by reading (fetching) the contents of the control small area 2-1 in FIG. 1 without acquiring a hardware lock in step (11) to determine whether the lock bit is set. If YES (the lock bit is set in the small area and the exclusive storage area is being updated), repeat (11). If No (the lock bit is not set and the update is not in progress), then (
13) Do the following. [0029] In (13), a hardware lock of the storage area (control small area 2-1) is acquired. (14) performs a storage fetch. This is (13
) reads the contents of the control small area 2-1 that has been locked by the hardware. [0030] (15) determines whether the lock bit is set. This turns out to be (12) NO, indicating that the lock bit is not set, but in addition, (13) indicates that the lock bit is not set.
4) It is determined again whether the lock bit has not been set by another device during the short period of time. If YES (if the lock bit was set by another device during the short period between (13) and (14)), then (18)
The hardware lock of the storage area (control small area 2-1) is released in step 1, and step (11) is repeated. on the other hand,
If No (lock bit is not set)
In step (16), the lock bit is set and information indicating that updating is in progress is written to the control small area 2-1. After the contents of the exclusive storage area 2 are exclusively updated, the hardware acquires a lock on the control small area 2-1, stores information indicating that the update is not in progress, and releases the lock (17). [00,311 FIG. 3 is a more specific embodiment of the present invention. A software lock control circuit 5-1 provided in the central processing unit 5 of the device A includes a register 5-11, 5-12, a comparator 5-13, and a control circuit 5-14. The central processing unit 5 sends an access address from the decoder 5-2 to the storage control device 3 where the main memory 1 is located via the address line 5-3 in order to read and write the exclusive storage area of the main memory. When accessing the exclusive storage area of a memory, it is necessary to decide whether or not to lock the address area to prevent other device B's central processing unit or input/output device from accessing the exclusive storage area. A pattern, that is, a pattern in which bits of a small area of the exclusive storage area are set to 1 when locking is performed, that is, a lock pattern is set in the register 5-11. On the other hand, register 5-1
2, the lock pattern regarding the current exclusive storage area is read from the small area 2-1 of the access address in the main memory 1 and set via the data line 5-4 and the selection circuit 5-5. [0032] At this time, the lock pattern is read from the main memory without applying a hardware lock when the contents of the lock address register 4-2 in the storage control device 3 are different from the access address. If the access address and the lock address are the same, the lock pattern cannot be read from the main memory 1, and the CPU confirms that a hardware lock has already been applied from another device B. If this lock pattern is read into register 5-12 without a hardware lock, comparator 5-13 compares the lock patterns of register 5-11 and register 5-12, and determines the exclusive storage area of the access address. Assuming that there is currently no software lock on
The bit of the lock pattern of register 5-12 is O, while the bit of the lock pattern corresponding to the access address is 1, and this pattern is the bit of register 5-11.
Therefore, in response to a request from the CPU 5 of device A, the mismatch signal 7-2 becomes 1 by comparing registers 5-11 and 5-12. [0033] Signal 7-3 is a lock signal corresponding to (13) in FIG. 2, and means acquisition of a lock by hardware of a small area. On the other hand, signal 7-4 corresponds to (17) or (18) in Figure 2.
This is an unlock signal corresponding to 1, and when this signal is 1, it indicates that the hardware lock of the small area is released. [0034] If the lock patterns match as a result of the comparator 5-13, that is, if the lock bit is set in FIG. 2 (12), the hardware of the small area 2-1 is not locked. , always from main memory 1 to small area 2-1
Repeat the fetch operation. [0035] Furthermore, if the lock patterns do not match as a result of the comparator 5-13, the control circuit 5-14 outputs the signal 7-3.
By setting the lock signal to 1, the hardware of the small area 2-1 acquires a lock ((13) in Figure 2).
). In other words, the address you are trying to access,
It is input to the lock address register 4-2 through the gate circuit 4-3 enabled by the lock signal 7-3 via the address line 5-2. Therefore, in this case, the access address is locked by hardware, prohibiting other devices B from accessing the small area. That is, if the same address as the lock address is accessed from another device B, the address comparator 4-
1 turns on the access cancellation signal (signal 7-O). This makes it possible to cancel accesses from other devices. [0036] Therefore, while access to the small area from other devices is prohibited, the fetch of the small area from the main memory is set again in the register 5-12 ((14) in FIG. 2). The comparator 5-13 checks whether the lock bit is set in the register 5-12. If the lock bit is not set (No in Figure 2 (15)), the lock bit should be set (Figure 2 (16)). A lock pattern is written from the register 5-11 through the selection circuit 5-5 to the small area on the main memory via the data line 5-4, and the hardware lock of the small area is released ((17) in FIG. 2). . That is, the signal 7-4, ie, the UNLOCK signal, is activated, the address comparison is disabled in the address comparator 4-1, and the CPU 5 or the input/output processing device 6 is notified of the release of the lock. Also, if the lock bit is already set in registers 5-12 (
(FIG. 2 (15) YES) The unlock signal 7-4 is set to 1 without setting the lock bit, and the address comparator 4-1 and CPU 5 release the lock by the hardware of the small area.
, and notifies the input/output device 6 (FIG. 2 (18)). Note that the selection circuit 5-5 selectively connects the registers 5-11, 5-12 to the main memory. [0037] In this way, when the unlock signal (signal 7-4) turns on, the address comparison becomes invalid, that is, the lock address register is reset and no data is sent from another device B to the main memory. If access is possible and the lock signal (signal 7-3) is turned on, the lock address register 2 is set to the address to be locked, and other devices B are prevented from accessing that address. A hardware lock is applied. [0038] As described above, the present invention first checks whether the exclusive storage area is software locked, and if it is software locked, waits until the software lock is released (see Figure 2 (11). ), (12)) If no software lock is applied, the control small area is first hardware locked, and then the exclusive storage area is software locked. Therefore, even if a software lock is applied, the locked state of the exclusive storage area can be detected without applying a hardware lock. [0039] A time chart of the present invention will be explained using FIG. 4. Figure 4
As shown in , device A reads the small area without applying a hardware lock (51) and fetches it (52). [0040] After device B releases the software lock (53), device A reads the small area (54) and its contents are 0.
Fetch (55). Since device B has released the software lock (53), device A knows that the lock bit is not set in its exclusive storage area. Only at that time, device A applies a hardware lock to other devices (5
6) Apply software lock (57) and read (fetch) the small area (58). Device A writes a lock bit to the small area with the hardware locked (59). Device A then releases the hardware lock (60). As shown in device BIT 53, the software lock can be released quickly, and device A can also perform the software lock quickly, as shown in 59, without being hindered by the hardware lock by device B. [0041]

【Effect of the invention】

As explained above, according to the present invention, the small control area 2-1 of the exclusive storage area 2 is read without hardware locking, and when it is determined that it is not being updated, the hardware lock is acquired and further processing is performed. Since we have adopted a configuration in which exclusive storage area 2 is updated exclusively by writing a message indicating that it is being updated and releasing it when it is determined that it is not being updated,
The time during which the lock for the control micro-head area 2-1 is acquired by the hardware is shortened to reduce contention, and the lock can be quickly acquired upon release, resulting in faster processing of the target program. be able to.

[Brief explanation of drawings]

[Figure 1] A configuration diagram of an embodiment of the present invention,

[Figure 2] Lock acquisition processing flowchart of the present invention,

[Figure 3] A more specific block diagram of an embodiment of the present invention,

[Figure 4] 5 is a time chart showing the operation of the embodiment of the present invention.

[Figure 5] 3 is a flowchart of conventional lock acquisition processing.

[Figure 6] It is a time chart of a conventional example. °

[Figure 7] It is a time chart of a conventional example.

[Explanation of symbols]

Main memory exclusive storage area Small area storage controller for controlling locked objects by hardware Hardware lock control mechanism Address comparator Lock address register Central processing unit Software lock control circuit Input/output processing unit

【Document name】

drawing

[Zugetsu [Figure 2]

[Figure 3]

[Figure 4]

[Figure 6]

[Figure 7]

Claims (6)

[Claims] 1. In a computer system having a CPU and a main memory having an exclusive storage area, a control small area provided in the exclusive storage area (2) and containing information on whether or not to apply a software lock to the exclusive storage area. (2-1), hardware lock control means (4) that performs exclusive control on the control small area by comparing the access address and the lock address; An exclusive storage area control system comprising: software lock control means (5-1) that reads a control small area and performs exclusive control on the exclusive storage area. 2. The software lock control means includes a first register means (5-11) for storing a lock pattern, and a first register means (5-11) for storing information of a control small area of the exclusive storage area read from the main memory. 2 register means (5-12); and comparison means (5-12) for comparing the contents of the first and second registers.
5-13), in the comparison means, in the case of a mismatch, a lock signal is generated that notifies the hardware lock control means to lock the control small area, and the control small area is read out again. and control means (5-14) for generating an unlock signal for requesting the hardware lock control means to release the lock when the hardware lock is released.
The exclusive storage control method described. 3. If the comparison means match, the control means, before acquiring the lock of the small area by the hardware lock,
3. The exclusive storage control method according to claim 2, wherein reading of the lock pattern of the small area is repeated. 4. The control means fetches the control small area after acquiring the lock of the small area by the hardware lock control means, and when the comparison means does not match, sets a lock bit to the control small area. 3. The exclusive storage area control method according to claim 2, further comprising means for activating an unlock signal for releasing the hardware lock after being set. 5. The hardware lock control means (4) includes a lock address register (4-2) for setting an address of the main memory to which hardware lock is to be performed, and an accessed address and the contents of the lock address register. The address comparison means (4-1) to be compared and the address at which the lock signal becomes active are set in the lock address register, address comparison is enabled, and if the comparison results in a match, access using the access address is performed. Activate the cancel signal of
2. The exclusive storage area control method according to claim 1, further comprising control means for disabling said address comparison and inactivating said cancel signal when an unlock signal becomes active. [Claim 6] In an exclusive storage area control method that performs exclusive control of an exclusive storage area on the main memory, whether or not the exclusive storage area (2) created on the main memory (1) is being updated exclusively. A small control area (2-1) that stores software lock information indicating the
hardware lock acquisition means for locking the update of the contents of 2-1) by hardware; When the exclusive storage area (2) is being updated by reading without a hardware lock, the small area is repeatedly fetched, and when the exclusive storage area (2) is not being updated, the hardware lock acquisition means acquires a hardware lock for the small area. software lock that reads the pattern of the small area again with the hardware lock applied, and if the lock bit is not set in the small area, writes the lock bit to the small area to update the lock bit. control means (5-1), when the lock bit of the software lock pattern is already set in a state where a hardware lock is applied, or when the lock bit is set in the small area by the software lock control means; , a hardware lock release means (4) for releasing a hardware lock on a small area;