JPH03267768A - Ac signal detecting circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AC signal detection circuit suitable for use in detecting an AC signal for billing in an exchange and generating a billing pulse.

[Prior Art] Generally, in telephone lines, etc., in order to charge for line usage, meter pulses for billing are received within the exchange depending on the distance between terminals in communication while the line is in use. , the billing pulse is obtained by detecting this meter pulse. In Japan, where these billing pulses are counted and billing is done based on the counted value, the meter pulse is, for example, 507 AC signals,
As shown in FIG. 4, it is obtained by outputting each group of 120-3l20-36O for a plurality of cycles (for example, 6 to 18 cycles) at a predetermined time interval t.

The above-mentioned time interval t becomes shorter as the distance from the partner terminal increases, and the number of billing pulses per hour increases.

Conventionally, the meter pulse generated in this way is
The signals are input to an AC signal detection circuit as shown in the figure, and 507 AC signals are detected by this detection circuit.

In other words, FIG. 5 is a circuit diagram showing the configuration of a conventional billing AC signal detection circuit.
are Zener diodes that operate when the input voltage exceeds a predetermined voltage value ±VTR, 2 are these Zener diodes la,
A switching transistor that is driven by a signal from lb and outputs a pulse signal (a photocoupler may be used)
, 3 is a frequency detection circuit that detects the frequency of the pulse signal when it receives the pulse signal from the switching transistor 2, and outputs one charging pulse when the frequency of the pulse signal corresponds to the frequency 507 of the meter pulse. It is.

With such a configuration, as shown in FIG.
Zener diodes 1a and lb operate alternately each time the
Two pulse signals are output per period. Then, in the frequency detection circuit 3, the pulse signal from the switching transistor 2 is detected at a frequency of 50H of the oscillation source of the meter pulse.
The frequency is detected and judged to see if it corresponds to z, and the frequency 1,001 (
z), one billing pulse is output for a group of AC signals, as shown in FIG. here.

Since two pulse signals are output for one cycle of the AC signal, the frequency is actually 100 in the frequency detection circuit 3.
If it is detected that the frequency is Hz, a charging pulse is output.

Note that the predetermined voltage value ±VTH defined by the Zener diodes la and lb is determined by the fact that other weak 50Hz AC signals are added as noise to the 0 potential interval between the AC signal groups, as shown in Figure 6. In order to prevent this from being erroneously detected and outputting a large number of billing pulses, the setting is made appropriately.

The above-mentioned noise is likely to occur when there are other devices operating at 50 Hz in the vicinity of the exchange, and there is a risk that it will be mixed into the meter pulse.

[Problems to be Solved by the Invention] However, in such a conventional AC signal detection circuit, as shown in FIG. The duty of the pulse signal output from the transistor 2 does not change significantly, and the frequency of the alternating current signal can be accurately detected by the frequency detection circuit 3. However, as shown in the upper part of Fig. 7, when noise is added to the AC signal and the period does not change but the amplitude changes greatly, the predetermined voltage value ±VdH may or may not be exceeded. The duty of the pulse signal from the switching transistor 2 may vary greatly, as shown in the lower part of FIG. In such a case, even if an AC signal with a frequency of 50 Hz is input, the frequency detection circuit 3 will not be able to detect the accurate frequency of the pulse signal, resulting in problems such as being unable to generate billing pulses. be.

The present invention was made in view of the above problem, and even when noise is added to an AC signal, it prevents the frequency data from changing depending on the amplitude of the noise, and generates a rectangular wave signal according to the period of the AC signal. The purpose of the present invention is to provide an AC signal detection circuit that can accurately output.

[Means to solve the problem] FIG. 1 is a block diagram of the principle of the present invention.

In this Figure 1, 4 is a waveform shaping circuit that converts an AC signal into a rectangular wave (pulse) signal of the same frequency as the AC signal, and 5 is a waveform shaping circuit that detects a predetermined value VTR or more for the AC signal and records the detected state as one cycle of the AC signal. The signal level detection circuit 6 that holds the above is a gate circuit that controls the passing state of the rectangular wave signal from the waveform shaping circuit 4 by receiving the detection result from the signal level detection circuit 5 as a gate control signal, and this gate circuit 6, the voltage level of the AC signal is set to a predetermined value VTI (
In this case, the rectangular wave signal from the waveform shaping circuit 4 is passed through at least one cycle of the AC signal. Further, 7 is a frequency detection circuit that detects the frequency of the rectangular wave signal that has passed through the gate circuit 6.

[Function] With the above-described configuration, when an AC signal is input, the waveform shaping circuit 4 converts the input AC signal into a rectangular wave signal having the same frequency as the AC signal, and outputs the rectangular wave signal. On the other hand, the AC signal is also input to the signal level detection circuit 5, and in this signal level detection circuit 5, the voltage level is set to a predetermined value VT.
) Detect whether the value has become 1 or more. When detecting that the voltage level has exceeded the predetermined value VTH, the - signal level detection circuit 5 maintains the detected state for one period or more of the AC signal. While the signal level detection circuit 5 is in the detection state, the gate circuit 6 passes the rectangular wave signal from the waveform shaping circuit 4 and outputs it to the frequency detection circuit 7.

At this time, since the rectangular wave signal that passes through the gate circuit 6 and is input to the frequency detection circuit 7 has the same period as the AC signal converted by the waveform shaping circuit 4, the frequency detection circuit 7 uses the AC signal The exact frequency of can be detected.

Here, in the operation of the waveform shaping circuit 4, even when noise with a low voltage level is input as an AC signal, a rectangular wave signal having the frequency of the noise is output. However, in the present invention, the rectangular wave signal outputted along with the low-level noise is not an AC signal having a voltage level equal to or higher than the predetermined value VT) by the operation of the signal level detection circuit 5 and gate circuit 6 described above. As far as possible, the signal is not output to the frequency detection circuit 7 side.

Furthermore, once the voltage level reaches a predetermined value VTR or higher, the signal level detection circuit 5 maintains the detection state for more than one period of the AC signal, and during that time, the rectangular wave signal from the waveform shaping circuit 4 is transmitted to the frequency detection circuit 7. Therefore, at least one cycle of the rectangular wave signal is input to the frequency detection circuit 7, and the frequency of the AC signal can be detected.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings. In this embodiment as well, a case will be described in which the AC signal detection circuit of the present invention is used to generate billing pulses in an exchange, similar to the conventional one shown in FIG.

Fig. 2 is a block diagram showing an embodiment of the present invention. In this Fig. 2, 4A compares the voltage level of the input meter pulse (AC signal) S with the ground level (0 point). It is a comparator (waveform shaping circuit) that outputs a LO- level when it swings to one side, and a High level when it swings even slightly to the + side.In other words, this comparator 4A detects the 0 cross point of the meter pulse S, and outputs a high level when it swings even slightly to the + side. Pulse S
A pulse signal (square wave signal) S with the same frequency as this,
It shapes the waveform.

Further, 5A is a signal level detection circuit that detects a predetermined value VTR or more for the meter pulse S and holds the detected state for more than one period of the meter pulse S1.This signal level detection circuit 5A is a half-wave rectifier of the meter pulse Sl. An integrating circuit 9 receives the rectified signal S from the diode 8 and performs an integration process, and compares the output S4 from the integrating circuit 9 with a predetermined value VTR, and determines that the output S4 is equal to the predetermined value VTH. If it exceeds, a high level signal S,
and a comparator 10 that outputs.

Further, the integrating circuit 9 is composed of resistors 9a, 9b and a capacitor 9C, and by appropriately setting the resistance values of the resistors 9a, 9b and the capacitance of the capacitor 9C, the rising (charging) The time constant is set so that the fall (discharge) is early and the fall (discharge) is slow.By slowing down the fall in this way, when the voltage level of the meter pulse S1 exceeds a predetermined value VTH, the voltage level from the integrating circuit 9 is The state in which the output S4 exceeds the predetermined value VτH is maintained for one period or more of the meter pulse Si. Therefore, the signal SS from the comparator 10 is also
- Once it reaches the High level, this state can be maintained for more than one period of the meter pulse S1.

6A is an AND circuit that receives the pulse signal s2 from the comparator 4A and the signal S from the signal level detection circuit 5A, performs an AND operation, and outputs the signal SG. When the voltage level of the meter pulse S1 reaches or exceeds the predetermined value VTH, the signal level detection circuit 5A detects the pulse signal S,2 from the comparator 4A for at least one cycle. It is allowed to pass. 7 is a pulse signal S from the AND circuit 6A.
, the frequency detection circuit detects the frequency and outputs one pulse of the billing pulse signal S7 if the frequency of the pulse signal Ss is 50 Hz.

The operation of the circuit of this embodiment configured as described above will be explained with reference to FIG.

First, when a meter pulse S1, which is an AC signal, is input, the comparator 4A detects the O cross point of this person's meter pulse S, and converts it into a pulse signal S2 having the same frequency as the meter pulse S. Output.

On the other hand, the meter pulse S1 is also input to the signal level detection circuit 5A. In this signal level detection circuit 5A, the meter pulse S1 is half-wave rectified by the diode 8, and the rectified signal S is inputted to the integrating circuit 9. This integrating circuit 9 rises (charges) quickly and falls (discharges) quickly.
The time constant is set so that the rectified signal S
In response to this, charging of the capacitor 90 is started, and once the voltage level of the meter pulse S1 exceeds a predetermined value, the charging voltage level of the capacitor 9c immediately exceeds the predetermined value VT)l, but discharging is performed slowly. .

Therefore, the voltage level of meter pulse S□ is the predetermined value VT)
When reaching and detecting I, the output S from the integrating circuit 9
4 exceeds the predetermined value VTR is maintained for more than one period of the meter pulse S□, and the signal S from the comparator 10,
Once the signal reaches the high level, this state is maintained for more than one period of the meter pulse S1.

While the signal S5 from the comparator 10 is at High level, the AND circuit 6A passes the pulse signal S2 from the comparator 4A and outputs it to the frequency detection circuit 7 as a pulse signal S6.

At this time, it passes through the AND circuit 6A and the frequency detection circuit 7
The period of the pulse signal SG input to is.

A pulse signal S with a constant duty that has exactly the same period as the meter pulse S, and does not depend on the amplitude even if noise is included in the meter pulse S1.

Therefore, the frequency detection circuit 7 obtains the meter pulse S
It is possible to detect the exact frequency of the machine.

If the frequency of the pulse signal SG from the AND circuit 6A is 50Hz, the frequency detection circuit 7 detects the billing pulse signal S7.
Outputs one pulse of .

Here, as shown in FIG. 3, even when low noise with a voltage level below a predetermined value VTH is input from the comparator 4A, a pulse signal S having the frequency of that noise is input.
However, in this embodiment, if the voltage level does not reach the predetermined value VTH, the signal level detection circuit 5A
The output S from the AND circuit 6 does not go to High level, and the pulse signal outputted with low level noise is sent to the AND circuit 6.
Unless the pulse signal 8 is for the meter pulse Si that cannot pass through A, that is, has a voltage level equal to or higher than the predetermined value VTR, it will not be output to the frequency detection circuit 7 side.

Further, as described above, once the voltage level reaches the predetermined value VdH or higher, the signal level detection circuit 5A maintains the detection state for more than one period of the meter pulse S1, and during that time, the pulse signal S2 from the comparator 4A is maintained. is output to the frequency detection circuit 7, so this frequency detection circuit 7 has the following:
At least one period of the pulse signal 52 (SG) is input, and the frequency of the pulse signal S, (Ss), that is, the meter pulse S1 can be reliably detected.

In this way, according to the circuit of this embodiment, the meter pulse S
Even if there is noise in the meter, pulse signals S, S, with a constant duty are output to the frequency detection circuit 7 regardless of the amplitude, making it possible to accurately detect the frequency of the meter pulse S1. .

In addition, although the above-mentioned embodiment describes the case where the AC signal detection circuit of the present invention is used for generating billing pulses, the present invention is not limited to this.

[Effects of the Invention] As detailed above, according to the AC signal detection circuit of the present invention, the waveform shaping circuit converts the AC signal into a rectangular wave signal having the same frequency as the AC signal, and the signal level detection circuit converts the AC signal into a rectangular wave signal having the same frequency as the AC signal.
When a predetermined value or more is detected for the AC signal, that detection state is held for one period or more of the AC signal, and during that detection state, the gate circuit is controlled to pass the rectangular wave signal from the waveform shaping circuit. With an extremely simple configuration, even if noise is added to the AC signal, it can prevent the frequency data from changing due to its amplitude, and it can accurately output a rectangular wave signal that corresponds to the period of the AC signal.

There are advantages in that accurate frequency detection can be performed, and that the frequency detection circuit can be simplified and its reliability can be improved.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the present invention, Fig. 2 is a circuit diagram showing an embodiment of the present invention, Fig. 3 is a timing chart for explaining the operation of this embodiment, and Fig. 4 is a general diagram. FIG. 5 is a circuit diagram showing the configuration of a conventional charging AC signal detection circuit; FIGS. 6 and 7 are timing charts for explaining the operation of the conventional circuit. . 9 is an integrating circuit, 9a and 9b are resistors, 9c is a capacitor, and 10 is a comparator.

Claims (1)

[Claims] A waveform shaping circuit (4, 4A) that converts an alternating current signal into a rectangular wave signal having the same frequency as the alternating current signal; Signal level detection circuit (
5, 5A) and the waveform shaping circuit (5, 5A) by receiving the detection result from the signal level detection circuit (5, 5A) as a gate control signal.
An alternating current signal detection circuit comprising: a gate circuit (6, 6A) for controlling the passage state of the rectangular wave signal from (4, 4A).