JPH0327140U - - Google Patents

Info

Publication number
JPH0327140U
JPH0327140U JP1989086936U JP8693689U JPH0327140U JP H0327140 U JPH0327140 U JP H0327140U JP 1989086936 U JP1989086936 U JP 1989086936U JP 8693689 U JP8693689 U JP 8693689U JP H0327140 U JPH0327140 U JP H0327140U
Authority
JP
Japan
Prior art keywords
pll circuit
memory
communication device
reading
channel setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989086936U
Other languages
Japanese (ja)
Other versions
JPH0737388Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989086936U priority Critical patent/JPH0737388Y2/en
Publication of JPH0327140U publication Critical patent/JPH0327140U/ja
Application granted granted Critical
Publication of JPH0737388Y2 publication Critical patent/JPH0737388Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Transceivers (AREA)
  • Transmitters (AREA)
  • Circuits Of Receivers In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図及び第２図はこの考案に係る通信機器の
チヤンネル設定装置の実施例を示し、第１図はハ
ードウエアのブロツク図、第２図ａは要部のフロ
ーチヤート、第２図ｂはタイムチヤートである。
第３図は従来の実施例を示し、第３図ａはフロー
チヤート、第３図ｂはタイムチヤートである。 主な符号の説明、１…ＰＬＬ回路、９…マイク
ロコンピユータ、１０…メモリ、Ａ…分周比デー
タ、Ｃ…トーンデータ、ｔ１…分周比データの読
み出し時間、ｔ２アンロツク状態の時間、ｔ３…
トーンデータの読み出し時間、Ｔ…チヤンネル設
定時間。 1 and 2 show an embodiment of the channel setting device for communication equipment according to this invention, FIG. 1 is a block diagram of the hardware, FIG. 2a is a flowchart of the main part, and FIG. 2b is a It is a time chart.
FIG. 3 shows a conventional embodiment, with FIG. 3a being a flow chart and FIG. 3b being a time chart. Explanation of main symbols, 1... PLL circuit, 9... Microcomputer, 10... Memory, A... Frequency division ratio data, C... Tone data, t1... Frequency division ratio data read time, t2 Unlocked state time, t3...
Tone data readout time, T...channel setting time.

Claims (1)

【実用新案登録請求の範囲】 ＰＬＬ回路と、このＰＬＬ回路を制御するマイ
クロコンピユータと、データを格納するメモリと
からなり、通信チヤンネルを順次スキヤン可能に
した通信機器において、 前記ＰＬＬ回路がアンロツク状態の間に予めき
められたデータを前記メモリから読み出す読み出
し手段を設けたことを特徴とする通信機器のチヤ
ンネル設定装置。[Claims for Utility Model Registration] A communication device comprising a PLL circuit, a microcomputer for controlling the PLL circuit, and a memory for storing data, and capable of sequentially scanning communication channels, wherein the PLL circuit is in an unlocked state. 1. A channel setting device for a communication device, characterized in that a reading device is provided for reading predetermined data from the memory in between.
JP1989086936U 1989-07-26 1989-07-26 Channel setting device for communication equipment Expired - Lifetime JPH0737388Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989086936U JPH0737388Y2 (en) 1989-07-26 1989-07-26 Channel setting device for communication equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989086936U JPH0737388Y2 (en) 1989-07-26 1989-07-26 Channel setting device for communication equipment

Publications (2)

Publication Number Publication Date
JPH0327140U true JPH0327140U (en) 1991-03-19
JPH0737388Y2 JPH0737388Y2 (en) 1995-08-23

Family

ID=31636579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989086936U Expired - Lifetime JPH0737388Y2 (en) 1989-07-26 1989-07-26 Channel setting device for communication equipment

Country Status (1)

Country Link
JP (1) JPH0737388Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006346167A (en) * 2005-06-16 2006-12-28 Takeya Co Ltd Notification system for gaming machine islands, gaming machine islands and gaming media storage boxes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006346167A (en) * 2005-06-16 2006-12-28 Takeya Co Ltd Notification system for gaming machine islands, gaming machine islands and gaming media storage boxes

Also Published As

Publication number Publication date
JPH0737388Y2 (en) 1995-08-23

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term