JPH03280424A - Wiring formation process - Google Patents

Abstract

PURPOSE:To enhance the process stability and the thermal resistance by a method wherein an insulating film having an opening part is formed on a semiconductor substrate and after forming a barrier metal on the bottom part of the opening part, a high melting point metallic material is non-selectively deposited in the opening part. CONSTITUTION:An element isolating region 2, an n<+>type impurity region 3, a titanium silicide film 4 are successively formed on a p-type silicon substrate 1. Next, an interlayer insulating film 5 comprising silicon oxide film is formed to make an opening part 6. Successively, a titanium nitride film 7 is formed on the impurity region 3 in the opening part 6 and when a titanium nitride film 8 is deposited on the whole surface, a barrier metal layer in sufficient film thickness comprising the titanium films 7, 8 is formed on the bottom part of the opening part 6 so as to secure the sufficient thermal resistance. In such a constitution, a blanket tungsten layer 9 is buried in the opening part 6 by non-selective deposition process so as to enable the high process stability to be secured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a wiring forming method that provides high heat resistance.

[Summary of the invention]

The present invention provides high process stability and good performance by forming a barrier metal layer at the bottom of an opening in an insulating film formed on a semiconductor substrate and then non-selectively growing a high melting point metal material within the opening. The present invention provides a method for forming wiring having excellent heat resistance.

[Conventional technology]

As semiconductor devices become more highly integrated, contact holes are also being miniaturized. Conventional methods for forming electrode wiring in such minute contact holes have been to use an aluminum layer using the Subaruta method or CVD method, but recently, tungsten ( Techniques for depositing high melting point metal materials such as W) are being actively researched. According to this technique, it is possible to embed wiring material into minute contact holes. For this reason, a method using such a high melting point metal material is attracting attention as a wiring formation technology that can support higher integration of semiconductor devices.

When forming a tungsten layer on the contact portion of a base layer made of a silicon layer or the like in this interconnection formation technology using a high-melting point metal material using the vapor phase CVD method, the reaction between the silicon layer and the tungsten layer does not occur at temperatures below 600°C. Since this does not occur, relatively high heat resistance can be obtained.

However, BPSG, which is used for flattening the interlayer insulating film,
Glass reflow of films, etc. is performed at about 900°C. Furthermore, annealing of polysilicon layers used as resistive elements in SRAMs, three-dimensional integrated circuits, etc., activation of impurity regions of thin film transistors (TPT) formed in thin polysilicon layers, etc. are performed at about 1000°C. Therefore,
At these processing temperatures, a reaction occurs between the silicon layer and the tungsten layer, resulting in problems such as destruction of the PN junction.

As a solution to this problem, a technique is known in which a barrier metal layer that functions as a heat-resistant layer is formed in the contact hole. For example, as shown in FIG.
An insulating film 14 is formed on the n-type impurity region 13 on the surface of the p-type silicon substrate II surrounded by the p-type silicon substrate II. This insulating film 14 has an opening 15 above the impurity region 13 . A barrier metal layer 16 made of a tungsten nitride film is provided at the bottom of this opening 15. This barrier metal layer 16 is obtained, for example, by nitriding a tungsten layer formed at the bottom of the opening 15 in an NH atmosphere. A tungsten layer 17 is further selectively grown on this barrier metal layer 16.

In addition, as a method to prevent the reaction between the silicon layer and the tungsten layer, there is a method of converting a diffusion layer made of a silicon layer or the like into titanium silicide, or a method of nitriding only the contact portion of the diffusion layer that has been converted into titanium silicide. A method of forming a titanium nitride film using the same method has also been proposed.

[Problems to be Solved by the Invention] However, in the method shown in Part 2, it is difficult to form the barrier metal layer 16 with sufficient heat resistance because the tungsten layer is difficult to nitride.

In addition, in the method of converting the diffusion layer into titanium silicite,
Since the reaction between the titanium silicide layer and the tungsten layer formed on the titanium silicide layer occurs at approximately 900°C, the
Heat resistance cannot be ensured for heat treatment exceeding 00°C.

Furthermore, the method of nitriding only the contact portion of the titanium silicided diffusion layer has low selectivity of the tungsten layer with respect to the titanium nitride film, and is therefore unsuitable for selectively growing the tungsten layer.

In contrast to this method, as described in Japanese Unexamined Patent Publication No. 64-41241, ions are implanted into the surface of the titanium nitride film to form a titanium nitride film containing a trace amount of silicon. Although attempts have been made to develop a technology that enables the selective growth of a tungsten layer on a nitride film, the reality is that it is extremely difficult to form electrode wiring with high process stability while ensuring good heat resistance. It is.

Therefore, the present invention has been proposed in view of the conventional situation, and an object of the present invention is to provide a wiring forming method having high process stability and good heat resistance.

[Means to solve the problem]

The wiring forming method of the present invention has been proposed to achieve the above-mentioned object.

That is, the present invention is characterized by forming an insulating film having an opening on a semiconductor substrate, forming a barrier metal layer at the bottom of the opening, and then non-selectively growing a high melting point metal material within the opening. do.

The barrier metal layer may be made of a material that does not react with the semiconductor substrate at about 1000'C, such as a tungsten nitride film, a tungsten titanium film, a titanium nitride film, a zirconium nitride film, or the like.

[Function] In the present invention, the absolute &! By providing a barrier metal layer at the bottom of the opening in the film, reaction between the high melting point metal material buried in the opening and the semiconductor substrate is prevented. That is, even if heat treatment is performed at a high temperature, there is no risk of reaction between the semiconductor substrate and the high melting point metal material, so that electrode wiring with excellent thermal properties is formed.

Further, since the high melting point metal material is non-selectively grown within the opening, the selectivity of the high melting point metal material with respect to the barrier metal layer is not a problem, and therefore high process stability can be ensured.

〔Example〕

Preferred embodiments of the present invention will be described with reference to the drawings.

This embodiment is an example in which electrode wiring is formed using a so-called blanket tungsten film.

First, as shown in FIG. 1(a), element isolation regions 2 are formed on a p-type silicon substrate 1 by LOCO5 method or the like. Ion implantation is performed on the silicon substrate 1 surrounded by the element isolation region 2 to form an n-type impurity region 3. The film thickness over the entire surface including the impurity region 3 is approximately 1000 nm.
After depositing the titanium film, about 650
This titanium film is turned into silicide at a relatively low temperature of ℃.

Then, the unreacted titanium film is removed using ammonia water flow, and the titanium film is completely silicided at a relatively high temperature of about 850°C. As a result, titanium silicide W14 is formed on impurity region 3.

Next, as shown in FIG. 1(b), an interlayer insulating film 5 made of a silicon oxide film is formed by CVD or the like. The thickness of this interlayer insulating film 5 is approximately 5000 mm. A photoresist layer is applied on the interlayer insulating film 5, exposed and developed according to the opening pattern of the contact hole 1, and then etched using this photoresist layer to form the interlayer insulating film 5. An opening 6 is formed in the opening 6.

Subsequently, as shown in FIG. 1(c), nitriding is performed by lamp annealing in an ammonia atmosphere. As a result, the titanium silicide film 4 exposed in the opening 6 is nitrided, and a titanium nitride film 7 is formed on the impurity region 3 in the opening 6. Thereby, a barrier metal layer functioning as a heat-resistant layer is provided on impurity region 3. Note that the conditions for this nitriding reaction may be selected as appropriate; in this example, the temperature was set to 90°C.
The temperature was about 0° C. and the processing time was about 10 seconds.

Then, as shown in FIG. 1(d), the entire surface including the top of the titanium nitride film 7 is coated with a film thickness of 1000 mm by reactive sputtering or the like.
A titanium nitride film 8 is deposited on the order of 30%.

At this time, since the titanium nitride film 7 has been formed on the impurity region 3 in advance, the titanium nitride film 7 is formed at the bottom of the opening 6.
．． A barrier metal layer having a sufficient thickness of 8 is formed. Thereby, even when the aspect ratio of the opening 6 is high, a good barrier metal layer is formed on the impurity region 3, so that sufficient heat resistance can be ensured.

Then, a so-called blanket tungsten layer 9 is formed in the opening 6 by the CVD method. This tungsten layer 9 is deposited on the main surface of the interlayer insulating film 5 to a thickness of approximately 3000 nm, sufficiently filling the inside of the opening 6. At this time, since titanium nitride WiB is formed on the inner wall of the opening 6, the adhesion of the tungsten layer 9 is improved. Therefore, good electrode wiring can be formed. Further, since the tungsten layer 9 is buried in the opening 6 by non-selective growth, selectivity with respect to the underlying titanium nitride film 8 is not a problem, and therefore high process stability can be ensured.

Subsequently, the entire surface is etched back using the RIE method to remove the tungsten layer 9 and the titanium nitride film 8 on the glabella insulating film 5, and the wafer surface is planarized.

As a result, as shown in FIG. 1(e), the main surface of the glabellar insulating film 5 is exposed, and the tungsten layer 9 remains within the opening 6. Then, the entire surface was sputtered again to a film thickness of about 3 cm.
After forming the tungsten layer 10 of 1,000 yen, the tungsten layer 10 is patterned by etching by RIE or the like using lithography technology.

Then, a BPSG film is formed on the entire surface including the top of the tungsten layer 10, and heat treatment is performed at about 900° C. for about 20 minutes for reflow. Furthermore, about 3,000 5izN films and polysilicon layers are successively stacked on the BPSG film, and after patterning this thin polysilicon layer, ions such as phosphorus are selectively implanted into the polysilicon layer.

Then, in order to activate the polysilicon layer into which ions have been introduced, heat treatment is performed at about 1000°C for about 20 seconds. Since the titanium nitride film 7.8 is formed on the tungsten layer 9.10, there is no possibility that a reaction will occur between the tungsten layer 9.10 and the impurity region 3. Therefore, an electrode wiring having good heat resistance can be obtained. In addition, the tungsten layer 9
．． Since the reaction between 10 and impurity region 3 is prevented, the PN junction is not destroyed. Thereby, leakage current can be reduced.

In this example, after the tungsten layer 9 was excessively buried in the opening 6, an etch bank was performed to planarize the surface, but the tungsten layer 9 was not etched back as described above. Needless to say, there is no problem in using the formed electrode wiring layer as it is.

[Effects of the Invention] As described above, in the present invention, since a barrier metal layer is formed at the bottom of an opening in an insulating film formed on a semiconductor substrate, a high melting point metal material and a semiconductor buried in the opening are formed. Substrate reactions are prevented.

Therefore, even if heat treatment is performed at a high temperature, there is no risk of the PN junction being destroyed, and high heat resistance can be obtained. Furthermore, since there is no risk of the PN junction being destroyed, leakage current is reduced.

Further, in the present invention, selectivity with respect to the underlying layer is not a problem when embedding the high melting point metal material, so a wiring forming method with high process stability is provided. Further, the present invention can be applied to contact holes having different depths.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1(a) to 1(e) are cross-sectional views for explaining an example of the wiring forming method of the present invention according to its manufacturing process. FIG. 2 is a cross-sectional view showing the structure of an electrode wiring formed by a wiring forming method. 1 ・ ・ 2 ・ ・ 3 ・ ・ 4 ・ ・ 5 ・ ・ 6 ・ ・ 8 9, Silicon substrate, element isolation region, impurity region, titanium silicide film, interlayer insulating film, opening...Titanium nitride film 0...・Tungsten layer

Claims (1)

[Claims] 1. A wiring forming method, comprising forming an insulating film having an opening on a semiconductor substrate, forming a barrier metal layer at the bottom of the opening, and then non-selectively growing a high melting point metal material within the opening.