JPH03280495A - Electronic component mounting structure and method of packaging - Google Patents

Abstract

PURPOSE:To enable chip-like electronic components to be densely mounted on the small area of a multilayered board and to be lessened in packaging height by a method wherein the stacked chip-like electronic components are mounted in a through-hole provided to the multilayered board by insertion. CONSTITUTION:Chip-like electronic components 16 and 17 are inserted into through-holes 11a, 12a, and 13a overlapping each other to be mounted. That is, the through-holes 11a and 12a which are larger than the electronic component 16 located inside and enable the component 17 to be inserted are provided to a first board 11 and a second board 12 respectively. The through-hole 13a which is smaller than the through-holes 11a and 12a and enables the component 17 to be inserted is provided to a third board 13. Furthermore, the electronic component 16 transferred by a film carrier 1 is cut off together with a frame lead 2 from the film carrier 1 and inserted into the through-hole 13a, and the frame lead 2 is outer lead-bonded to a conductor pattern 20 formed on the peripheral part of the through-hole 13a by soldering.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a structure and a mounting method for mounting chip-shaped electronic components on a multilayer board.

(Prior Art) In recent years, with the miniaturization and increase in density of electronic circuits, multilayer substrates formed by laminating a plurality of substrates are often used. Among these, ceramic multilayer substrates are widely used because they allow for higher density when forming conductor patterns. Also,
Multilayer boards are also known in which parts such as resistors and capacitors are built into the laminated layers to achieve higher density mounting of parts.

On the other hand, the shape of the electronic components themselves mounted on the substrate has become smaller, and in semiconductor electronic components, chip-shaped electronic components are mounted on the substrate, and the distance between the electronic components and the conductor pattern formed on the substrate is reduced. Connections are made using wire bonding, allowing for high-density mounting of electronic components.

Furthermore, TAB (Tape Automated
Bonding technology is known. This is the 2nd a
As shown in the figure, a film lead 2 is formed for each frame of a long film carrier 1, a chip-shaped electronic component 3 is bonded to the film lead 2 by inner lead bonding, and the electronic component 3 is automatically transported. Furthermore, as shown in FIG. 2b, when mounting this electronic component 3 on the board 4,
The electronic component 3 including the film lead 2 portion is separated from the film carrier 1, and the film lead 2 is outer lead bonded to the conductor pattern 5 formed on the substrate 4 by soldering. Thereby, the chip-shaped electronic component 3 to which the film lead 2 is connected can be automatically transported as described above. Furthermore, since there is no need to perform wire bonding when mounting on the board 4, chip-shaped electronic components 3 can be stacked and mounted as shown in FIG. 2b, increasing the mounting density of the components. I can do it.

(Problems to be Solved by the Invention) The TAB technique described above has made it possible to mount a large number of chip-shaped electronic components 3 within a small area on the substrate 4. However, since the electronic components 3 are stacked on the board 4, there is a problem in that the component mounting height increases and the overall shape of the electronic circuit cannot be made smaller.

SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide an electronic component mounting structure for a multilayer board that allows high-density mounting of a plurality of chip-shaped electronic components within a small area of the multilayer board and reduces the mounting height of the components. The purpose is to provide an implementation method.

(Means for Solving the Problem) In order to achieve the above object, the present invention is provided in claim 12, claim (1).
Here, we will discuss an electronic component mounting structure of a multilayer board in which a plurality of chip-shaped electronic components are mounted on a multilayer board formed by laminating a plurality of boards on which predetermined conductor patterns are formed, and the mounting position of the electronic components is It has a through hole of a predetermined shape corresponding to the
a plurality of open substrates stacked adjacently so that the through holes correspond to each other, and adjacent to one surface of the stacked open substrates,
at least one closing board that closes one end side of the through hole; a plurality of chip-shaped electronic components that are inserted into the through hole and stacked at predetermined intervals in a stacking direction of the boards;
We propose an electronic component mounting structure on a multilayer board that includes a plurality of film leads that connect each of the plurality of electronic components to a conductor pattern on a predetermined board.

Further, claim (2) provides a method for mounting electronic components on a multilayer board, in which a plurality of chip-shaped electronic components are mounted on a multilayer board formed by laminating a plurality of boards on which predetermined conductor patterns are formed, A through-hole of a predetermined shape is formed in each of the plurality of substrates other than at least one substrate in correspondence with the mounting position of the electronic component, and a through-hole is formed in a predetermined position of each of the substrates; A predetermined conductor pattern is formed on each of the substrates, a plurality of substrates having the through holes formed therein are arranged adjacent to each other, the through holes of the respective substrates are made to correspond to each other, and one end side of the through holes is closed. A multilayer board having a component placement hole consisting of the plurality of through holes is formed by stacking the plurality of substrates adjacent to each other, and then forming a chip-shaped substrate with inner lead bonding to the film lead. Insert the electronic component into the component placement hole, bond the film lead of the electronic component to the corresponding conductor pattern of the board, and then bond the electronic component with the inner lead to the film lead at a predetermined distance. We propose a method for mounting electronic components on a multilayer board, in which other chip-shaped electronic components that have been lead-bonded are placed one on top of the other, and the film leads of the electronic components are outer lead-bonded to the conductor pattern of the corresponding board.

(Function) According to claim (1) of the present invention, a plurality of open substrates are stacked with corresponding through holes, and one end side of the through holes is closed by a closed substrate. Further, a chip-shaped electronic component is inserted into the through hole, and the electronic component is connected to a conductive pattern of a corresponding board via a film lead. Furthermore, other chip-shaped electronic components are superimposed on this electronic component at predetermined intervals in the stacking direction of the substrate, and the electronic component is connected to the conductor pattern of the corresponding substrate via a film lead. Ru. Similarly, a predetermined number of electronic components are inserted into one through hole and connected to the corresponding conductor pattern of the board via the film lead.

According to claim (2), a through hole of a predetermined shape is formed in each of the plurality of substrates corresponding to the mounting position of the electronic component, and a through hole is formed in a predetermined position of each of the plurality of substrates. A predetermined conductor pattern is then formed. Thereafter, the plurality of substrates with through holes are placed adjacent to each other with the through holes corresponding to each other, and at least one substrate without a through hole is placed adjacent to each other so as to close one end side of the through hole. A multilayer substrate is formed by stacking a plurality of these substrates. Thereafter, a chip-shaped electronic component with inner lead bonding to the film lead is inserted into the component placement hole made up of the plurality of through holes, and the film lead of the electronic component is outer lead bonded to the corresponding conductor pattern of the board. . Furthermore, another chip-shaped electronic component is placed on top of this electronic component at a predetermined interval and the inner lead is bonded to the film lead in the same manner as °C1, and the film lead of the electronic component is placed on the outer lead to the corresponding conductor pattern of the board. Bonded.

(Embodiment) FIG. 1a is a side sectional view showing the main part of an embodiment of the present invention.
FIG. 1b is an exploded perspective view showing one embodiment. In the figure, 10 indicates five substrates 11 to 15 made of ceramic material.
It is a multilayer board made by laminating layers. The first layer located on the top layer
The substrate 11, the second substrate 12 and the third substrate 13 adjacent to the lower side of the first substrate 11 each have a predetermined shape corresponding to the mounting position of the chip-shaped electronic components 16 and 17. Through holes 11a, 12a, and 13a are formed.

In this embodiment, these through holes 11a.

Two chip-shaped electronic components 16 and 17 are inserted and mounted in layers 12a and 13a. That is, in each of the first substrate 11 and the second substrate 12, through holes 11a and 12a are formed which are larger than the shape of the electronic component 16 located inside and have a shape into which the electronic component 17 can be inserted. There is.

The third substrate 13 has smaller through holes 11a and 12a (
, and a through hole 13a into which the electronic component 17 can be inserted is formed. These through holes 11a, 12a, and 13a are connected to form a component placement hole 18. In addition, the through holes 11a, 12a of the fourth and fifth substrates 14.15,
No through hole is formed at a position corresponding to 13a, and the lower end side of through hole 13a is closed by these fourth and fifth substrates 14 and 15. Further, in each of the substrates 11 to 15, a plurality of through holes 19 are formed at predetermined positions, and a predetermined conductor pattern 20 is also formed.

Further, electronic components 16 and 17 are mounted on the multilayer board 10 using the TAB technique described above. That is, the electronic component 16 transported by the film carrier 1 shown in FIG. 2a
is separated from the film carrier 1, including the frame lead 2, and inserted into the through hole 13a, and then the frame lead 2 is attached to the outer lead by soldering to the conductor pattern 20 formed at the periphery of the through hole 13a. Bonded. At this time, the inner lead bonding portion between the electronic component 16 and the frame lead 2 is located on the upper side. Furthermore, an epoxy-based protective resin E is applied in advance to the surfaces of the electronic components 16 and 17 and the inner lead bonding portions for insulation. Thereafter, the electronic component 17 is placed on top of the electronic component 16 at a predetermined interval in the same manner as described above, and the frame lead 2 of the electronic component 17 is attached to the conductive pattern 20 formed at the periphery of the through hole 11a. Outer lead bonding is performed.

Next, a method for mounting the electronic components 16 and 17 on the multilayer board 10 in the above-described configuration will be described.

First, predetermined through holes 19 are formed using a mold in each of the first to fifth substrates 11 to 15 made of ceramic before being sintered at high temperature.

At the same time, the above-described through holes 11a, 12a, and 13a are formed in the first to third substrates 11-13. After this, Ag-based paste and A
A predetermined conductor pattern 20 is screen printed using U-paste, and Ag is placed inside each through hole 19.
Fill with paste.

Next, the first to fifth substrates 11 to 15 are stacked and pressure-bonded in the above-described order. Furthermore, after performing the binder removal process, the laminated first to fifth substrates 11 to 15 are heated to a predetermined temperature.
For example, sintering is performed at a temperature of 940°C. Then the first and fifth
Electrodes, resistors, overcoat glass, etc. (not shown) are printed on the surface of the substrate 11.15, dried, and fired to form the multilayer substrate 10. After that, cream solder is printed on the electrodes using a solder screen, parts such as a capacitor (not shown) are mounted, and soldering is performed using a coloring flow device (not shown).

On the other hand, chip-shaped electronic components 16 and 17 are transferred to the film lead 2 of the film carrier 1 by a well-known transfer bump method.
Inner lead honing is carried out. After this, an epoxy-based protective resin E is applied to the surfaces of the electronic components 16 and 17 and the inner lead bonding portions. Next, after electrically testing the electronic components 16 and 17, the through holes 11a
.

The electronic components 16 to be inserted inside the substrates 12a and 13a are separated from the film carrier 1 including the film leads 2, and the separated electronic components 16 are vacuum-suctioned by a conveying device (not shown) to the through-holes of the multilayer substrate 10. 11a,
It is transported to the positions 12a and 13a and inserted into the through hole 13a. Furthermore, the film lead 2 and the conductor pattern 20 formed on the periphery of the through hole 13a are aligned,
Outer lead bonding is performed by soldering.

Next, the electronic component 17 is separated from the film carrier 1 in the same manner as described above, and placed on top of the electronic component 16 at a predetermined interval. Further, the film lead of the electronic component 18 and the conductor pattern 20 formed on the peripheral edge of the through hole 11a are aligned, and outer lead bonding is performed.

Thereafter, a silicone resin (not shown) is applied to the surface of the electronic component 17.

As described above, according to this embodiment, a plurality of chip-shaped electronic components 16 and 17 can be mounted at high density within a small area of a multilayer board. Furthermore, the electronic component 16.1
Since the mounting height of 7 can be reduced compared to the conventional one,
It becomes possible to reduce the size of the entire electronic circuit.

In this embodiment, the multilayer substrate 10 is composed of the first to fifth substrates 11 to 15, but the present invention is not limited to this.

In addition, in this embodiment, two chip-shaped electronic components 16 and 17 are used.
are stacked to form through holes 11a and 12a.

13a and mounted on the multilayer board 10, the same effect can be obtained even if two or more electronic components are stacked and mounted.

Furthermore, in this embodiment, the multilayer substrate 10 is made of ceramic.
, but it goes without saying that it is not limited to this.

(Effects of the Invention) As explained above, according to claim (1) of the present invention, a plurality of chip-shaped electronic components are stacked and inserted and mounted into the through hole formed in the open substrate, so that A plurality of chip-shaped electronic components can be mounted with high density within a small area. Furthermore, since the component mounting height can be reduced, the overall shape of the electronic circuit can be made smaller.

Moreover, according to claim (2), component placement holes can be easily formed in the multilayer board. Furthermore, since the chip-shaped electronic components are connected to the conductor pattern of the multilayer board by the film lead, it is possible to insert and mount a plurality of chip-shaped electronic components into the component placement holes. This makes it possible to mount a plurality of chip-shaped electronic components at high density within a small area of the multilayer board, and also to reduce the component mounting height, making it possible to reduce the size of the entire electronic circuit. It exhibits excellent effects.

[Brief explanation of drawings]

FIG. 1a is a side sectional view showing essential parts of an embodiment of the present invention;
Figure 1b is an exploded perspective view showing one embodiment, Figure 2a is a TA
FIG. 2b, which is a diagram explaining the B technique, is a diagram showing an example of component mounting using the TAB technique. 1... Film carrier, 2... Film lead,
10... Multilayer substrate, 11-15... First to fifth substrate, lla, 12a, 13a... Through hole, 16°1
7... Chip-shaped electronic component, 18... Component placement hole, 1
9... Through hole, 20... Conductor pattern.

Claims (2)

[Claims] (1) An electronic component mounting structure of a multilayer substrate in which a plurality of chip-shaped electronic components are mounted on a multilayer substrate formed by laminating a plurality of substrates on which predetermined conductor patterns are formed, wherein the electronic components are mounted. a plurality of open substrates stacked adjacent to each other so that the through holes have through holes corresponding to the positions; and adjacent to one surface of the stacked open substrates, at least one closed substrate that closes one end side of the through hole; a plurality of chip-shaped electronic components inserted into the through hole and stacked at predetermined intervals in the stacking direction of the substrates; and the plurality of electronic components. A structure for mounting electronic components on a multilayer board, characterized by comprising a plurality of film leads that connect each of the components to a conductor pattern on a predetermined board. (2) A method for mounting electronic components on a multilayer board, in which a plurality of chip-shaped electronic components are mounted on a multilayer board formed by laminating a plurality of boards on which a predetermined conductor pattern is formed, excluding at least one board. A through hole of a predetermined shape is formed in each of the other plurality of substrates corresponding to the mounting position of the electronic component, and a through hole is formed in a predetermined position of each of the substrates, and a through hole is formed in a predetermined position of each of the plurality of substrates. forming a conductor pattern, adjoining a plurality of substrates with the through holes formed therein, making the through holes of each of the substrates correspond to each other, and further forming the through holes so as to close one end side of the through holes. After stacking the plurality of substrates adjacent to each other to form a multilayer substrate having a component placement hole consisting of the plurality of through holes, the chip-shaped electronic component bonded to the inner lead to the film lead is attached to the component. The film lead of the electronic component is inserted into the placement hole and the outer lead is bonded to the conductor pattern of the corresponding board. After that, the electronic component is placed at a predetermined interval and other leads are similarly bonded to the film lead. A method for mounting electronic components on a multilayer board, comprising: stacking chip-shaped electronic components, and bonding the film leads of the electronic components to the conductor patterns of a corresponding board.