JPH03292007A - Operational amplifier circuit - Google Patents

Abstract

PURPOSE:To improve the through-rate remarkably without increase in current consumption by providing 1st and 2nd current amplifier circuits receiving 1st and 2nd outputs of a 1st differential circuit, and whose input versus output relation has a downward concave monotonous increase characteristic. CONSTITUTION:A 1st differential circuit consists of transistors(TRs) Q7, Q8, Q15 and TRs Q5, Q6, Q11 and Q12, Q16, Q17 form respectively 1st and 2nd current amplifier circuits. The output of the current amplifier circuit connects to the common source node of TRs Q10, Q12 to form a 2nd differential circuit and its output is supplied to the output stage of comprising TRs Q18, Q19 via a single end conversion circuit comprising TRs Q9, Q14. The TR Q5 or Q17 of the current amplifier circuit is operated at a triode region, and the resistance value is increased as the input current increases. As a result, the monotonous increasing characteristic downward concave is formed, the through-rate is considerably improved, and when a differential input voltage is small, since the current fed to the 2nd differential circuit is small, the DC gain becomes larger and the current consumption becomes smaller.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an operational amplifier circuit.

[Conventional technology]

Various operational amplifier circuits have been proposed, among which the circuit shown in FIG. 3 is known as a two-stage SEI O operational amplifier circuit. That is, transistor Q! 1? qst
A differential pair consisting of l qts and a transistor Qzs
* A single-ended conversion circuit consisting of Q24,
Transistor Q46? It has an output stage connected to 11I by Q17, and a bias circuit is formed by current source 2 and transistor Q2.

This circuit is known to have a simple configuration and good frequency characteristics.

[Problem to be solved by the invention]

In the conventional operational amplifier described above, in order to increase the slew rate, it is necessary to increase the bias current of the differential circuit, but this increases current consumption and DC%-Il.
This results in a decline in profits.

Furthermore, since the slew rate and frequency characteristics are related to each other, there is a drawback that the degree of freedom in design is reduced.

SUMMARY OF THE INVENTION An object of the present invention is to provide an operational amplifier circuit that can improve the slew rate without increasing current consumption and has a high degree of freedom in design.

[Means to solve the problem]

The arithmetic power increase circuit of the present invention includes first and second current amplification circuits having monotonically increasing characteristics with a downwardly convex input-to-output relationship using the first and second outputs of a tenth differential circuit as inputs. and a 20th differential circuit in which the outputs of the first and second current amplification circuits are connected to a common source node; Each gate input of the 20th differential circuit is connected together and led out to an input terminal.

(Example) Next, the present invention will be explained in detail using the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention. 1st
The operational field width circuit shown in the figure consists of transistors Q, , Q,
t Q, constitutes the first differential circuit, and the transistor Q
5, Qet Qll constitutes a first current amplifying circuit, and transistor Q12 p Qls t Ql7 constitutes a second current amplifying circuit. The outputs of these current #i ring circuits constitute a 20th differential circuit by being connected to the common source/node of transistors Qxo and Q□3, and this output is connected to the single-end node of transistors QseQ□4. Transistor Qia t Ql via the conversion circuit.

is guided to the output stage of

In this configuration, the relationship between the differential input voltage and output current of the first differential circuit will be considered. Here, the transistor Qs or Ql7 of the current amplification circuit operates in a triode region, and its resistance value increases as the input current increases.

As a result, the current amplification circuit has a downwardly convex monotonically increasing characteristic. Therefore, as shown in FIG. 2, the differential input voltage Vin
The relationship between IoutO and the sum of the output currents of the two current amplifier circuits increases rapidly as the absolute value of jVin increases. Therefore, the slew rate is greatly improved, and when the differential input voltage is small, the current supplied to the second differential circuit is small, so the DC gain is large and the current consumption is small.

〔Effect of the invention〕

As explained above, the original F! A can improve the slew rate to a large value without increasing current consumption. Further, since it can be designed separately from the frequency characteristics, there is an effect that the degree of freedom in design is increased.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the relationship between the differential input voltage and output current of the tenth differential circuit shown in FIG. 1, and FIG. FIG. 2 is a circuit diagram showing a conventional example. Q1~Q,? ... Transistor, C1, C, ... Capacity, '1 s I2" ... Constant current source.

Claims (1)

[Claims] first and second current amplification circuits having a monotonically increasing characteristic in which the input-to-output relationship is convex downward with inputs of the first and second outputs of the first differential circuit; and a second differential circuit in which the output of the current amplification circuit is connected to the common source node, and the gate inputs of each of the first and second differential circuits are connected together and led out to the input terminal. An operational amplifier circuit characterized by: