JPH0335533A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Prior Art] A conventional semiconductor device has a structure as shown in FIGS. 3 and 4, in which -1151 is a structure of a high breakdown voltage element called 0MO3 of lateral type, and 1.13 is a semiconductor substrate. ,7
is a second conductivity type high concentration impurity diffusion layer, 6 is a first conductivity type low concentration impurity diffusion layer, 9 is a gate electrode, 12 is a wiring, 1
1 is a protective film, 10 is an interlayer insulating film, 8 is a gate insulating film, 4
respectively indicate a second conductivity type low concentration impurity diffusion layer.

[Problems to be Solved by the Invention] However, in the conventional structure described above, if an attempt is made to increase the withstand voltage, the second conductivity type high concentration impurity diffusion layer (which is not wrapped in the first conductivity type low concentration impurity diffusion layer) from the gate ( It is necessary to design the distance to the drain) to be greater than the thickness of the depletion layer from the high concentration impurity diffusion layer (source) wrapped in the low concentration impurity diffusion layer of the first conductivity type. The problem is that it takes up a large area and is difficult to integrate.

The present invention is intended to solve these problems, and its purpose is to provide a lateral type D that can be highly integrated.
The purpose is to provide MOS.

[Means for Solving the Problems 1] The method for manufacturing a semiconductor device of the present invention includes the following steps: 1) a) forming at least six or more grooves on a semiconductor substrate; and b) filling the grooves with an insulating material. C) forming a low concentration impurity layer of the first conductivity type on one side across the groove; and d) forming an insulator on the side of the low concentration impurity layer of the first conductivity type in the groove with a first conductivity. a step of removing part of the low concentration impurity layer of the mold beyond its depth;

e) forming a gate insulating film on the surface of the semiconductor substrate;

f) embedding a gate electrode in the part of the groove where the insulator has been partially removed; and g) ion-implanting a second conductivity type high concentration impurity diffusion layer using the gate electrode as a mask. characterized by things.

2) The semiconductor substrate is of a second conductivity type.

3) The semiconductor substrate is of a first conductivity type, and the method further includes a step of forming a low concentration impurity of a second conductivity type on the inner surface of the groove after forming the groove.

[Function 1] The semiconductor device formed by the above-described manufacturing method of the present invention can be extremely highly integrated because the distance between the gate and drain can be increased in the semiconductor substrate.

[Example] A detailed explanation will be given below based on an example. 1 and 2 are main process cross-sectional views showing an embodiment of the method for manufacturing a semiconductor device according to the present invention, in which 1 and 13 are semiconductor substrates, 5 is an insulating film, and 7 is a high concentration impurity of the second conductivity type. Diffusion layer, 6 is a low concentration impurity diffusion layer of the first conductivity type, 9 is a gate electrode, 12 is a wiring, 11 is a protective film, IO is an interlayer cotton j, t III, 8 is a gate insulating film, 4 is a second conductive type low concentration impurity diffusion layer,
are shown respectively.

In a normal lateral type DMOS, a high concentration impurity diffusion layer (drain) of the second conductivity type is not wrapped in the low concentration impurity diffusion layer of the first conductivity type, and a low concentration impurity diffusion layer of the first conductivity type is wrapped. A second conductivity type high concentration impurity diffusion layer (source) is present, and a first conductivity type low concentration impurity diffusion layer is used as a channel, and a gate electrode is formed over the channel via a gate insulating film.

In the manufacturing method of this embodiment, the distance from the gate end to the drain is set toward the substrate, making it less susceptible to the spread of the depletion layer from the source.

Therefore, high-density integration is being carried out.

Next, this example will be described in detail in the order of steps. First, as a semiconductor substrate, for example, a P-type silicon substrate as a substrate of the first conductivity type, vertical grooves are formed by reactive ion etching (RIE) using chlorine gas, and N as a low concentration impurity (4) of the second conductivity type is formed. For example, phosphorus is formed in the groove of the mold by ion implantation using a photoresist as a mask.

(FIGS. 1(a) and (b)) The impurities at this time are of course not limited to non-carbon, and there are various impurities including arsenic.

Next, silicon oxide (5), for example, is grown as an insulator by chemical vapor deposition (CVD) and left only in the trench by etching back by RIE.At this time, the insulator is of course limited to silicon oxide. Instead, there are various materials including silicon nitride film and oxynitride. (FIG. 1(C)) Next, P-type, for example, boron, is diffused as a low concentration impurity (6) of the first conductivity type into a region surrounded by an arbitrary groove in which a source is to be formed. (FIG. 1(d)) The impurities at this time are not limited to boron, but include various impurities.

Next, the insulator (5) on the surface of the trench in contact with the source is removed by RIE to a depth slightly greater than the depth of the low concentration impurity (6) of the first conductivity type, and an oxide film ( 5) Form. In this case, the gate insulating film is not limited to an oxide film, and there are various films such as a silicon nitride film, an oxynitride film, and a laminated film of these films. (FIG. 1(e)) Next, a polycrystalline silicon layer is formed as a gate electrode (9) by CVD, and the gate electrode is formed by photoetching. Gate materials are not limited to polycrystalline silicon, but include various metals. (Figure 1(f)
) Then, as a second conductivity type high concentration impurity (7), N type, for example, arsenic is diffused into the source and drain regions by ion implantation. At this time, the impurity is not limited to arsenic, but includes various impurities such as phosphorus. (Figure 1 (g)
) Next, wiring (12) and a protective film (11) are formed to complete the semiconductor device. (Fig. 1 (h)) Here, an N-channel type element is formed by limiting the impurity.
Even if the impurities of the second conductivity type are exchanged, a P-channel type element is formed.

Further, as shown in FIG. 2, when low concentration impurities of the second conductivity type are not formed, it is desirable that the semiconductor substrate be of the second conductivity type, and here the gate electrode is formed by an etch-back technique.

With the above configuration, the distance from the gate to the drain can be increased in the depth direction of the substrate, making it possible to achieve high integration. Grooves also have the effect of separating adjacent elements,
A highly reliable semiconductor device was obtained.

[Effect of the invention 1 As described above, according to the manufacturing method of the present invention, since the depletion layer spreads along the groove, the distance between the gate and drain can be increased in the semiconductor substrate, resulting in extremely high integration. It became possible to Furthermore, the groove has the effect of separating adjacent elements, resulting in a highly reliable semiconductor device.

[Brief explanation of drawings]

FIGS. 1(a) to 1(h) are sectional views showing main steps of an embodiment of the semiconductor device manufacturing apparatus of the present invention. FIGS. 2(a) to 2(g) are sectional views showing main steps of an embodiment of a semiconductor device manufacturing apparatus according to the present invention. 3 and 4 are main sectional views showing a conventional semiconductor device. First conductivity type semiconductor substrate oxide film Photoresist Second conductivity type low concentration impurity diffusion layer Insulating film First conductivity type low concentration impurity diffusion layer Second conductivity type high concentration impurity diffusion layer Gate insulation film Gate electrode interlayer insulation film Protective film wiring second conductivity type semiconductor substrate

Claims (3)

[Claims] (1) a) forming at least one groove on a semiconductor substrate; b) filling the groove with an insulator; and c) adding a low concentration impurity of a first conductivity type to one side across the groove. d) removing a portion of the insulator on the side of the first conductivity type low concentration impurity layer in the groove beyond the depth of the first conductivity type low concentration impurity layer; e. ) forming a gate insulating film on the surface of the semiconductor substrate; f) embedding a gate electrode in a portion of the groove where the insulator is partially removed; and g) using the gate electrode as a mask to form a second conductivity type. 1. A method for manufacturing a semiconductor device, comprising the step of ion-implanting a highly concentrated impurity diffusion layer. (2) The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor substrate is of a second conductivity type. (3) Manufacturing the semiconductor device according to claim 1, wherein the semiconductor substrate is of a first conductivity type, and the method further comprises a step of forming a low concentration impurity of a second conductivity type on the inner surface of the groove after forming the groove. Method.