JPH0344472A - プラズマ薄膜の製造方法 - Google Patents
プラズマ薄膜の製造方法Info
- Publication number
- JPH0344472A JPH0344472A JP17851689A JP17851689A JPH0344472A JP H0344472 A JPH0344472 A JP H0344472A JP 17851689 A JP17851689 A JP 17851689A JP 17851689 A JP17851689 A JP 17851689A JP H0344472 A JPH0344472 A JP H0344472A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- plasma
- semiconductor substrate
- plasma thin
- radio frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010409 thin film Substances 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000010408 film Substances 0.000 claims description 8
- 239000012495 reaction gas Substances 0.000 claims description 8
- 239000007789 gas Substances 0.000 claims description 5
- 230000007423 decrease Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 description 14
- 239000000758 substrate Substances 0.000 description 14
- 230000015572 biosynthetic process Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Landscapes
- Chemical Vapour Deposition (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
【発明の詳細な説明】
[産業上の利用分野1
本発明は、プラズマ薄膜の製造方法に関するものである
。
。
従来、半導体基板上にプラズマ酸化シリコン膜を形成す
る方法は、例えば第3図に示すように表面を絶縁した電
極を平行に配置し、一定温度に保たれた真空容器内に半
導体基板を搬送する。続いて、容器内を真空に引いた後
、チャートによって膜成長に必要な反応ガスを流す、ガ
スの流量と圧力が所定値に達した後、前記電極に高周波
(RF)を印加し、一定時間保持した後、高周波(RF
)を切る。膜形成の終了した半導体基板は真空容器外に
搬出される。
る方法は、例えば第3図に示すように表面を絶縁した電
極を平行に配置し、一定温度に保たれた真空容器内に半
導体基板を搬送する。続いて、容器内を真空に引いた後
、チャートによって膜成長に必要な反応ガスを流す、ガ
スの流量と圧力が所定値に達した後、前記電極に高周波
(RF)を印加し、一定時間保持した後、高周波(RF
)を切る。膜形成の終了した半導体基板は真空容器外に
搬出される。
しかしながら、従来技術では、膜形成終了後高周波(R
F)を急激に切るために印加された電荷の一部が半導体
基板上に残る6通常、下部電極は、半導体基板の支持も
兼ねているので、残った電荷は、半導体基板と電気的に
絶縁され電極間で逃げ場を失い静電気力となって半導体
基板と電極を引きつける。静電気力は酸化シリコン膜の
生成条件によっては大きな力となり、搬送トラブルを引
き起こしていた。
F)を急激に切るために印加された電荷の一部が半導体
基板上に残る6通常、下部電極は、半導体基板の支持も
兼ねているので、残った電荷は、半導体基板と電気的に
絶縁され電極間で逃げ場を失い静電気力となって半導体
基板と電極を引きつける。静電気力は酸化シリコン膜の
生成条件によっては大きな力となり、搬送トラブルを引
き起こしていた。
しかるに本発明は、かかる課題を解決するちのであり、
その目的とするところは、搬送トラブルのない安定した
プラズマ薄膜を提供することである。
その目的とするところは、搬送トラブルのない安定した
プラズマ薄膜を提供することである。
[課題を解決するための手段J
本発明によるプラズマ薄膜の製造方法は、(1)高周波
(RF)を印加したプラズマCVDにより薄膜を形成し
、続いて主反応ガスを遮断し、膜を成長させないガスを
流しながら、高周波(RF)出力を経時的に変化させて
いく。
(RF)を印加したプラズマCVDにより薄膜を形成し
、続いて主反応ガスを遮断し、膜を成長させないガスを
流しながら、高周波(RF)出力を経時的に変化させて
いく。
(2)請求項1記載の変化が100%から徐々に小さく
なっていく。
なっていく。
(3)請求項1記載の変化が100%から一旦零になっ
た後、再度50%以下の値をとりその後零になる。
た後、再度50%以下の値をとりその後零になる。
ことを特徴とする。
以下本発明の実施例における工程を、第1図に示すチャ
ートに基づいて詳細に説明する。
ートに基づいて詳細に説明する。
まず、トランジスタや抵抗等の半導体素子及びアルミニ
ウム配線の形成された半導体基板をプラズマ酸化シリコ
ン膜を形成するために、約400℃に保たれ、絶縁され
た電極が平行に配置された真空容器内に搬送する。この
容器内を一旦真空に引いた後、TEOS [S L (
QCs Hs ) 4] 10□等の反応ガスを流し、
所定の流量、圧力にコントロールした後、13.56M
Hz、400Wの高周波(RF)を印加する。所望の時
間経過した後、主反応ガス(TEOS)を切り、圧力を
下げ、02ガスを流しながら徐々にRF出力を下げてい
く、半導体基板上に蓄積された電荷は、RFの減少と共
に減っていきついには零になり、基板を下部電極から離
そうとして吸着することはなくなる。
ウム配線の形成された半導体基板をプラズマ酸化シリコ
ン膜を形成するために、約400℃に保たれ、絶縁され
た電極が平行に配置された真空容器内に搬送する。この
容器内を一旦真空に引いた後、TEOS [S L (
QCs Hs ) 4] 10□等の反応ガスを流し、
所定の流量、圧力にコントロールした後、13.56M
Hz、400Wの高周波(RF)を印加する。所望の時
間経過した後、主反応ガス(TEOS)を切り、圧力を
下げ、02ガスを流しながら徐々にRF出力を下げてい
く、半導体基板上に蓄積された電荷は、RFの減少と共
に減っていきついには零になり、基板を下部電極から離
そうとして吸着することはなくなる。
または、第2図に示すチャートでは、同様に所望の時間
の経過した後、主反応ガス(TEOS)を切り、02ガ
スのみを流し圧力を下げ、RFを一旦切った後、再度ご
く弱いRFを印加し、切る。半導体基板に蓄積された電
荷は2度目の印加によって02のプラズマ状態を導体と
して電極から逃げ、吸着は起こらない。
の経過した後、主反応ガス(TEOS)を切り、02ガ
スのみを流し圧力を下げ、RFを一旦切った後、再度ご
く弱いRFを印加し、切る。半導体基板に蓄積された電
荷は2度目の印加によって02のプラズマ状態を導体と
して電極から逃げ、吸着は起こらない。
[発明の効果]
以上の如く本発明によれば、プラズマによる成膜時に起
こる電極と半導1体基板の吸着をなくすことができ半導
体基板上に安定した薄膜を形成することが出来る。
こる電極と半導1体基板の吸着をなくすことができ半導
体基板上に安定した薄膜を形成することが出来る。
第1図及び第2図は、本発明の一実施例によるプラズマ
薄膜形成時のRF出力、主反応ガス及び酸素の流量を示
すチャートである。 第3図は、プラズマ薄膜の形成装置の概略図である。 第4図は、従来のプラズマ薄膜形成時のRF出力、主反
応ガス及び酸素の流量を示すチャートである。 1 2 3 4 5 ・RF発信器 ・上部電極 ・下部電極 ・真空容器 ・半導体基板
薄膜形成時のRF出力、主反応ガス及び酸素の流量を示
すチャートである。 第3図は、プラズマ薄膜の形成装置の概略図である。 第4図は、従来のプラズマ薄膜形成時のRF出力、主反
応ガス及び酸素の流量を示すチャートである。 1 2 3 4 5 ・RF発信器 ・上部電極 ・下部電極 ・真空容器 ・半導体基板
Claims (3)
- (1)高周波(RF)を印加したプラズマCVDにより
薄膜を形成し、続いて主反応ガスを遮断し、膜を成長さ
せないガスを流しながら、高周波(RF)出力を経時的
に変化させていくことを特徴とするプラズマ薄膜の製造
方法。 - (2)請求項1記載の変化が100%から徐々に小さく
なっていくことを特徴とするプラズマ薄膜の製造方法。 - (3)請求項1記載の変化が100%から一旦零になっ
た後、再度50%以下の値をとりその後零になることを
特徴とするプラズマ薄膜の製造方法。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17851689A JP2890494B2 (ja) | 1989-07-11 | 1989-07-11 | プラズマ薄膜の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17851689A JP2890494B2 (ja) | 1989-07-11 | 1989-07-11 | プラズマ薄膜の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0344472A true JPH0344472A (ja) | 1991-02-26 |
| JP2890494B2 JP2890494B2 (ja) | 1999-05-17 |
Family
ID=16049840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17851689A Expired - Lifetime JP2890494B2 (ja) | 1989-07-11 | 1989-07-11 | プラズマ薄膜の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2890494B2 (ja) |
Cited By (374)
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|---|---|---|---|---|
| JPH0684888A (ja) * | 1992-02-27 | 1994-03-25 | G T C:Kk | 絶縁膜の形成方法 |
| US5637190A (en) * | 1995-09-15 | 1997-06-10 | Vanguard International Semiconductor Corporation | Plasma purge method for plasma process particle control |
| US6368977B1 (en) | 1999-06-30 | 2002-04-09 | Kabushiki Kaisha Toshiba | Semiconductor device manufacturing method |
| JP2002176047A (ja) * | 2000-09-26 | 2002-06-21 | Applied Materials Inc | プラズマ誘発損傷を減少させる方法 |
| US6524955B2 (en) | 2000-03-27 | 2003-02-25 | Asm Japan K.K. | Method of forming thin film onto semiconductor substrate |
| JP2007077513A (ja) * | 2006-12-11 | 2007-03-29 | Semiconductor Energy Lab Co Ltd | 成膜方法及び薄膜トランジスタの作製方法 |
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