JPH034593A - Thin film substrate - Google Patents

Thin film substrate

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Publication number
JPH034593A
JPH034593A JP13983989A JP13983989A JPH034593A JP H034593 A JPH034593 A JP H034593A JP 13983989 A JP13983989 A JP 13983989A JP 13983989 A JP13983989 A JP 13983989A JP H034593 A JPH034593 A JP H034593A
Authority
JP
Japan
Prior art keywords
layer
conductor
insulating layer
conductor layer
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13983989A
Other languages
Japanese (ja)
Inventor
Kiyokazu Moriizumi
清和 森泉
Makio Okabe
真紀男 岡部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13983989A priority Critical patent/JPH034593A/en
Publication of JPH034593A publication Critical patent/JPH034593A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the signal propanation speed of a thin film substrate of this design by a method wherein the surface of a conductive layer is made exposed to air as much as possible so as to lessen the conductor layer in dielectric constant. CONSTITUTION:An insulating layer 5 interposed between conductor layers 2 and 3 is etched using the conductor layer 3 as a mask so as to make the surfaces 2A and 3A of the conductor layers 2 and 3 exposed to air. Moreover, an insulating layer 6 interposed between the conductor layers 3 and 4 is etched through the conductor layer 4 as a mask. The insulating layer 5 and the conductive layer 3 are formed into the same shape with the insulating layer 6 and the conductive layer 4. By this constitution, the surfaces of the conductor layers 2, 3, and 4 are all exposed to air excluding their intersected part, and the conductor layers 2 and 3 are not covered with the insulating layers 5 and 6, so that the conductor layers 2 and 3 can be reduced in dielectric constant and a signal propagation speed is improved.

Description

【発明の詳細な説明】 〔概要〕 セラミック材より成るベースに絶縁層を介して複数の導
体層が積層される薄膜基板に関し、極力、導体層の表面
を空気中に露出させ、誘電率を・低くすることで導体層
における信号伝播速度の向上を図ることを目的とし、 第1と第2の導体層の表面が空気中に露出されるが如く
、該第1と第2の導体層との間に介在する第1の絶縁層
が該第2の導体層をマスクとして、該第2と第3の導体
層との間に介在する第2の絶縁層が該第3の導体層をマ
スクとしてそれぞれエツチングされることで除去され、
該第1の絶縁層と、該第2の導体層との形状および該第
2の絶縁層と、該第3の導体層との形状がそれぞれ同じ
に形成されるように構成する。
[Detailed Description of the Invention] [Summary] Regarding a thin film substrate in which a plurality of conductor layers are laminated on a base made of a ceramic material via an insulating layer, the surface of the conductor layer is exposed to the air as much as possible to reduce the dielectric constant. The purpose of this is to improve the signal propagation speed in the conductor layer by lowering the conductor layer. A first insulating layer interposed therebetween uses the second conductive layer as a mask, and a second insulating layer interposed between the second and third conductive layers uses the third conductive layer as a mask. Each is removed by etching,
The first insulating layer and the second conductor layer are configured to have the same shape, and the second insulating layer and the third conductor layer have the same shape.

〔産業上の利用分野〕[Industrial application field]

本発明はセラミック材より成るベースに絶縁層を介して
複数の導体層が積層される薄膜基板に関する。
The present invention relates to a thin film substrate in which a plurality of conductor layers are laminated on a base made of a ceramic material with an insulating layer interposed therebetween.

近年、電子計算機の高速化、高機能化の推進に伴い、こ
れらの構成に用いられる回路基板の高密度化が強く要求
されるようになった。
In recent years, as electronic computers have become faster and more sophisticated, there has been a strong demand for higher density circuit boards used in these configurations.

したがって、このような回路基板としては薄膜によるパ
ターン形成が行われ、パターンの層間を絶縁体により絶
縁することで多層化した高密度の薄膜基板が使用されて
いる。
Therefore, for such circuit boards, patterns are formed using thin films, and high-density thin film boards are used in which layers of the pattern are insulated by insulating layers to form a multilayer structure.

〔従来の技術〕[Conventional technology]

従来は第4図の従来の斜視図に示すように構成されてい
た。
Conventionally, the structure was as shown in the conventional perspective view of FIG.

第4図に示すように、セラミ・レフ材より成るベースl
の表面1Aに導電材の金属をスパッタまたは蒸着によっ
て形成される薄膜の第1の導体層2を張架し、ポリイミ
ド樹脂材などの有機絶縁材による第1の絶縁層10を介
在することで第1の導体層2に交差するように第1の導
体層2と同様の薄膜による第2の導体層3が張架され、
更に、同様の有機絶縁材による第2の絶縁層11を介在
することで第2の導体層3に交差するように第1の導体
層2と同様の薄膜による第3の導体層4が張架されるよ
うに構成されている。
As shown in Figure 4, the base l is made of ceramic reflex material.
A first conductive layer 2 of a thin film formed by sputtering or vapor deposition of a metal as a conductive material is stretched over the surface 1A of the conductive material, and a first insulating layer 10 of an organic insulating material such as a polyimide resin material is interposed. A second conductor layer 3 made of a thin film similar to the first conductor layer 2 is stretched across the first conductor layer 2,
Furthermore, a third conductor layer 4 made of a thin film similar to that of the first conductor layer 2 is stretched across the second conductor layer 3 by interposing a second insulating layer 11 made of a similar organic insulating material. is configured to be

したがって、第1と第2と第3の導体層2.3.4をそ
れぞれ第1と第2の絶縁層10.11を介することで積
層し、ベース1に多層のパターンを形成することが行わ
れていた。
Therefore, it is possible to form a multilayer pattern on the base 1 by laminating the first, second, and third conductor layers 2.3.4 via the first and second insulating layers 10.11, respectively. I was worried.

また、このような積層は第5図の(a)〜(e)の従来
の製造工程図に示す工程によって製造が行われていた。
Further, such lamination has been manufactured by the steps shown in the conventional manufacturing process diagrams of FIGS. 5(a) to 5(e).

第5図の(a)に示すように、ベース1の表面1Aに第
1の導体層2を積層し、(b)に示すように、第1の導
体層2を覆うように、第1の絶縁層10の積層を行う。
As shown in FIG. 5(a), the first conductor layer 2 is laminated on the surface 1A of the base 1, and as shown in FIG. The insulating layer 10 is laminated.

次に、(c)に示すように、第1の絶縁層10の上層1
0Aに第2の導体層3を積層し、(d)に示すように、
第2の導体層3を覆うように、第2の絶縁層11の積層
を行い、最後に、第2の絶縁層11の上層11Aに第3
の導体順番を積層することで製造が行われていた。
Next, as shown in (c), the upper layer 1 of the first insulating layer 10 is
The second conductor layer 3 is laminated on 0A, and as shown in (d),
The second insulating layer 11 is laminated so as to cover the second conductor layer 3, and finally, a third
Manufacturing was carried out by laminating conductors in this order.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このような第1と第2の絶縁層io、tt としては、
通常、セラミック材などの無機絶縁材またはポリイミド
樹脂材などの有機絶縁材が用いられている。
Such first and second insulating layers io, tt are as follows:
Usually, an inorganic insulating material such as a ceramic material or an organic insulating material such as a polyimide resin material is used.

無機絶縁材を用いた場合は、絶縁体として低熱抵抗であ
り、導体層との密着強度が強(、かつ、物理的強度が大
きいが、比誘電率が高いため、信号伝播速度が遅くなる
欠点がある。
When an inorganic insulating material is used, it has low thermal resistance as an insulator, has strong adhesion strength with the conductor layer (and has high physical strength, but has the disadvantage that the signal propagation speed is slow due to its high dielectric constant) There is.

一方、有機絶縁材を用いた場合は、低熱抵抗物理的強度
などの点では無機絶縁材より劣るが、比誘電率が低いた
め、信号伝播速度が緩和され、高速化に関して有利とな
る。
On the other hand, when an organic insulating material is used, it is inferior to an inorganic insulating material in terms of low thermal resistance and physical strength, but because of its low dielectric constant, the signal propagation speed is moderated, and it is advantageous in terms of speeding up.

しかし、最近の電子計算機の高速度化の厳しい要求では
、有機絶縁材による絶縁でも信号伝播速度の遅れが無視
できない状況にある。
However, with the recent strict demands for higher speeds in electronic computers, the delay in signal propagation speed cannot be ignored even with insulation using organic insulating materials.

したがって、有機絶縁材による絶縁が用いられていでも
、パターンを形成する導電層に対する誘電率を低下させ
、より信号伝播速度の向上が図れることが要求されてい
る。
Therefore, even if insulation using an organic insulating material is used, it is required to lower the dielectric constant of the conductive layer forming the pattern and further improve the signal propagation speed.

そこで、本発明では、極力、導体層の表面を空気中に露
出させ、導体層に対する誘電率を低くすることで信号伝
播速度の向上を図ることを目的とする。
Therefore, the present invention aims to improve the signal propagation speed by exposing the surface of the conductor layer to the air as much as possible and lowering the dielectric constant of the conductor layer.

(課題を解決するための手段〕 第1図は本発明の原理説明図である。(Means for solving problems) FIG. 1 is a diagram explaining the principle of the present invention.

第1図に示すように、第1と第2の導体層2.3の表面
2A、3Aが空気中に露出されるが如く、該第1と第2
の導体層(2,3)との間に介在する第1の絶縁層5が
該第2の導体層3をマスクとして、該第2と第3の導体
層3.4との間に介在する第2の絶縁層6が該第3の導
体層4をマスクとしてそれぞれエツチングされることで
除去され、該第1の絶縁層5と、該第2の導体層3との
形状および該第2の絶縁層6と、該第3の導体層4との
形状がそれぞれ同じに形成されるように構成する。
As shown in FIG. 1, the surfaces 2A and 3A of the first and second conductor layers 2.3 are exposed to the air.
A first insulating layer 5 is interposed between the second and third conductor layers 3.4 using the second conductor layer 3 as a mask. The second insulating layer 6 is removed by etching using the third conductive layer 4 as a mask, and the shapes of the first insulating layer 5 and the second conductive layer 3 and the second The insulating layer 6 and the third conductor layer 4 are configured to have the same shape.

二のように構成することによって前述の課題は解決され
る。
The above-mentioned problem is solved by the configuration as described in 2.

〔作用〕[Effect]

即ち、第1の導体層2に交差されるように、第1の絶縁
層5を介在することで張架される第2の導体層3をマス
クにすることで、第1の絶縁層5をエツチングにより除
去し、第1の導体層2を空気中に露出させることが行え
、また、第2の導体層3に交差されるように、第2の絶
縁層6を介在することで張架される第3の導体層4をマ
スクにすることで、第2の絶縁層6をエツチングにより
除去し、第2の導体層3を空気中に露出させることが行
えるようにしたものである。
That is, by using the second conductor layer 3 stretched across the first conductor layer 2 with the first insulating layer 5 interposed therebetween as a mask, the first insulating layer 5 is The first conductor layer 2 can be removed by etching and exposed in the air, and the second conductor layer 2 can be stretched by interposing the second insulating layer 6 so as to cross the second conductor layer 3. By using the third conductor layer 4 as a mask, the second insulating layer 6 can be removed by etching and the second conductor layer 3 can be exposed to the air.

したがって、第1と第2と第3の導体層2.3.4のそ
れぞれの表面は交差個所を除いて空気中に露出されるこ
とになり、従来のような、第1と第2の導体層2.3が
第1と第2の絶縁層10.11によって覆われる構成に
比較して、第1と第2の導体層2.3に対する誘電率を
低下させることができ、信号伝播速度の向上が図れる。
Therefore, the surfaces of each of the first, second and third conductor layers 2.3.4 are exposed to the air except for the intersection points, and the surfaces of the first and second conductor layers 2.3.4 are exposed to the air, unlike the conventional Compared to the configuration in which the layer 2.3 is covered by the first and second insulating layers 10.11, the dielectric constant for the first and second conductive layers 2.3 can be lowered and the signal propagation speed can be increased. Improvements can be made.

〔実施例〕〔Example〕

以下本発明を第2図および第3図を参考に詳細に説明す
る。第2図は本発明による一実施例の斜視図、第3図の
(a)〜軸)は本発明の製造工程図である。企図を通じ
て、同一符号は同一対象物を示す。
The present invention will be explained in detail below with reference to FIGS. 2 and 3. FIG. 2 is a perspective view of an embodiment according to the present invention, and FIG. 3 (a) to axis) are manufacturing process diagrams of the present invention. Like numbers refer to like objects throughout the design.

第2図に示すように、セラミック材より成るベースの表
面1Aに張架された第1の導体層2には、第1の絶縁層
5を介して交差されるように第2の導体層3が張架され
、更に、第2の導体層3には第2の絶縁層6を介して交
差されるように第3の導体層4が張架され、第1の絶縁
層5の形状が第2の導体層3の形状と同じに、また、第
2の絶縁層6の形状が第3の導体層4と同じにそれぞれ
形成されるように構成したものである。
As shown in FIG. 2, a first conductor layer 2 stretched over the surface 1A of the base made of a ceramic material has a second conductor layer 3 intersecting with the first insulating layer 5. Further, a third conductor layer 4 is stretched across the second conductor layer 3 with a second insulating layer 6 interposed therebetween, and the shape of the first insulating layer 5 is The configuration is such that the second insulating layer 6 has the same shape as the second conductor layer 3, and the second insulating layer 6 has the same shape as the third conductor layer 4.

そこで、第1の導体層2は第2の導体層3と交差する個
所を除いて表面2Aが空気中に露出され、また、第2の
導体層3は第3の導体層4と交差する個所を除いて表面
3Aが空気中に露出されるように形成されている。
Therefore, the surface 2A of the first conductor layer 2 is exposed to the air except for the portions where it intersects with the second conductor layer 3, and the surface 2A of the second conductor layer 3 is exposed to the air at the portions where it intersects with the third conductor layer 4. The surface 3A is exposed to the air except for the surface 3A.

したがって、第1と第2の導体層2.3は第1と第2の
絶縁層5.6によって覆われることがないため、第1と
第2の導体層2.3に於ける誘電率を低下させることが
できる。
Therefore, since the first and second conductive layers 2.3 are not covered by the first and second insulating layers 5.6, the dielectric constants of the first and second conductive layers 2.3 are can be lowered.

また、このような積層は第3図に示す製造工程によって
容易に行うことができる。
Moreover, such lamination can be easily performed by the manufacturing process shown in FIG.

第2図の(a)に示すように、ベースlの表面1Aに第
1の導体層2を形成し、(b)に示すように、第1の導
体層2を覆うように第1の絶、像層5の積層を行う。
As shown in FIG. 2(a), a first conductive layer 2 is formed on the surface 1A of the base l, and as shown in FIG. 2(b), a first insulating layer is formed to cover the first conductive layer 2. , the image layer 5 is laminated.

この場合の第1の絶縁層5の積層は、例えば、ポリイミ
ド樹脂の溶液を所定の膜厚に塗布、硬化させることで行
われる。
In this case, the first insulating layer 5 is laminated by, for example, applying a polyimide resin solution to a predetermined thickness and curing it.

次に、(c)に示すように、第1の絶縁層5の上層5A
に第2の導体層3の形成を行い、(d)に示すように第
2の導体層3をマスクとしてウェットエツチングまたは
ドライエツチングによって第1の絶縁層5の除去を行い
、第2の導体層3が張架された真下にのみ第1の絶縁層
5が残るようにする。
Next, as shown in (c), the upper layer 5A of the first insulating layer 5 is
A second conductor layer 3 is formed, and as shown in (d), the first insulating layer 5 is removed by wet etching or dry etching using the second conductor layer 3 as a mask. The first insulating layer 5 is made to remain only directly below where the first insulating layer 3 is stretched.

更に、(e)に示すように、全体を覆うように第2の絶
縁層6の積層を前述の第1の絶縁層5の積層と同様に行
い、第2の絶縁層6の積層された上層6Aには(f)に
示すように、第3の導体層4を形成し、前述の第1の絶
縁層5の除去と同様の要領によって第3の導体層4をマ
スクにして第2の絶縁層6の除去を行うことで(g)に
示すように、第3の導体層4が張架された真下にのみ第
2の絶縁層6が残るように形成することができる。
Furthermore, as shown in (e), the second insulating layer 6 is laminated to cover the entire surface in the same manner as the first insulating layer 5 described above, and the upper layer of the second insulating layer 6 is laminated. 6A, as shown in (f), a third conductive layer 4 is formed, and the second insulating layer is removed using the third conductive layer 4 as a mask in the same manner as the removal of the first insulating layer 5 described above. By removing the layer 6, the second insulating layer 6 can be formed so as to remain only directly under the stretched third conductor layer 4, as shown in (g).

このように形成するとベースlの表面1Aに積層される
第1.第2および第3の導体層2.3.4の全ての表面
2A、3A、4Aは空気中に露出されることになり、従
来のような導体層の全てが絶縁層に埋設されるのと比較
して導体層に対する誘電率が低くなることは明らかであ
る。
When formed in this way, the first layer is laminated on the surface 1A of the base l. All surfaces 2A, 3A, 4A of the second and third conductor layers 2.3.4 will be exposed to the air, unlike conventional conductor layers that are all buried in an insulating layer. It is clear that the dielectric constant for the conductor layer is lower in comparison.

したがって、それぞれの導体層に於ける信号伝播速度を
アップさせることが行える。
Therefore, the signal propagation speed in each conductor layer can be increased.

尚、本発明では第1.第2および第3の導体層2.3.
4を積層することで説明を行ったが、同様の積層により
第3の導体層4の上層に、更に第3と第4の絶縁層を介
在されせることで第4と第5の導体層を積層するように
形成した場合でも同様に構成することが可能であり、こ
のように構成した場合でも同等の効果を得ることができ
る。
In addition, in the present invention, the first. Second and third conductor layers 2.3.
Although the explanation was given by laminating 4, the fourth and fifth conductor layers can be formed by further interposing the third and fourth insulating layers on top of the third conductor layer 4 through similar lamination. A similar structure can be achieved even when formed in a laminated manner, and even in this case, the same effect can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、導体層間に積層
される絶縁層を上層の導体層をマスクとして除去するこ
とで所定の導体層の表面を空気中に露出させるように形
成することができる。
As explained above, according to the present invention, an insulating layer stacked between conductor layers can be removed using the upper conductor layer as a mask, thereby exposing the surface of a predetermined conductor layer to the air. can.

したがって、導体層に於ける誘電率を低(し、信号伝播
速度の向上が図れ、特に、高速化が要求される電子計算
機に於いて、実用的効果は大である。
Therefore, it is possible to lower the dielectric constant of the conductor layer and improve the signal propagation speed, which has a great practical effect, especially in electronic computers that require high speed.

第4図は従来の斜視図。FIG. 4 is a conventional perspective view.

第5図の(a)〜(e)は従来の製造工程図を示す。FIGS. 5(a) to 5(e) show conventional manufacturing process diagrams.

図において、 ■はベース、      2は第1の導体層。In the figure, ■ is the base, 2 is the first conductor layer.

3は第2の導体層、  4は第3の導体層。3 is the second conductor layer, 4 is the third conductor layer.

5は第1の絶縁層、  6は第2の絶縁層。5 is a first insulating layer, and 6 is a second insulating layer.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の原理説明図。 第2図は本発明による一実施例の斜視図。 第3図の(a)〜(g)は本発明の製造工程図。 4第3の′4俸贋 g!Ij1  図 第 2 ■ (3) 杢−8月の製ミニ程図 6第2の矩恨警 従来の剖惺図 第 4 (¥l FIG. 1 is a diagram explaining the principle of the present invention. FIG. 2 is a perspective view of an embodiment according to the present invention. FIGS. 3(a) to 3(g) are manufacturing process diagrams of the present invention. 4 3rd '4 Salary Counterfeit g! Ij1 Diagram Part 2 ■ (3) Heather – August’s mini production schedule 6 Second grudge police Traditional autopsy map No. 4 (¥l

Claims (1)

【特許請求の範囲】  セラミック材より成るベース(1)の表面(1A)に
張架された第1の導体層(2)と、該第1の導体層(2
)に積層された第1の絶縁層(5)を介在して該第1の
導体層(2)に交差するよう張架される第2の導体層(
3)と、該第2の導体層(3)に積層された第2の絶縁
層(6)を介在して該第2の導体層(3)に交差するよ
う張架される第3の導体層(4)とを備えた薄膜基板で
あって、 前記第1と第2の導体層(2,3)の表面(2A,3A
)が空気中に露出されるが如く、前記第1の絶縁層(5
)が前記第2の導体層(3)をマスクとして、前記第2
の絶縁層(6)が前記第3の導体層(4)をマスクとし
てそれぞれエッチングされることで除去され、該第1の
絶縁層(5)と、該第2の導体層(3)との形状および
該第2の絶縁層(6)と、該第3の導体層(4)との形
状がそれぞれ同じに形成されることを特徴とする薄膜基
板。
[Claims] A first conductor layer (2) stretched over the surface (1A) of a base (1) made of a ceramic material;
) A second conductor layer (
3) and a third conductor stretched across the second conductor layer (3) with a second insulating layer (6) laminated on the second conductor layer (3) interposed therebetween. A thin film substrate comprising a layer (4), the surfaces (2A, 3A) of the first and second conductor layers (2, 3)
) of the first insulating layer (5) is exposed to the air.
) uses the second conductor layer (3) as a mask to conduct the second conductor layer (3) as a mask.
The insulating layer (6) is removed by etching using the third conductive layer (4) as a mask, and the first insulating layer (5) and the second conductive layer (3) are removed. A thin film substrate characterized in that the shape and the shapes of the second insulating layer (6) and the third conductor layer (4) are formed to be the same.
JP13983989A 1989-06-01 1989-06-01 Thin film substrate Pending JPH034593A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13983989A JPH034593A (en) 1989-06-01 1989-06-01 Thin film substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13983989A JPH034593A (en) 1989-06-01 1989-06-01 Thin film substrate

Publications (1)

Publication Number Publication Date
JPH034593A true JPH034593A (en) 1991-01-10

Family

ID=15254708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13983989A Pending JPH034593A (en) 1989-06-01 1989-06-01 Thin film substrate

Country Status (1)

Country Link
JP (1) JPH034593A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008105677A (en) * 2006-10-23 2008-05-08 Fujifilm Corp Cassette storage case

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008105677A (en) * 2006-10-23 2008-05-08 Fujifilm Corp Cassette storage case

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