JPH0349632U - - Google Patents

Info

Publication number
JPH0349632U
JPH0349632U JP10947689U JP10947689U JPH0349632U JP H0349632 U JPH0349632 U JP H0349632U JP 10947689 U JP10947689 U JP 10947689U JP 10947689 U JP10947689 U JP 10947689U JP H0349632 U JPH0349632 U JP H0349632U
Authority
JP
Japan
Prior art keywords
converter
output
waveform generator
waveform
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10947689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10947689U priority Critical patent/JPH0349632U/ja
Publication of JPH0349632U publication Critical patent/JPH0349632U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例のブロツク図、第2
図は第1図の動作を説明するタイミングチヤート
、第3図は従来の装置のブロツク図、第4図は波
形データ及び合成波形の説明図、第5図は第3図
の動作を説明するタイミングチヤートである。 1,2……波形メモリ、4,5……D/A変換
器、6,7,9……アンプ、8……加算器、10
……演算制御部(CPU)、11……のこぎり波
発生回路、12……アツテネータ、13……出力
調整部、14……ゲート入力信号制御回路。
Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is a timing chart explaining the operation of Fig. 1, Fig. 3 is a block diagram of a conventional device, Fig. 4 is an explanatory diagram of waveform data and composite waveform, and Fig. 5 is a timing chart explaining the operation of Fig. 3. It's a chat. 1, 2... Waveform memory, 4, 5... D/A converter, 6, 7, 9... Amplifier, 8... Adder, 10
... Arithmetic control unit (CPU), 11 ... Sawtooth wave generation circuit, 12 ... Attenuator, 13 ... Output adjustment section, 14 ... Gate input signal control circuit.

Claims (1)

【実用新案登録請求の範囲】 波形データを波形メモリからD/A変換器に読
み出しアナログ信号に変換して出力する任意波形
発生器において、 前記D/A変換器の出力系統にゲート入力信号
の時間幅に従つて出力振幅を調整する出力調整部
を設けたことを特徴とする任意波形発生器。
[Claims for Utility Model Registration] In an arbitrary waveform generator that reads waveform data from a waveform memory to a D/A converter, converts it into an analog signal, and outputs it, the output system of the D/A converter is provided with a time signal of a gate input signal. An arbitrary waveform generator comprising an output adjustment section that adjusts the output amplitude according to the width.
JP10947689U 1989-09-19 1989-09-19 Pending JPH0349632U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10947689U JPH0349632U (en) 1989-09-19 1989-09-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10947689U JPH0349632U (en) 1989-09-19 1989-09-19

Publications (1)

Publication Number Publication Date
JPH0349632U true JPH0349632U (en) 1991-05-15

Family

ID=31658072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10947689U Pending JPH0349632U (en) 1989-09-19 1989-09-19

Country Status (1)

Country Link
JP (1) JPH0349632U (en)

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