JPH0356224U - - Google Patents
Info
- Publication number
- JPH0356224U JPH0356224U JP11602689U JP11602689U JPH0356224U JP H0356224 U JPH0356224 U JP H0356224U JP 11602689 U JP11602689 U JP 11602689U JP 11602689 U JP11602689 U JP 11602689U JP H0356224 U JPH0356224 U JP H0356224U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- control signal
- pulse signal
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Control Of Direct Current Motors (AREA)
- Pulse Circuits (AREA)
Description
第１図は本考案の一実施例のブロツク図、第２
図は本考案の一実施例の動作を説明するためのブ
ロツク図、第３図は従来の一例のブロツク図であ
る。
１……プツシユスイツチ、７……出力制御回路
、１０……極性制御回路、１１……タイマ回路。
Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is a block diagram for explaining the operation of an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional example. 1... Push switch, 7... Output control circuit, 10... Polarity control circuit, 11... Timer circuit.
Claims (1)
にスイツチ入力毎に順次供給するパルス信号供給
回路において、 前記スイツチ入力毎に一定パルス幅のパルス信
号を生成するタイマ回路と、 前記スイツチ入力毎に異なるパターンの制御信
号を生成する制御信号生成回路と、 前記タイマ回路の出力パルス信号及び前記制御
信号生成回路の制御信号が入力され、前記タイマ
回路の出力パルス信号を前記制御信号生成回路の
制御信号に応じて前記複数の系統の回路のどれか
一つに供給する出力制御回路とを具備してなるパ
ルス信号供給回路。[Claims for Utility Model Registration] In a pulse signal supply circuit that sequentially supplies a pulse signal with a constant pulse width to a plurality of circuits for each switch input, a timer circuit that generates a pulse signal with a constant pulse width for each switch input. and a control signal generation circuit that generates a control signal of a different pattern for each input of the switch; an output pulse signal of the timer circuit and a control signal of the control signal generation circuit are input, and the output pulse signal of the timer circuit is converted into the output pulse signal of the timer circuit. A pulse signal supply circuit comprising: an output control circuit that supplies one of the plurality of circuits according to a control signal of the control signal generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11602689U JPH0356224U (en) | 1989-10-02 | 1989-10-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11602689U JPH0356224U (en) | 1989-10-02 | 1989-10-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0356224U true JPH0356224U (en) | 1991-05-30 |
Family
ID=31664333
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11602689U Pending JPH0356224U (en) | 1989-10-02 | 1989-10-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0356224U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62239715A (en) * | 1986-04-11 | 1987-10-20 | Fujitsu Ltd | Pulse distributing circuit |
-
1989
- 1989-10-02 JP JP11602689U patent/JPH0356224U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62239715A (en) * | 1986-04-11 | 1987-10-20 | Fujitsu Ltd | Pulse distributing circuit |