JPH0357974A - Apparatus and method for inspecting semiconductor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a semiconductor testing device and testing method.

[Conventional technology]

For example, semiconductor testing equipment that electrically tests packaged semiconductor chips conventionally has one measurement stage, and tests the quality of the semiconductor chips by sequentially transferring the semiconductor chips to be tested as follows. conduct. That is, semiconductor chips are taken out one by one from a tray containing a plurality of packaged semiconductor chips and placed on a load table. Next, the semiconductor chip is transferred from the load table to the measurement stage. At this time, the inspected semiconductor chip that was on the measurement stage is moved to the unload table. Fine alignment is performed on the uninspected semiconductor chip transferred to the measurement stage. After this alignment has been completed, the measurement stage is moved to a test position below the test head. At this test position, electrical connections are made between the test head and each terminal of the semiconductor chip, the test head supplies test signals to the semiconductor chip, and the test head receives output signals from the semiconductor chip. Perform inspection. When the inspection is completed, the measurement stage returns to the load/unload position where the next chip is transferred, and the inspected semiconductor chip is transferred to the unload table, and at the same time, the next semiconductor chip is transferred to the measurement stage. The measurement stage moves in the same manner below. Defective semiconductor chips are removed from the semiconductor chips transferred to the unload table, and only good chips are stored in the tray.

[Problem to be solved by the invention]

As described above, since the conventional semiconductor inspection equipment has only one measurement stage, after the semiconductor chip is transferred to the load table, the test of the previous semiconductor chip on the measurement stage is completed, and then Until the measurement stage returns to the loading/unloading position of the semiconductor chip.
must be on standby. Then, after placing the next semiconductor chip on the measurement stage, the semiconductor chip is subjected to clear alignment and transferred from the load stage to the measurement stage, and then fine alignment is performed and the measurement stage is moved to the test position. It must be transported and tested. In this way, the measurement stage must perform realignment, transfer from the load stage to the measurement stage, and fine alignment after completing the test of the previous semiconductor chip and after receiving the next semiconductor chip, which reduces throughput. There were bad flaws. In view of the above points, the present invention aims to provide a semiconductor testing device and testing method that can improve throughput.

[Means to solve the problem]

The present invention provides a semiconductor inspection apparatus for testing the object by moving a measurement stage on which an object to be inspected is placed to a test position, which comprises: two measurement stages; A common first rail for making the stage movable in the first direction and each of the two measurement stages on the first rail,
second and third rails for movable in directions perpendicular to the first direction; first and third rails for detecting the current positions of the two measurement stages in the first direction; The present invention is characterized in that it is provided with two position detection means, and a control means for controlling the movement of the two measurement stages based on the current position information from the first and second position detection means. Further, in the semiconductor testing method according to the present invention, a straight line connects the position of a load table on which an untested object is carried in and placed, and an unload table on which an inspected object is carried in and placed. The load/unload positions of the test object on the first and second measurement stages are set above, and the distance between the load table and the load/unload position of the first measurement stage and the The distance between the unloading table and the loading/unloading position of the second measurement stage is made equal, and two holding parts for the object to be inspected are provided at positions separated by the distance, and the holding parts are A transfer mechanism that transfers in the linear direction is provided, and when the second measurement stage is in a test state, the holding portion of the transfer mechanism transfers the uninspected object on the load table and the first measurement stage. The inspected objects are held at the same time, the uninspected objects are transferred to the first measurement stage, and the inspected objects are transferred to the unloading table, and the test state of the first measurement stage is determined. After the untested object on the load table is held by one of the holding parts of the transfer mechanism, the inspected object on the second measurement stage is held by the other holding part, and then, The present invention is characterized in that an uninspected object to be inspected is placed on the second measurement stage, and an inspected object to be inspected is placed on the unloading table at the same time.

[Effect]

There are two measurement stages, and one measurement stage carries the test object from the load table to the other measurement stage and transfers the test object from the other measurement stage to the unload table during the test. The semiconductor chip can be unloaded, and other measurement stages can be used to perform briar alignment, fine alignment, etc. for the next semiconductor chip. Therefore, when the test on one measurement stage is completed, the other measurement stages can be immediately moved to the test position and the test can be started, thereby increasing the throughput. Furthermore, if separate rails are provided for moving the two measuring stages in the first direction, the device will become larger and the configuration will become more complicated. The configuration is such that the rail is shared by two measurement stages. In this case, the movement ranges of the two measurement stages in the first direction are the same, but in this invention, the movement is controlled using the detection output of the means for detecting the current positions of both measurement stages. . Therefore, control can be easily performed to prevent malfunctions such as collision between the two measurement stages.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a top view of an embodiment of a semiconductor inspection device according to the present invention, and FIG. 2 is a side view of the main parts thereof. The apparatus of this example is composed of a loader system 1 and a measurement stage system 2, which are connected by a plurality of connecting members 3 having a vibration isolation mechanism. The loader system 1 takes out untested semiconductor chips one by one from a tray T that can accommodate a plurality of semiconductor chips C, and sequentially stores semiconductor chips that have been tested into empty trays T. This loader system 1 includes a sender mechanism 4, a receiver groove 5, a tray buffer mechanism 6, a chip loading mechanism 7, a chip unloading mechanism 8, a tray transport mechanism 9, a load table 10, an unload table 11, and a chip double transport mechanism 12. and is provided. Further, a preheating mechanism 13 including the load table 10 is provided. In this loader system 1, the sender mechanism 4 accommodates a plurality of stacked trays T for accommodating a plurality of untested semiconductor chips, for example, in a matrix. This sender mechanism 4 is vertically movable. The receiver mechanism 5 accommodates a plurality of stacked trays T each containing a plurality of inspected semiconductor chips in a matrix. This receiver mechanism 5 is also configured to be able to move up and down. The chip loading mechanism 7 transports the semiconductor chips C one by one from the top tray T of the sender mechanism 4 to the load stage 10. For this reason, the chip loading mechanism 7
Conveyance arm 7 extending in the Y direction above the sender mechanism 4
1 is attached to the X-z stage 72 so as to be movable in the X direction and the Y direction, and the suction holding section 73 for the semiconductor chip C is attached to the transfer arm 71 so as to be movable in the Y direction along the transfer arm 71. It is installed and configured. The X-z stage 72 includes, for example, an LM guide, a ball screw, or a timing belt. The suction holding section 73 has a tip made of, for example, a rubber suction body, takes out the semiconductor chip C from the tray T by vacuum suction, holds it, and transfers it to the load table 10.
The system is designed to allow transport up to The chip carry-out mechanism 8 transfers the inspected semiconductor chips on the unload table 11 to the tray T of the receiver mechanism 5, and has exactly the same structure as the chip carry-in mechanism 7. That is, a transport arm 81 extending in the Y direction above the receiver mechanism 5 is attached to the X-2 stage 82 so as to be movable in the X and Z directions. And the transport arm 8
The inspected semiconductor chip C placed on the unloading table 11 is vacuum-suctioned and held by the suction-holding section 83 which is attached movably in the Y direction with respect to the unloading table 11. Transfer it to an empty place at T and store it. The tray transfer mechanism 9 includes a sender mechanism 4 and a receiver mechanism 5.
Above the tray buffer mechanism 6, a transport arm 91 extending in the X direction is attached to the base 14 extending across the Y direction so as to be movable in the Y and Z directions just above the tray. The transport arm 91 of the tray transport mechanism 9 is provided with four suction holding sections 92 for vacuum suction, holding and transporting the tray T. When all of the semiconductor chips C on the top tray T of the sender mechanism 4 have been transferred and the tray becomes an empty tray, the tray transfer mechanism 9 holds it by vacuum suction and transfers it to the receiver mechanism 5. When there is still room for storing semiconductor chips in the uppermost tray T of the receiver mechanism 5, the tray transfer mechanism 9 holds the tray, transports it to above the tray buffer machine side 6, and waits there. However, if the next tray in the sender mechanism 4 becomes empty during that time, the tray held in the tray transfer mechanism 9 is temporarily stored in the buffer tray mechanism 6, and the empty tray in the sender mechanism 4 is adsorbed. It waits on the tray buffer mechanism 6. Furthermore, the chip double transfer mechanism 12 is attached to the base 14 so that it can be transferred in the Y direction and the Z direction. Two suction holders #15 and 16 that suction and hold semiconductor chips by vacuum suction are attached to this chip double transfer mechanism 12 at a distance Md apart in the Y direction. Note that an image recognition device M17 for clear alignment (rough alignment) is provided above the load table 10. Furthermore, a defective chip storage box 18 is provided at a lower part of the chip transport path of the chip carry-out mechanism 8 for storing chips determined to be defective as a result of inspection. Although the preheating mechanism 13 can be configured in various ways, it can be configured as follows. That is, the load table 10 is constituted by a semiconductor element holding block, which is transferred in a circular manner as shown by the arrow in the figure, and between this circular path, rubber heaters, etc. are arranged above and below so as to sandwich this circular path. The heating means is configured to heat to a predetermined temperature, for example, 150°C. Note that there is no heater above the illustrated load table 10, and the loading and unloading of semiconductor chips to and from the load table 10 is carried out by the suction holding section 73 of the loading mechanism 7 and the suction holding section 15 of the chip double transfer mechanism 12. It is considered possible. Next, the measurement stage system 2 has first and second measurement stages 21 and 22, which receive untested semiconductor chips from the loader system 1 and finely adjust their positions. Alignment (Fine alignment)
After performing this, the measurement stages 21 and 22 are moved to the test position below the test head, and the semiconductor chips that have been inspected are transferred to the loader system 1 on the measurement stage 2.
1 and 22. In this measurement stage system 2, the measurement stage 21
and 22, as shown in FIGS. 1 and 2, the mounting table 2
3 and 24. The mounting tables 23 and 24 are provided with heating means (not shown) to keep the preheated semiconductor chips placed thereon heated at a predetermined temperature. As the heating means, the mounting tables 23, 2
4, embed a nichrome wire heater, or place the mounting table 23
, 24 may be provided with a thin film heater. The mounting tables 2B and 24 are the mounting tables 23 and 24.
are attached to movable platforms 25 and 26 that allow movement in the Z and θ (rotation on the X, Y plane) directions, respectively. The moving tables 25 and 26 are mounted on a first X rail 27 and a second X rail 28 for moving these moving tables 25 and 26 in the Y direction, respectively, and The stage is set up. Furthermore, these first and second X stages are mounted on two Y rails common to these two X stages for moving them in the X direction. In FIG. 1, a position P1 of the measurement stage 21 indicated by a solid line is a loading/unloading position of the semiconductor chip, and a position P2 indicated by a chain line is a fine alignment position, which is indicated by a chain double-dashed line. Position PO is the test position above which the test head is placed. Similarly,
A position P3 of the measurement stage 22, indicated by a solid line, is a loading/unloading position of the semiconductor chip, and a position P4, indicated by a dashed line, is a fine alignment position. Similarly to the measurement stage 21, the test position is the position PO indicated by the two-dot chain line. In this case, the first and second
loading/unloading positions P1 and P of the measurement stage
3 is on the straight line connecting the positions of the load table 10 and the unload table 11, and the distance between the load table 10 and the position P1 is made equal to the distance between the unload table and the position P3, and the distance is , is selected to be equal to the distance d between the suction holding parts 15 and 16 of the chip double transfer mechanism 12. Further, image recognition devices 30 and 31 for fine alignment are provided above the fine alignment positions P2 and P4 of the measurement stages 21 and 22. As mentioned above, the first. Second measuring stage 21.22
are on the common Y rails 29A and 29B, so the movements of these measuring stages 21 and 22 in the X direction are controlled in the following manner so as not to be complicated. That is, FIG. 3 is a block diagram of a control circuit for moving the measurement stages 21 and 22 in the X direction on the Y rail 29. 41 and 42 are measurement stages 21 and 22, respectively.
These drive motors 41 and 42 are equipped with pulse encoders 43 and 44 that generate a constant number of pulses per revolution and obtain a signal indicating the direction of rotation of the motor. installed. Further, 45 and 46 are position sensors made of, for example, photosensors, and are respectively used for the measurement stages 21 and 2.
2 is the loading/unloading position of the semiconductor chip [P1, P3
This is detected when the In this example, the loading/unloading positions PL and P3 are the home positions of the measurement stages 21 and 22, and it depends on how far each measurement stage 21, 22 moves in the X direction from this home position. , each measurement stage 21.2
I am trying to know the current location of 2. That is, pulses and rotational direction signals from pulse encoders 43 and 44 and sensor outputs from position sensors 45 and 46 are supplied to current position detection circuits 47 and 48. These current position detection circuits 47 and 48 are configured, for example, by up/down counters, the rotational direction signals from the pulse encoders 43 and 44 are supplied to the up/down control terminals, the pulses are supplied to the clock terminals, and the sensors 45 and 46 The output of is supplied to the reset terminal. Therefore, the count value of the counter constituting the current position detection circuit 47.48 represents the current position of the measurement stage 21.22 with respect to the home position. This current position detection circuit 47
Current position information from and 48 is supplied to four control circuits. Motor drive signals are supplied from the four control circuits to drive motors 41 and 42 via motor drive circuits 51 and 52, respectively. This control circuit 49 learns the position of the measurement stage 21.22 from the current position information from the current position detection circuit 47.48, and based on this, drives and controls the measurement stages 21 and 22 in synchronization. The movement of the measurement stages 21 and 22 is prevented from becoming complicated. Next, using the semiconductor inspection equipment configured as above,
The operation when performing a temperature test on the semiconductor chip C at a high temperature of, for example, 150° C. will be described with reference to FIG. 4. First, in the sender mechanism 4, a plurality of trays T each having a plurality of semiconductor chips C arranged in a matrix are placed in a stacked manner. On the other hand, one empty tray T is initially placed in the receiver mechanism 5. In this state, in the chip loading mechanism 7, the suction holding part 73 is moved to the position of one semiconductor chip on the top tray T of the sender mechanism 4, and the semiconductor chip is suction held. The semiconductor chip is transferred to the load table 10 by the X-Z stage 72 and placed thereon. The semiconductor chip placed on the load table 10 is heated to 150° C. in the preheating mechanism 13 as described above, and then returns to the load table position shown in the figure. Then, at this position of the σ-do table 10, the position is recognized by the image recognition device 17. and,
At the first measurement stage 21 located at the loading/unloading position P1, realignment is performed based on the image recognition information. Mounting table 23 for the first measurement stage 21
is heated to 150° C. by the heating means described above. When the realignment is completed, as shown in FIG. 4A, the suction holding part 15 of the chip double transfer mechanism 12 is moved to the position of the load table 10, and the semiconductor chip placed on the load table 10 is moved to the suction holding part 15 of the chip double transfer mechanism 12. 15 adsorbs and holds it, and then moves the transfer mechanism 12 in the Y direction to
As shown in FIG. B, the semiconductor chip is placed on the mounting table 23 of the first measurement stage 21. Measurement stage 21
Thereafter, the probe moves to the fine alignment position P2 and, based on the semiconductor chip position information obtained by the image recognition device 30, is placed on the mounting table 23 so that the probe needle correctly contacts the terminals of the semiconductor chip at the test position PO. fine alignment of the semiconductor chip position. When this fine alignment is completed, the measurement stage 2
1 to the test position PO, the mounting table 23 is raised by the moving table 25, and the probe needle of the probe card is brought into contact with the terminal of the semiconductor chip. And, as mentioned above,
A test head (not shown) located on a head plate (not shown) tests the semiconductor chip. During this time, the next semiconductor chip is transferred from the tray T of the sender mechanism 4 and placed on the load table 10 by the carry-in mechanism 7. Then, pre-alignment of the semiconductor chip on the measurement stage 22 is performed based on the image information of the semiconductor chip on the load table lo by the image recognition device 17. When the realignment is completed, the chip double transfer mechanism 12 uses its suction holding section 15 to suction and hold the semiconductor chip on the load table 10, as shown in FIG. It is placed on the mounting table 24 of the stage 22. The mounting table 24 of the measurement stage 22 is heated to 150"C by the heating means described above. The second measurement stage 22 is then moved to the fine alignment position P4, and the image recognition device 31 The position of the semiconductor chip on the mounting table 24 is fine-aligned based on the position information of the semiconductor chip.Then, the test of the semiconductor chip on the mounting table 23 of the first measurement stage 21 is waited for completion.First measurement In Stage 21, when the test is finished,
The mounting table 23 is lowered, then moved in the Y direction and the X direction and returned to the load/unload position P1. On the other hand, the second
The measurement stage 22 moves to the test position PO, raises the mounting table 24, and starts testing the semiconductor chip on the mounting table 24. At this time, after the semiconductor chip is transferred to the second measurement stage 22, the next semiconductor chip is transferred from the sender mechanism 4 by the carry-in mechanism 7 and placed on the load table 10. Therefore, when the first measurement stage 21 returns to position P1, as shown in FIG. 4D, the load table 1
0, an untested semiconductor chip is placed on the mounting table 23 of the first measurement stage 21, and a semiconductor chip that has been tested is placed on the mounting table 23 of the first measurement stage 21. Then, based on the image information of the semiconductor chip on the load table 10 by the image recognition device 17, real alignment is performed on the first measurement stage 21. When the pre-alignment is completed, the chip double transfer mechanism 1
The suction holding section 15 and the suction holding section 16 of No. 2 are moved to the position of the load table 10 and the suction holding section 16 are moved to the position of the measurement stage 21, respectively, and the semiconductor chips placed on both stages 10 and 21 are simultaneously suction held and carried out. do. After that, as shown in FIG. 4E, the tip double transfer mechanism 12 is transferred,
The suction holding part l5 is the mounting base 2 of the first measurement stage 21.
3, the device is temporarily stopped, the preheated untested semiconductor chip is placed on the mounting table 23 of the measurement stage 21, and the transfer is resumed roughly in the Y direction.
6 is placed on the unload table 11, and the inspected semiconductor chip that was on the mounting table 23 of the first measurement stage 21 is placed on the unload table 11. Then, the inspected semiconductor chips placed on the unload table 11 are stored in empty positions on the tray of the receiver mechanism 5 by the unloading mechanism 8. However, if the semiconductor chip is found to be a defective product as a result of the inspection, the semiconductor chip is placed in a defective product box 18 on the way to the receiver mechanism 5 by the unloading mechanism 8. The first measurement stage 21 on which the untested semiconductor chip is placed is moved to the fine alignment position P2 and fine alignment is performed in the same manner as described above. Then, it waits for the test of the semiconductor chip on the mounting table 24 of the second measurement stage 22 to be completed. In the second measurement stage 22, when the test is finished,
The mounting table 24 is lowered, then moved in the Y direction and the X direction and returned to the load/unload position P3. On the other hand, the first
The measurement stage 21 moves to the test position PO, raises the mounting table 23, and starts testing the semiconductor chip on the mounting table 23. At this time, after the semiconductor chip is transferred to the first measurement stage 21, the next semiconductor chip is transferred from the sender mechanism 4 by the carry-in mechanism 7 and placed on the load table 10. Therefore, when the second measuring stage 22 returns to position P3, as shown in FIG.
0, an untested semiconductor chip is placed on the mounting table 24 of the second measurement stage 22, and a semiconductor chip that has been tested is placed on the mounting table 24 of the second measurement stage 22. Then, pre-alignment is performed on this second measurement stage 22 based on image information of the semiconductor chip on the load table 10 by the image recognition device 17. When the pre-alignment is completed, the suction holding section 15 of the chip double transfer mechanism 12 is moved to the position of the load table 10, and the semiconductor chip placed on the table 10 is suction held and carried out. After that, as shown in FIG. 4F, the chip double transfer mechanism 12 is transferred and the suction holding section 1
When the semiconductor chip 6 reaches the mounting table 24 of the second measurement stage 22, it is temporarily stopped, and the inspected semiconductor chip on the mounting table 24 is sucked and held by the suction holding section 16. after that,
The chip double transfer mechanism 12 is further transferred to the state shown in FIG. 4G.
As shown in FIG. 2, the suction holding unit 15 stops when the suction holding unit 15 is placed on the mounting table 24 of the second measurement stage 22, and the suction holding unit 16 is placed on the unloading table 11, and the preheated untested semiconductor chip is placed there. The mounting table 24 of the measurement stage 22
At the same time, the inspected semiconductor chip that was on the mounting table 24 of the second measurement stage 22 is placed on the unload table 11. As mentioned above, the inspected semiconductor chips placed on the unload table 11 are
The chip ejecting mechanism 8 stores non-defective products in empty positions on the tray of the receiver mechanism 5, and stores defective products in a defective product box 18. The second measurement stage 22 on which the untested semiconductor chip is placed is moved to the fine alignment position P4 and fine alignment is performed in the same manner as described above. Then, the end of the test on the semiconductor chip on the mounting table 23 of the first measurement stage 21 is waited for. Hereinafter, the sequence of FIGS. 4D to 4G is repeated in sequence, and while testing is performed on one measurement stage, the pre-alignment and fine alignment of the next semiconductor chip are completed on the other measurement stage, and It enters a standby state, improving throughput. FIG. 5 shows a flowchart of the operation sequence of the above-mentioned chip double transfer mechanism 12. As described above, the semiconductor chips are sent one by one from the sender mechanism 4 to the load stage 10, and the semiconductor chips are sent to the first and second stages.
A test is performed on measurement stages 21 and 22, and the products are stored in the receiver mechanism 5 or defective product box 18 via the unload stage 11. Then, when the topmost tray T of the sender mechanism 4 becomes empty, the tray transfer mechanism 9 carries out this empty tray from the sender mechanism 4. Therefore, the semiconductor chips will now be carried out from the second tray of the sender mechanism 4. The tray transfer mechanism 9 holds this empty tray, and when the uppermost tray next to the receiver machine 5 is full of semiconductor chips, it places this empty tray on top of it. If there are many defective chips and the top tray on the side of the sender machine 4 becomes empty before the top tray of the receiver mechanism 5 becomes full, the tray transfer mechanism 9 The trays are temporarily stored in the tray buffer mechanism 6, and the empty tray at the top of the sender mechanism 4 is held by suction and carried out. Therefore, even if there are many defective products, there is no need to stop unloading semiconductor chips from the sender mechanism 4 until the uppermost tray of the receiver mechanism 5 is full, and the throughput of test time can be increased. Note that in the above example, a preheating mechanism was particularly provided, but if the object to be inspected has a fast heating rate, the preheating mechanism may not be provided. Furthermore, although the above example describes the case of a semiconductor inspection device that performs a temperature test in which a semiconductor chip is tested in a heated state, the present invention is not limited to an inspection device that performs such a temperature test. Needless to say, the present invention can be applied not only to testing equipment but also to various other semiconductor inspection equipment. In addition, although the above example has been explained in the case of an inspection apparatus for packaged semiconductor chips, it goes without saying that the present invention can also be applied to an inspection apparatus for semiconductor wafers.

【Effect of the invention】

As explained above, according to the present invention, two measurement stages are provided, and when one measurement stage is testing a semiconductor chip, the other measurement stage is used for the next semiconductor chip's realignment. It is possible to perform fine alignment and standby so that the next test can be started immediately, thereby increasing throughput. The invention also includes two measuring stages mounted on separate rails for movement in a second direction.
This configuration is provided on one common rail for movement in the first direction orthogonal to the second direction. Therefore, the rails for moving in the first and second directions are
and the second measurement stage, the configuration can be simplified and the apparatus can be made smaller compared to the case where they are provided separately. Moreover, in this invention, although the movement ranges of the two measurement stages in the first direction are the same, the movement is controlled using the detection output of the means for detecting the current positions of both measurement stages. Control can be easily performed to prevent malfunctions such as collision between the two measurement stages.

[Brief explanation of drawings]

FIG. 1 is a plan view of an embodiment of the semiconductor inspection apparatus according to the present invention, FIG. 2 is a side view of the main parts thereof, and FIG. 3 is a diagram showing two measuring stages of the semiconductor inspection apparatus according to the present invention. FIG. 4 is a block diagram for movement control; FIG. 4 is a diagram for explaining the sequence of loading and unloading a semiconductor chip onto two measurement stages; FIG. 3 is a flowchart of a loading/unloading sequence of a semiconductor chip. 10; load table 11; unload table 12; chip double transfer mechanism 15.16; suction holding section 17; pre-alignment image recognition device 21; first measurement stage 22; second measurement stage 27.2g, Two X rails; Common Y rail 30.31; Fine alignment image recognition device PO; Test positions PL, P3; Load/unload position

Claims (2)

[Claims] (1) In a semiconductor inspection apparatus that tests the object to be inspected by moving a measurement stage on which an object to be inspected is placed to a test position, there are two stages for measurement; , a common first rail for movable in a first direction, and each of the two measurement stages on the first rail,
second and third rails for movable in directions perpendicular to the first direction; first and third rails for detecting the current positions of the two measurement stages in the first direction; 2 position detection means; and a control means for controlling the movement of the two measurement stages based on the current position information from the first and second position detection means. Device. (2) The first and second The load/unload position of the test object on the second measurement stage is set, and the distance between the load table and the load/unload position of the first measurement stage, and the distance between the unload table and the second measurement stage are determined. A transfer mechanism that has two holding parts for the object to be inspected at positions separated by the distance, the distances being equal to the loading/unloading positions of the measurement stage, and transporting the holding parts in the linear direction. and in a test state of the second measurement stage, the holding part of the transfer mechanism simultaneously holds an untested object on the load table and an inspected object on the first measurement stage. , the uninspected object to be inspected is transferred to the first measurement stage, and the inspected object to be inspected is transferred to the unloading table, and in the test state of the first measurement stage, the holding part of the transfer mechanism is moved. After holding the uninspected object on the load table with one side, the inspected object on the second measurement stage is held on the other holding part, and then the uninspected object is held on the second measuring stage. A semiconductor testing method characterized in that the tested object is simultaneously placed on the unloading table on the measurement stage.