JPH0360041A - Manufacture of field effect transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a field effect transistor.

[Summary of the invention]

In the present invention, a silicon nitride film or other insulating film having a structure in which the upper surface is covered with a silicon nitride film is patterned on the surface of a semiconductor substrate as a gate insulating film, and then a semiconductor is grown by using a molecular layer epitaxial growth method. This allows single-crystal source/drain regions to be formed on the substrate and polycrystalline silicon gate electrodes to be formed on the silicon nitride layer at the same time.

[Conventional technology]

Conventionally, source and drain regions have been formed by ion implantation after patterning a polycrystalline silicon gate.

[Problem to be solved by the invention]

Conventional methods require two steps: formation of polycrystalline silicon and formation of sources and drains by ion implantation.

[Means to solve the problem]

In order to solve the above problems, in the present invention, the gate insulating film is formed of a silicon nitride film or a structure in which the upper surface of another insulating film is covered with a nitride film, and gate %%
After patterning the Hli, we decided to use a molecular layer epitaxial growth method.

[Effect]

According to the above means, a heavily doped single crystal source/drain region is simultaneously formed on the surface of the semiconductor substrate, and a heavily doped polycrystalline silicon gate electrode is formed on the silicon nitride film.

〔Example〕

The present invention will be explained in detail below.

FIG. 1 fal to tel are process cross-sectional views showing the manufacturing process according to the present invention.

FIG. 1 (al shows that a gate insulating film 2 is formed on a silicon substrate 1. This gate insulating film 2 is a silicon nitride film or at least a multilayer film whose upper surface is a silicon nitride film. be.

FIG. 1 (bl shows the gate insulating film 2 patterned into the desired gate electrode shape).

FIG. 1 (C1 shows the silicon oxide film 3 forming the element isolation region).

FIG. 1 fdl is formed using a molecular layer epitaxial growth method to form a source region 4 and a drain region 5, which are single crystals with a high impurity concentration on the surface of the silicon base [1], and a polycrystalline layer with a high impurity concentration on the gate insulating film 2. The gate electrode 6 is shown being formed. Note that, due to the characteristics of the molecular layer epitaxial growth method, nothing is formed on the surface of the silicon oxide film 3, which serves as an element isolation region. Furthermore, due to this characteristic, if the gate insulating film 2 is made into a 2N structure in which the lower layer is a silicon oxide film and the upper layer is a silicon nitride film, the gate electrode 6 and the source region 4 and drain region 5 will be short-circuited. The danger is further reduced.

As mentioned above, by the molecular layer eviaxial growth method,
When forming the source region 4, drain region 5, and gate electrode 6, if the substrate temperature is set at 825°C in an ultra-high vacuum apparatus, 5iHzCl! If, for example, BtHh is introduced as a gas containing an impurity element and the pressure time chart shown in Fig. 2 is introduced as one cycle, Sin
, CI, when the pressure at the time of introduction is 1.5 Xl0-'Torr, the pressure at the time of introduction of BJh is 5iHtCI1. According to the ratio to the pressure at the time of introduction, the film thickness is as shown in Figure 3,
For example, at a substrate temperature of 825°C, 5iH2 (: 1
The pressure at the time of introduction of @ is 1.5 X 10-” Torr, and the pressure ratio to 5iH1C1g at the time of BtH* introduction is 4.
If it is made of A gate electrode 6 made of polycrystalline silicon and having a thickness approximately 1.5 times that of the source region 4 or drain region 5 is formed on the surface of the gate insulation WA2.

Here, a heat treatment is performed at 800 to 900°C for 30 minutes, and the silicon substrate below the source region 4 and drain region 5 is heated.
Then, a field effect transistor was obtained by diffusing N7 and N8 in a powerful manner (FIG. 1(e)).

Above, we have described the method of forming a P-channel field effect transistor using BJi, but instead of 88H1,
If SH or PH is used, an n-channel field effect transistor can be similarly formed.

〔Effect of the invention〕

As mentioned above, by forming the gate insulating film itself or its upper surface into a silicon nitride film and then using the molecular layer epitaxial growth method, it is possible to not only simplify the process but also form the source/drain regions at the molecular layer level. The film thickness can be controlled, and the impurity density can also be precisely controlled.

[Brief explanation of drawings]

Fig. 1 tal~+81 is a process cross-sectional view showing the manufacturing process according to the present invention, Fig. 2 is a time chart of an example of gas introduction pressure in the molecular layer epitaxial growth method, and Fig. 3 is a BJ
SiH□c1. of the pressure at the time of introduction of i. A diagram showing the relationship between the ratio to t and the growth #thickness per cycle, Figure 4 is B.
The ratio of the pressure at the time of introduction of H to 5iHzCj'Z,
It is a figure showing the relationship of B concentration in a film. 1 ・ ・ ・ 2− ・ ・ 3 ・ ・ 4 ・ ・ ・ 5 ・ ・ ・ Silicon substrate Gate insulating film Silicon oxide film Source region Drain region 6 ・Gate electrode or higher

Claims (1)

[Claims] By patterning an insulating film formed on a semiconductor substrate with a structure in which a silicon nitride film is overlaid on a silicon nitride film or other insulating film as a gate insulating film, and using molecular layer epitaxial growth, . A method for manufacturing a field effect transistor, characterized in that a polycrystalline silicon gate electrode is formed on a silicon nitride film in the source and drain regions.