JPH0360052A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To enable the measurement of a latch-up resisting amount to be carried out at all potential states of all external output terminals by controlling a switching circuit with a signal from a second external input circuit and interrupting an output signal from an internal integrated circuit to be input to an externally outputting buffer circuit and inputting a signal from a first input circuit to the externally outputting buffer circuit. CONSTITUTION:An input terminal 2 of an externally outputting buffer circuit 1, an output terminal 4 of an external input circuit 3 and an output terminal 6 of an internal integrated circuit 5 are connected via switching circuits 9, 8 respectively, and control terminals 10, 11, 12, 13 of the switching circuits 8, 9 are connected to output terminals 15, 16 of an external input circuit 14. Output signals of the internal integrated circuit 5 and the external input circuit 3 to be input to the externally outputting buffer circuit 1 can be switched to either one of them by a signal from the external input circuit 14. Thus, the measurement of a latch-up resisting amount can be carried out at both of H and L potential states of all external output terminals.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device whose latch-up tolerance can be easily measured.

[Conventional technology]

As part of the conventional semiconductor integrated circuit device is shown in FIG. 2, an external output buffer circuit 200 input terminal 21.
The output terminal 23 of the external input buffer circuit 22 is connected to the output terminal 25 and the input terminal 26 of the internal integrated circuit 24, respectively, and the input signal to the external output buffer circuit 20 is connected to the internal integrated circuit 24. There was only a signal from

[Problem to be solved by the invention]

In the conventional semiconductor integrated circuit device described above, the input signal to the external output buffer circuit 20 is only the signal from the internal integrated circuit 24, so the potential of the external output terminal 25 when performing latch-up tolerance measurement is It depends on the state of the internal integrated circuit 25 at the time. Therefore, it is arbitrarily set to H level or L level, and the potential of the terminal to be measured is set to H level.
In order to set the level or L level, the power can be turned on and off repeatedly, waiting for the state of the internal integrated circuit 24 to change before taking the measurement, or the potential state of the external output terminal arbitrarily determined at the time of measurement may be maintained. There is a drawback that latch-up tolerance cannot be measured for all potential states of all external output terminals.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device in which the above drawbacks are solved and latch-up resistance can be measured in all potential states of all external output terminals.

[Means to solve the problem]

The configuration of the present invention is a semiconductor integrated circuit device including an internal integrated circuit formed on a semiconductor substrate, an external output buffer circuit having an external connection output terminal, and a first external input circuit having an external connection input terminal. A first . The present invention is characterized in that a second switch circuit is provided, and a second external input circuit provides a control signal that alternately turns on and off the first and second switch circuits.

〔Example〕 Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a circuit diagram of a semiconductor integrated circuit device according to an embodiment of the present invention. In FIG. 1, the semiconductor integrated circuit device of this embodiment has a first external output buffer circuit 10 input terminal 2
and the output terminal 4 of the first external input circuit 3. and the output terminals 6 of the internal integrated circuit 5 are connected via switch circuits 9, 8, respectively, and the control terminals 10, 11, 12, 13 of the switch circuits 8, 9 are connected to the second external input circuit 14, respectively. is connected to output terminals 15 and 16 of.

Internal integrated circuit 5 which is input to the first external output buffer circuit 1. and the output signal of the first external input circuit 3 is
It is possible to switch to either one by a signal from the external input circuit 14.

The connection relationship of the second external output buffer circuit 31 is also as follows.
The circuit configuration is similar to that of the first external output buffer circuit 1 described above, so a description thereof will be omitted.

In addition, there is also a signal that is directly inputted from the output terminal 18 of the buffer circuit 17 to the input terminal 7 of the internal integrated circuit 50 without going through the switch circuit.

〔Effect of the invention〕

As explained above, the semiconductor integrated circuit device of the present invention includes
It is switched by the signal from the second external input circuit.

By controlling the child circuit, blocking the output signal from the internal integrated circuit input to the external output buffer circuit, and inputting the signal from the first external input circuit to the external output buffer circuit, The potential of the output terminal of the buffer circuit can be set to H or L level regardless of the state of the internal integrated circuit, and the latch-up tolerance measurement can be performed with the H and L potentials of all external output terminals at the same potential. It has the effect of being able to

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a semiconductor integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional semiconductor integrated circuit device. 1.20...Buffer circuit for external output, 2,2
1...Input terminal of external output buffer circuit, 3
・・・・・・First external input circuit, 4・・・・・・First
Output terminal of external input circuit, 5, 24... Internal integrated circuit, 6, 25... Output terminal of internal integrated circuit, 7, 26... Output terminal of internal integrated circuit Input terminal, 8
, 9... Switch circuit, 10.11, 12.1
3... Control terminal of switch circuit, 14...
...Second external input circuit, 15, 16...Second
Output terminals of external input circuits, 17, 22... buffer circuits for external inputs, 18, 23... output terminals of buffer circuits for external inputs, 19, 27...
Terminal for external connection.

Claims (1)

[Claims] In a semiconductor integrated circuit device comprising an internal integrated circuit formed on a semiconductor substrate, an external output buffer circuit having an external connection output terminal, and a first external input circuit having an external connection input terminal, the external input circuit and the internal integrated circuit and the external output buffer circuit, respectively.
A semiconductor integrated circuit device comprising: a second switch circuit; and a second external input circuit that provides a control signal that alternately turns on or off the first and second switch circuits.