JPH0360065A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPH0360065A JPH0360065A JP19553389A JP19553389A JPH0360065A JP H0360065 A JPH0360065 A JP H0360065A JP 19553389 A JP19553389 A JP 19553389A JP 19553389 A JP19553389 A JP 19553389A JP H0360065 A JPH0360065 A JP H0360065A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- width
- thin film
- integrated circuit
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 claims abstract description 27
- 238000005530 etching Methods 0.000 abstract description 2
- 241001193851 Zeta Species 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 description 6
- 239000000758 substrate Substances 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、集積回路に関し、特に回路中に薄膜で形成さ
れた抵抗を有する集積回路に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to integrated circuits, and more particularly to integrated circuits having thin film resistors in the circuit.
第３図は従来の一例を示す半導体基板上に形成された集
積回路の薄膜抵抗の平面図である。従来、この種の集積
回路中の薄膜抵抗は、第３図に示すように、薄膜抵抗体
１ａを所望の抵抗値として取り出す場合、薄膜抵抗体１
ａ上の両端に電極２を重ね、その間の薄膜抵抗体の距＠
１２、幅Ｗ及び薄膜抵抗体のシート抵抗ρＳによって決
定する。即ち図３においての所望の抵抗値Ｒは、Ｒ＝
−ρ１によって決定されていた。FIG. 3 is a plan view of a thin film resistor of an integrated circuit formed on a semiconductor substrate, showing a conventional example. Conventionally, as shown in FIG. 3, thin film resistors in this type of integrated circuit have been used when taking out the thin film resistor 1a as a desired resistance value.
The electrode 2 is stacked on both ends of a, and the distance of the thin film resistor between them @
12. It is determined by the width W and the sheet resistance ρS of the thin film resistor. That is, the desired resistance value R in FIG. 3 is R=
−ρ1.
また、この薄膜抵抗を形成するとき、電極の構造上のバ
ラツキ、即ち集積回路においては、例えば、アルミニュ
ーム電極のオーバーエツチングにより、第３図の実線で
示す電極２が点線で示すようにエツチングされ、電極の
ずれを生ずる。い表わされる。本来、設計段階で、ΔＲ
分を見込めば良いが、Δｇは製造上のバラツキであるの
で、ΔＲを一定値だと見なすことができない。そこで、
Δｇの変動に対してΔＲをできる限り小さくするには、
薄膜抵抗体の幅Ｗを広くすることで、絶対精度や相対精
度の必要とする抵抗を得ていた。Furthermore, when forming this thin film resistor, due to variations in the structure of the electrodes, that is, in integrated circuits, for example, due to overetching of the aluminum electrode, the electrode 2 shown by the solid line in FIG. 3 may be etched as shown by the dotted line. , causing electrode misalignment. It is expressed. Originally, at the design stage, ΔR
However, since Δg is a manufacturing variation, ΔR cannot be regarded as a constant value. Therefore,
To make ΔR as small as possible against fluctuations in Δg,
By increasing the width W of the thin film resistor, the resistance required for absolute accuracy and relative accuracy has been obtained.
上述した従来の集積回路の抵抗では、例えば、増幅回路
において、所望の増幅度を得るためには、入力抵抗と帰
還抵抗の相対精度を必要とする。そのため相対精度の必
要な抵抗値を取り出すためには、薄膜抵抗体の幅をなる
べく広くして製作していたが、その分、抵抗の長さが長
くなるという欠点があった。従って、高精度の抵抗を要
求される回路のレイアウト配列は、薄膜抵抗体によって
決定され、レイアウト上の大きな制限となり、また、全
体のチップ面積がこれによって増大する原因となってい
た。本発明の目的゛は、かかる欠点を解決し、レイアウ
ト設計が自由に出来、チップ面積が増大しない集積回路
を提供することにある。In the conventional integrated circuit resistors described above, for example, in an amplifier circuit, relative precision between the input resistor and the feedback resistor is required in order to obtain a desired degree of amplification. Therefore, in order to obtain a resistance value that requires relative accuracy, the width of the thin film resistor was made as wide as possible, but this had the disadvantage that the length of the resistor became longer. Therefore, the layout arrangement of a circuit that requires highly accurate resistors is determined by the thin film resistor, which poses a major restriction on the layout and causes an increase in the overall chip area. SUMMARY OF THE INVENTION An object of the present invention is to provide an integrated circuit that solves these drawbacks, allows for flexible layout design, and does not increase chip area.
本発明の！積回路は、薄膜で形成される短冊状の抵抗体
に接続すべき電極が重なる部分の幅が、所望の抵抗値と
して使用される抵抗体部分の幅より広く形成される抵抗
を有している。The invention! The product circuit has a resistor in which the width of the portion where the electrode to be connected to the strip-shaped resistor formed of a thin film overlaps is wider than the width of the resistor portion used as the desired resistance value. .
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は、本発明の一実施例を示す半導体基板上に形成
された集積回路の薄膜抵抗の平面図である。この集積回
路中の抵抗は、同図に示すように電極２の間にある薄膜
抵抗体の幅をＷとし、その長さを（としたとき、電極２
が重なる部分の幅を、例えば２Ｗとしたことである。FIG. 1 is a plan view of a thin film resistor of an integrated circuit formed on a semiconductor substrate, showing one embodiment of the present invention. As shown in the figure, the resistance in this integrated circuit is determined by the width of the thin film resistor between the electrodes 2 and W, and the length of the thin film resistor between the electrodes 2 and 2.
The width of the overlapped portion is set to, for example, 2W.
このように薄膜抵抗体１の形状を変えることにより、ア
ルミニューム配線をエツチングする際に、オーバエツチ
ングにより点線で示すように電抵抗値をもつ抵抗体を得
るには、中間の抵抗体の幅を２倍にし、さらに長さを２
倍にする必要があったことに対して、本発明では、電極
の重なる部分の抵抗体の幅のみを２倍にすれば良いこと
になる。By changing the shape of the thin film resistor 1 in this way, when etching aluminum wiring, in order to obtain a resistor with an electrical resistance value as shown by the dotted line by overetching, the width of the intermediate resistor can be changed. Double it, then increase the length by 2
Whereas it was necessary to double the width, in the present invention, it is only necessary to double the width of the resistor in the portion where the electrodes overlap.
第２図は本発明の他の実施例を示す半導体基板に形成さ
れた集積回路の薄膜抵抗の平面図である。この集積回路
中の抵抗は、同図に示すように、薄膜抵抗体１の両端と
、中間点に重ねて形成された電ｉ２ｂ及び２ｃにより３
分割された抵抗を示している。このような場合も、電極
２ｂ及び２ｃと重なる薄膜抵抗体１の幅を広くすること
により、オーバエツチングされても、所要の精度の高い
抵抗値をもつ抵抗が得られる。FIG. 2 is a plan view of a thin film resistor of an integrated circuit formed on a semiconductor substrate, showing another embodiment of the present invention. As shown in the figure, the resistance in this integrated circuit is 3.
Showing divided resistance. In such a case, by widening the width of the thin film resistor 1 that overlaps the electrodes 2b and 2c, a resistor having a desired highly accurate resistance value can be obtained even if overetched.
以上説明したように本発明は、集積回路中の薄膜抵抗体
の電極が重なり接続すべき部分の幅を、抵抗値をもつ薄
膜抵抗体部分の幅より広くすることによって、薄膜抵抗
体の長さを半分にすることが出来、よりチップ面積の小
さい集積回路が得られるという効果がある。As explained above, the present invention makes the width of the portion where the electrodes of the thin film resistor in an integrated circuit overlap and should be connected wider than the width of the thin film resistor portion having a resistance value, thereby reducing the length of the thin film resistor. This has the effect of halving the chip area, resulting in an integrated circuit with a smaller chip area.
第１図は本発明の一実施例を示す半導体基板上に形成さ
れた集積回路の薄膜抵抗の平面図、第２図は本発明の他
の実施例を示す半導体基板上に形成された集積回路の薄
膜抵抗の平面図、第３図は従来の一例を示す半導体基板
上に形成された集積回路の薄膜抵抗の平面図である。
１．１ａ−・・薄膜抵抗体、２．２ａ、２ｂ、２ｃ・・
・電極。FIG. 1 is a plan view of a thin film resistor of an integrated circuit formed on a semiconductor substrate showing one embodiment of the present invention, and FIG. 2 is a plan view of an integrated circuit formed on a semiconductor substrate showing another embodiment of the present invention. FIG. 3 is a plan view of a thin film resistor of an integrated circuit formed on a semiconductor substrate, showing a conventional example. 1.1a--thin film resistor, 2.2a, 2b, 2c...
·electrode.
Claims (1)
なる部分の幅が、所望の抵抗値として使用される抵抗体
部分の幅より広く形成される抵抗を有することを特徴と
する集積回路。An integrated circuit characterized by having a resistor in which the width of a portion where an electrode to be connected to a strip-shaped resistor formed of a thin film overlaps is wider than the width of a resistor portion used as a desired resistance value. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19553389A JPH0360065A (en) | 1989-07-27 | 1989-07-27 | Integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19553389A JPH0360065A (en) | 1989-07-27 | 1989-07-27 | Integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0360065A true JPH0360065A (en) | 1991-03-15 |
Family
ID=16342676
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19553389A Pending JPH0360065A (en) | 1989-07-27 | 1989-07-27 | Integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0360065A (en) |
-
1989
- 1989-07-27 JP JP19553389A patent/JPH0360065A/en active Pending
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