JPH0360178B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention aims to improve a method for manufacturing a high-speed heterojunction bipolar semiconductor device using a heterojunction made of AlGaAs/GaAs. Conventional technology and problems In recent years, molecular beam epitaxial growth (molec
ular beam epitaxy (MBE) method or MOCVD
(metal organic chemical vapor deposition)
With the remarkable progress in thin film formation technology such as
（metal semicond uctor field effect
transistor) or HEMT (high electron
Field-effect transistors such as mobility transistors (mobility transistors) are being actively developed, and high-speed semiconductor devices called heterojunction bipolar transistors (HBTs), as described above, are also being developed for bipolar transistors. FIG. 2 is a cutaway side view of essential parts of an HBT manufactured according to the prior art. In the figure, 1 is a semi-insulating GaAs substrate, 2 is an n ⁺
Type GaAs collector contact layer, 3 is n-type
GaAs collector layer, 4 is p ⁺ type GaAs base layer, 5
6 indicates an n-type AlGaAs emitter layer, 6 indicates an n ⁺ -type GaAs emitter contact layer, 7 indicates an emitter electrode, 8 indicates a base electrode, 9 indicates a collector electrode, and 10 indicates an isolation trench. Examples of the thickness of each of the semiconductor layers are as follows. n ⁺ type GaAs collector/contact layer 2 about 2000 to 3000 [Å] n type GaAs collector layer 3 about 3000 [Å] p ⁺ type GaAs base layer 4 about 500 to 1000 [Å] n type AlGaAs emitter layer 5 about 2000 [Å] ] Approximately n ⁺ type GaAs emitter/contact layer 62000
Approximately [Å] In the bipolar transistor having a wide gap emitter using a heterojunction made of AlGaAs-GaAs as explained above, the carrier concentration of the base is increased to reduce the early effect. However, it has the great advantage that the injection efficiency β can be maintained at a sufficiently large value. However, as can be seen from the figure, in this HBT, the area of the collector layer 3 is quite large compared to other semiconductor layers, and therefore the collector capacitance C _c is also large. By the way, when integrating the HBT described above, an ECL (emitter coupled logic) circuit is considered to be optimal, but in this ECL circuit, the switching delay time τ _s depends on the collector capacitance C In other words, if the collector capacitance C _c is large _, the delay time τ _s will also become large. Therefore, in order to eliminate these drawbacks, an inverted HBT was developed in which the positions of the emitter and collector were reversed. Figure 3 shows an inverted type manufactured using conventional technology.
It is a cutaway side view of the main parts of the HBT, and the same parts as those explained in connection with FIG. 2 are designated with the same symbols. As can be seen from the figure, this inverted HBT corresponds to the structure of the semiconductor layers stacked on the insulating GaAs substrate 1 in the normal HBT explained with reference to FIG. 2, which is completely reversed. Therefore, n-type
An AlGaAs emitter layer 5 exists on the semi-insulating GaAs substrate 1 side, and an n-type GaAs collector layer 3 exists on the surface side. Due to this structure, the area of the n-type GaAs collector layer 3 is very small compared to a normal HBT, and therefore the collector capacitance C _c
It is also small. As explained above, this inversion type HBT has very excellent performance, but there are problems in manufacturing it, and in particular, it is difficult to draw out the base electrode 8. Normally, when drawing out the base electrode 8, p ⁺
The surface of the type GaAs base layer 4 must be selectively exposed, which requires the n ⁺ type GaAs collector contact layer 2 and the n type GaAs collector layer 3 to be exposed selectively.
It is necessary to mesa-etch the area. This mesa etching is of course
This will be done from the surface side of the HBT, but since it is an inverted type, the collector layer 3 and base layer 4, which are made of the same GaAs, are in contact with each other when viewed from the surface. Control to stop the etching at the surface of the base layer 4 has become extremely difficult. That is, the thickness of the p ⁺ type GaAs base layer 4 is made extremely thin in order not to reduce the injection efficiency β, and in a normal inversion type HBT,
The thickness is about 500 to 1000 [Å], and therefore, the mesa etching tends to become over-etching and cause penetration. Purpose of the Invention The present invention improves the manufacturing yield by making it possible to easily draw out the base electrode when manufacturing an inverted HBT, and also makes the base layer thinner than conventional ones. This makes it possible to maintain a high injection efficiency β, and also to prevent the base resistance from increasing even if the base layer is thinned. Structure of the Invention The method for manufacturing a heterojunction bipolar semiconductor device according to the present invention includes a step of sequentially forming at least an AlGaAs emitter layer, a GaAs base layer, an AlGaAs stopper layer, and a GaAs collector layer on an insulating single crystal substrate. Then, the collector layer, the stopper layer, and the base layer are mesa-etched to expose the emitter electrode formation region of the emitter layer, and the collector layer is dry-etched to form the emitter electrode formation region of the emitter layer. A step of stopping the etching at the stopper layer located on the base electrode formation region, and leaving the emitter electrode on the emitter electrode formation region and the base electrode on the base electrode formation region without being etched. The structure includes a step of forming collector electrodes on each of the collector layers. In such a configuration, by selecting the AlGaAs stopper layer to have a thickness of about 10 to 20 [Å],
Mesa of GaAs collector layer in inverted HBT
Once the etching has stopped at the AlGaAs stopper layer, the base electrode can be formed, and therefore the GaAs
The base layer does not suffer any damage due to mesa etching. Incidentally, the exposed portion of the AlGaAs stopper layer may be removed when mesa etching is stopped. Embodiment of the invention FIG. 1 shows an inverted mold manufactured by implementing the present invention.
This is a cutaway side view of the main parts of the HBT, and the same parts as those explained in connection with FIG. 3 are designated with the same symbols. The inverted HBT manufactured according to the present invention is the third
The difference from the inverted HBT shown in the figure is that the p ⁺ type
A p ⁺ (or n ⁺ type) type AlGaAs stopper layer 11 is provided between the GaAs base layer 4 and the n type GaAs collector layer 3.
is inserted. The thickness of this p ⁺ type AlGaAs stopper layer 11 is 10~
The thickness is about 20 [Å], and a layer of this thickness can be easily formed by applying the MBE method, for example. Next, the steps of an embodiment of the present invention will be explained. (a) For example, by applying the MBE method, an ⁿ An n-type AlGaAs emitter layer 5 with a thickness of about 2000 [Å], a thickness of 250 Å to
p ⁺ type GaAs base layer 4 having a thickness of approximately 500 [Å], p ⁺ type AlGaAs stopper layer 11 having a thickness of approximately 10 to 20 [Å], and n type having a thickness of approximately 3000 [Å].
GaAs collector layer 3, thickness 2000-3000 [Å]
An n ⁺ type collector contact layer 2 is grown in order. It should be noted that the AlGaAs stopper layer 11 made of p ⁺ type can also be made of n-type, and specifically, as AlGaAs, Al _0.3 Ga _0.7 As can be used regardless of the conductivity type. good. (b) Mesa etching is performed to expose the emitter electrode contact surface, and the surface of the n ⁺ type GaAs emitter contact layer 6 is selectively exposed. (c) Form the emitter electrode 7 by applying a vapor deposition method and a lift-off method. (d) Collector electrode 9 is formed by applying vapor deposition and lift-off methods. (e) Mesa etching is performed to expose the base electrode contact surface, and the surface of the p ⁺ type AlGaAs stopper layer 11 is selectively exposed. For etching in this case, for example, the etchant is CCl ₂ F ₂ +He and the pressure is 5 [Pa].
A selective dry etching method may be applied. Such ^selective dry etching
It is reliably stopped on the surface of the AlGaAs stopper layer 11. (f) Selective etching of the p ⁺ type AlGaAs stopper layer 11 is performed using a hydrofluoric acid-based etchant as an etchant to selectively expose the surface of the p ⁺ type GaAs base layer 4. Wet etching in this case is p ⁺ type
Since the thickness of the AlGaAs stopper layer 11 is extremely thin, control is certainly easy. Note that this step is not ^essential ;
There is no practical problem even if the base electrode 8 is formed directly on the AlGaAs stopper layer 11. (g) Form the base electrode 8 by applying a vapor deposition method and a lift-off method. Incidentally, isolation between elements can be achieved by applying an appropriate technique such as mesa etching or forming an insulating film by implanting oxygen ions or protons. Effects of the Invention In the method for manufacturing a heterojunction bipolar semiconductor device according to the present invention, there is a step of sequentially forming at least an AlGaAs emitter layer, a GaAs base layer, an AlGaAs stopper layer, and a GaAs collector layer on an insulating single crystal substrate. Then, the collector layer, the stopper layer, and the base layer are mesa-etched to expose the emitter electrode formation region of the emitter layer, and the collector layer is dry-etched to form the emitter electrode formation region of the emitter layer. A step of stopping the etching at the stopper layer located on the base electrode formation region, and leaving the emitter electrode on the emitter electrode formation region and the base electrode on the base electrode formation region without being etched. The structure includes a step of forming collector electrodes on each of the collector layers. Therefore, even if the HBT is an inverted type and has a structure in which a GaAs collector layer exists on a GaAs base layer, the surface of the GaAs base layer can be exposed without any damage by mesa etching, and the base electrode can be formed. Since the base layer is not damaged, it is possible to form the base layer thinner than before to maintain a high injection efficiency β. Since there is no damage to the base layer, the resistance value will not be higher than that of conventional ones even if it is formed thinly.

[Brief explanation of drawings]

FIG. 1 is a cutaway side view of essential parts of an inverted HBT manufactured according to an embodiment of the present invention, FIG. 2 is a cutaway side view of essential parts of a conventional HBT manufactured using the conventional technique, and
The figures each show a cutaway side view of the main parts of an inverted HBT manufactured using the conventional technology. In the figure, 1 is a semi-insulating GaAs substrate (insulating single crystal substrate), 2 is an n ⁺ type GaAs collector contact layer, 3 is an n type GaAs collector layer, and 4 is a p ⁺ type
GaAs base layer, 5 is n-type AlGaAs emitter layer,
Reference numeral 6 indicates an n ⁺ type GaAs emitter contact layer, 7 an emitter electrode, 8 a base electrode, 9 a collector electrode, and 10 a groove for isolation between elements.

Claims (1)

[Claims] 1. A step of sequentially forming at least an AlGaAs emitter layer, a GaAs base layer, an AlGaAs stopper layer, and a GaAs collector layer on an insulating single crystal substrate, and then forming the collector layer, the stopper layer, and the base layer. exposing the emitter electrode formation region of the emitter layer by mesa etching; and dry etching the collector layer to stop at the stopper layer located on the base electrode formation region of the base layer. a step of forming an emitter electrode on the emitter electrode formation region, a base electrode on the base electrode formation region, and a collector electrode on the collector layer remaining without being etched; 1. A method for manufacturing a heterojunction bipolar semiconductor device, comprising: