JPH0363250B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital filter applied to a low-pass filter of a digital color encoder.

When a digital filter is incorporated as hardware into a digital signal processing circuit as a real-time processor, a coefficient multiplier that usually looks up a large-capacity storage device such as a ROM is used. As a result, the circuit scale increases, making it difficult to incorporate the digital filter into an LSI.

Therefore, the applicant of this application expanded the transfer function of a digital filter into a plurality of polynomials, set the coefficients of the plurality of polynomials to integers, made the coefficients correspond to the plurality of polynomials, and obtained the coefficients by addition. We have previously proposed a digital filter with a structure in which partial filters are connected in cascade.

Further, when configuring hardware such as a low-pass filter, a negative impulse response is required in order to realize a pass band having a predetermined maximum flattening characteristic, Thievishev characteristic, or the like. As described above, in the configuration in which partial filters are connected in cascade, the polynomial partial filters having negative coefficients have high-frequency boost characteristics. Therefore, it is necessary to add 2 to 3 overhead bits to any input data to prevent overflow or underflow. In this case, clipping may be performed at the stage where overflow occurs, but it is better to make the entire system linear.

This invention minimizes overhead bits and prevents the configuration from becoming complicated.

FIG. 1 shows an example of a filter having high-frequency boost type characteristics for producing quasi-maximum flattening characteristics. In the figure, 1 indicates an input terminal, and 2 indicates an output terminal. To the input terminal 1, data of 8 bits per sample is supplied, for example. Further, D represents a unit delay amount equal to the sampling period, and 3, 4, 5, and 6 are multipliers of coefficients expressed by numbers. The filter having the configuration shown in FIG. 1 has the following transfer function H ₁ (Z), where Z is the unit delay operator.

H ₁ (Z)=Z ⁴ −6Z ³ +14Z ² −6Z+1/4 This 1/4 coefficient is for normalizing the gain.

Then, input terminal 1 and the outputs of the four unit delay circuits are (1, 0, 1, 0, 1) (where 1 is 8
All bits being 1 and 0 means that all 8 bits are 0. ) appears, similarly (0, 1, 0,
1, 0) is the worst input bit pattern, and the former case produces +4 times the output and the latter -3 times the output, resulting in the need for 3 overhead bits.

Therefore, in this invention, as shown in FIG.
Partial filter 7 with the above transfer function H ₁ (Z)
Before and after the predetermined transfer function H ₂ (Z), for example (1+
Z) ² partial filters 8 are inserted.

The overall transfer function of the partial filters 7 and 8 is as follows.

H ₁ (Z) H ₂ (Z) = Z ⁶ −4Z ⁵ +3Z ⁴ +16Z ³ +3Z ² −
4Z+1/16 In such a configuration, considering the case where the worst input pattern is supplied, (+3/2 times and -1/2 times)
Since the output is generated, only one overhead bit can be used.

Below, this invention will be described as FIR (Finite Impulse Response)
An embodiment of the filter applied to a low-pass filter for band limiting a digital color difference signal (I signal) will be described with reference to FIG.

Input terminal 1 has input from the matrix circuit, for example.
An I signal with _a sampling frequency of 2f _SC (color subcarrier frequency) is supplied. Therefore, (D=1/2f _SC ). Delay circuits 9 and 10 and partial filters 8A, 8B, 7, 11, and 12 are connected in cascade between input terminal 1 and output terminal 2. The delay circuits 9 and 10 have a common circuit configuration with the low-pass filter for the Q signal, and are inserted in order to equalize the group delay times.

The partial filters 8A, 8B, 11, and 12 are configured to add the input and output of the unit delay circuit, each having a transfer function of (Z+1), and are band rejection filters.
B realizes the transfer function H ₂ (Z). Furthermore, the transfer function H ₁ (Z) of the partial filter 7 is expressed as H ₁ (Z)=−2Z ² +16Z ² −8(Z ³ +Z)+2(Z ³ +
Z)+ ^Z4 +1= ^{Z4-6Z3 + 14Z2-6Z} +1. That is, this partial filter 7 is a high frequency boost type filter, similar to that shown in FIG. 1, and uses ²ⁿ as a coefficient.

Note that the above-mentioned transfer function ignores the group delay time and the gain term for normalization for the sake of simplicity.

The digital filter having the configuration shown in FIG. 3 has a low-pass characteristic with attenuation of -2 dB or less at 1.3 MHz and -20 dB or more at 3.6 MHz, and limits the band of the I signal to 1.5 MHz.

As understood from the above description, according to the present invention, the number of overhead bits at the output of the partial filter having a transfer function with a negative coefficient can be minimized, and therefore the configuration Complications can be prevented. In addition, since this invention has a configuration in which partial filters whose transfer function coefficients are integers are connected in cascade, there is no need for a large-scale ROM with expanded data conversion tables, and it can be realized using random logic such as CMOS. This makes it suitable for LSI implementation.
Furthermore, in order to prevent the size of the ROM from becoming extremely large, the data conversion table itself is an approximate value, which causes adverse effects such as changes in characteristics.
However, since the present invention is designed with coefficients as integers from the beginning, such problems do not occur.

Note that the present invention is not limited to low-pass filters, but can be similarly applied to high-pass filters or band-pass filters.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an example of a digital filter having high frequency boost type characteristics, FIG. 2 is a block diagram used to explain the present invention, and FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention. be. 1...Input terminal, 2...Output terminal, 7, 8, 8
A, 8B, 11, 12... Partial filter.

Claims (1)

[Scope of Claims] 1. A transfer function is defined as a plurality of polynomials including a polynomial having at least a term consisting of a negative coefficient and a polynomial having only a term consisting of a positive coefficient, each coefficient being formed by an integer. In a digital filter formed by expanding the plurality of polynomials and obtaining each of the plurality of polynomials by adding the above-mentioned coefficients, and by connecting a plurality of the above-mentioned partial filters in a subordinate manner, the polynomial having the above-mentioned negative coefficient is formed. Insert a partial filter forming a polynomial having only terms consisting of the above positive coefficients in front of the partial filter constituting the above,
A digital filter which minimizes the overhead bits of the output series of the partial filters constituting the polynomial having negative coefficients.