JPH036625A - Central processing unit - Google Patents

Abstract

PURPOSE:To attain a highly efficient reinterruption processing by using an interruption answer control circuit and an answer parameter control circuit and designating the waiting time when an input/output controller reinterrupts. CONSTITUTION:When an interruption answer control circuit 103 rejects an interruption, an answer parameter which instructs the waiting time of the inter ruption is reported to an input/output controller 110 from an answer parameter control circuit 104 via a common bus control circuit 102 and a common bus 101 together with an interruption rejecting answer. The controller 110 receives the answer parameter and performs a reinterruption when a time prescribed by the answer parameter passed. As a result, the controller 110 can perform a highly efficient reinterruption processing in accordance with the state of a central processing unit 100.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to interrupt reception processing of a central processing unit, and particularly to re-interruption processing.

Conventional technology Conventionally, when a central processing unit of this type rejects an interrupt from an input/output control device, it simply notifies the input/output control device to perform a reinterruption, but does not wait until the reinterruption occurs. No instructions were given regarding waiting times.

Problems to be solved by the invention In a data processing system using a conventional central processing unit,
When the input/output control unit performs a re-interrupt, it is performed regardless of the state of the central processing unit, so efficient re-interrupt processing cannot be performed.

The present invention has been made in view of the above-mentioned conventional situation,
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a novel central processing unit that eliminates the above-mentioned drawbacks inherent in the conventional technology and is capable of realizing highly efficient re-interrupt processing.

Means for Solving the Problems In order to achieve the above object, the central processing unit according to the present invention includes an interrupt response control circuit that determines whether or not to accept an interrupt from an input/output control device, and an interrupt response control circuit that determines whether or not to accept an interrupt from an input/output control device. It has a response parameter control circuit for notifying the input/output control device of a response parameter specifying a waiting time for re-interruption when a rejection response is made.

Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a central processing unit according to the present invention.

Referring to FIG. 1, a central processing unit 100 is connected to an input/output control unit 110 via a common bus 101. Interrupts from the input/output control device 110 are input to the interrupt response control circuit 103 via the common bus control circuit 102. The interrupt response control circuit 103 is connected to the main control circuit 105.
The interrupt response control circuit 103 determines whether or not to accept the interrupt by recognizing the instruction from the main control circuit 105 and the state of the main control circuit 105. When a 0 interrupt is accepted, the interrupt response control circuit 103 notifies the main control circuit 105 that the interrupt has been accepted. The response parameter control circuit 104 does not notify anything if it is not accepted.The response parameter control circuit 104 controls the response parameter notification to instruct the input/output control device 110 on how long to wait at the time of re-interruption, and the response parameters are instructed by the main control circuit 105. be done.

When the interrupt response control circuit 103 rejects the interrupt, the response parameter control circuit 10
From 4 onwards, the response parameter that instructs the wait time for re-interruption is
The input/output control device 110 is notified via the common bus control circuit 102 and the common bus 101. The input/output control device 110 that has received the notification of the response parameter waits for the time specified by the response parameter and then re-interrupts.6 As described in detail of the invention, the central processing unit according to the present invention is used. Accordingly, when the input/output control device performs re-interrupt processing, highly efficient re-interrupt processing can be performed according to the state of the central processing unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a central processing unit according to the present invention. 100...Central processing unit of the present invention, 101...Common bus, 1θ2...Common bus control circuit, 103...Interrupt response control circuit, 104...Response parameter control circuit, 105...Main control Circuit, 110...input/output control device 01

Claims (1)

[Claims] In a central processing unit that is connected to an input/output control device via a common input/output bus and receives interrupts from the input/output control device, an interrupt is used to determine whether or not to accept an interrupt from the input/output control device. a response control circuit; and a response parameter control circuit for notifying the input/output control device of a response parameter specifying a waiting time for reinterruption when a rejection response is made without accepting an interrupt, and the input/output control device has a response control circuit. A central processing unit characterized in that it is possible to specify a waiting time when the device re-interrupts.