JPH0370367B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a manufacturing apparatus for manufacturing a large quantity of semiconductor devices stably and with good reproducibility by a plasma vapor phase method (hereinafter referred to as PCVD) using glow or arc discharge.

The present invention provides a PCVD apparatus in which no electrodes or other jigs are provided in the reaction column into which reactive gases are introduced in the plasma vapor phase method, and a substrate having a surface to be formed and its substrate holder (for example, quartz) are provided. This invention relates to a manufacturing device for forming a semiconductor film with a uniform coating thickness by introducing only a lamina flow (laminar flow) of reactive gas, and with less variation in film quality within and between batches. .

Generally, in PCVD equipment, when using silane or silicon halide gas, which is a reactive gas mainly composed of silicon with particularly strong reactivity, oxygen (air) adsorbed on the inner wall and holder of a reaction tube, such as a quartz glass tube, and Moisture reacts with silicide gas to form silicon oxide (lower silicon oxide), which deteriorates the conductivity of semiconductors.

In order to prevent such oxygen and moisture from being introduced into the reactor, the present invention provides a chamber connected to the reaction tube and having a mechanism for holding or moving the substrate and substrate holder, thereby improving productivity and reproducibility of characteristics. Regarding manufacturing equipment that has been improved.

Furthermore, the present invention includes an electrode so that a plasma discharge electric field is applied parallel to the substrate surface, and the active reactive products collide perpendicularly to the surface of the substrate to form a semiconductor film. Another purpose is to prevent deterioration of characteristics. To prevent spatter (damage) on the surface to be formed, for example, a P-type semiconductor layer is provided on the surface to be formed, and an I-type (intrinsic or substantially intrinsic) semiconductor layer is formed on the upper surface.
When attempting to fabricate a semiconductor layer, impurities constituting the P type mix into the I layer at a concentration of 10 ₁₇ to _{10 18} cm ^-5 , degrading the PI junction. The present invention has been proposed to prevent such drawbacks.

Furthermore, the present invention provides a first reaction system consisting of the reaction system described above, a first chamber connected to this, a second chamber connected to this first chamber, and further a second chamber connected to this first chamber. The present invention relates to a manufacturing apparatus provided with a second reaction system similar to the first reaction system connected to a chamber. In such a manufacturing apparatus, a substrate and a holder are first inserted into a first reactor by a moving mechanism in an atmosphere in which the first chamber is evacuated and oxygen and moisture are removed, and one conductive conductor is inserted into the first reactor in this reactor. A semiconductor having a conductivity type, for example P type, was formed. Further, the substrate on which the semiconductor has been formed is taken out again to the first chamber, and further transferred to a second chamber connected thereto in a vacuum atmosphere completely free of oxygen and moisture. Furthermore, the substrate and the holder are introduced into a second reactor from this second chamber,
A second semiconductor layer can be formed on the first semiconductor layer with a different conductivity type or a different dopant or a different concentration thereof (impurity or dopant) than the first chamber.

At this time, impurities attached to the inner wall of the first reactor do not attach at all when forming the second semiconductor layer, so conductivity or Eg (energy band width) etc. can be controlled with extremely high precision. Natsumu to be able to.

Furthermore, the present invention further provides three systems of these independent reactors, and connects them to a common chamber, i.e., the first, second, and
In particular, in a manufacturing apparatus connected to each other in a third chamber, a P-type semiconductor layer is formed in a first reactor, and a second
This method is particularly effective when a PIN type diode, particularly a photoelectric conversion device, is to be manufactured by forming an I type semiconductor layer in a second reactor and further forming an N type semiconductor layer in a third reactor.

The present invention increases the number of stages from 4 to 10 instead of only 2 or 3 by providing the reactor in the order of the films to be stacked through a common chamber depending on the number of layers to be stacked. be able to. Thus PIN, SINPIN, PINIPIN, NIPIN,
It can be made into a bonded structure such as PINIP, etc.
Furthermore, when producing this semiconductor layer, by adding carbon or germanium to a valent element such as silicon and controlling the amount of addition, it is possible to have an optical energy band width Eg proportional to and corresponding to the amount of addition. . For example, PIN junction is Egp, Egi,
W-N-W (wide) with Egn (Egp>EgiEgn)
Eg - narrow Eg - wide Eg). Furthermore, in the PINPIN structure in which two PIN junctions are stacked, Egp ₁ , Egi ₁ ,
Egn ₁ , Egp ₂ , Egi ₂ , Egn ₂ (Egp ₁ > Egn ₁ Egi ₁
Egp ₂ Egi ₂ Egn ₂ ) and Egp ₁ (2.0~
2.4eV), Egn ₁ (1.7~2.1eV) with SixC _1-x (0<x<
1), Egi ₁ and Egp ₁ (1.6 to 1.8 eV) by Si,
Egi ₂ , Egn ₂ (1.0~1.5eV) with SixGe _1-x (0<x<
1). To obtain such a tandem structure, six reaction systems may be provided.

Also, MIS/FET with NIN or PIN junction,
In bipolar transistors, there are two reaction systems, and the first reaction chamber supplies N or P on the substrate.
It is possible to create a three-layer structure in two systems by using the second reaction system to create the next I layer, and then returning the substrate holder to the first reaction system to create the third N or P layer. It is possible.

The object of the present invention is not to connect reactors to each other, but to connect independent reaction systems to a common chamber, and form independent semiconductor layers on a substrate via this chamber.

Regarding conventional PCVD apparatuses, a method is known in which capacitively coupled electrodes are provided in parallel flat plates on top and bottom, a substrate is placed on one of the electrodes, for example, a lower cathode electrode, and the substrate is heated from below. However, in this method, since the reactor is a single chamber, when P-type, I-type, and N-type semiconductor layers are stacked, impurities in the N-type semiconductor layer after the first production will be absorbed into the second production process. It got mixed into the P-type semiconductor layer in the process, became a recombination center, deteriorated the diode characteristics, and further caused the characteristics to vary completely.
For this reason, even if an attempt was made to make a photoelectric conversion device, the open circuit voltage Voc could only be obtained from 0.2 to 0.6 V, and the short circuit current could only be a few mA/cm ² .

In addition, in this parallel plate type device, the electric field is perpendicular to the substrate surface, so the I
Even if a layer is made, impurities from the P layer tend to mix into the I layer, and diode characteristics are often not achieved.

Furthermore, since this reactor does not have a preliminary chamber, the inner wall of the reactor is exposed to the atmosphere (air) every time it is manufactured, so oxygen and moisture are adsorbed.
Because the adsorbed oxide exists at the background level during the reaction, the electrical conductivity is 10 ^-11 in dark conductivity.
~10 ^-8 (Ωcm) ^-1 , and the photoconductivity at AM1 is also 10 ^-6 ~10 ^-4
(Ωcm) It was only ^-1 . However, in the present invention, which uses an apparatus in which no adsorbed substances exist, the dark conductivity is 10 ^-6 to 10 ^-4 and the photoconductivity at AM1 is 1×
10 ^-3 to 9×10 ^-2 (Ωcm) ^-1 , which is approximately 100 times higher, allowing it to have semiconductor properties. The present invention is intended to eliminate all the drawbacks of the PCVD apparatus of the parallel plate type one-chamber reactor which has been used in large numbers in the past.

Furthermore, as a further improvement on this conventional system, an independent separation type reaction apparatus is known, which is filed by the present inventor. This device is described in detail in Method for Manufacturing a Semiconductor Device, December 10, 1972 (53-152887) and its divisional application Method for Manufacturing a Semiconductor Device (56-055608). Furthermore, the film preparation method
Details are also given on August 16, 1974 (54-104452).

For example, when trying to fabricate a diode having a PIN junction, these inventions require a first reaction system for a P-type semiconductor layer, a second reaction system for an I-type semiconductor layer, and a third reaction system for an N-type semiconductor layer. This reaction system is constructed by connecting each reactor (Bergear) with a gate valve. This prevents impurities from the P layer from mixing into the I layer, and impurities from the N layer from mixing into the I and P layers. It has the characteristic that it is possible to control impurities in each semiconductor layer with complete precision. Furthermore, this P
A preliminary chamber is provided in front of the reactor for the layer or after the reactor for the N layer, and oxygen from the outside is supplied.
This was an attempt to prevent water vapor from entering.

However, in the system invented by the present inventors in which reactors of the vertical Belgear type or a variation thereof are connected to each other, the temperature of the substrate cannot be sufficiently controlled. In other words, the temperature was approximately 300±20°C. For this reason, the formed coating had large variations, which was not preferable. In addition, the number of substrates that can be filled into one reactor is, for example, 1 to 10 with a 10 cm opening.
It was hot. As a result, productivity is extremely low.
It was not so-called low-priced, mass-produced products.

The present invention further improves the independent separation type semiconductor device manufacturing apparatus of the present inventor, and has a temperature accuracy of 300±.
Low price that can be kept below 1℃, and in addition, the number of loads per load can be reduced to 50 to 500.
The purpose is to manufacture high-quality semiconductor devices in large quantities.

Examples are shown below according to the drawings.

Figure 1 shows the horizontal, independent separation type plasma of the present invention.
An overview of a CVD device, that is, a semiconductor device manufacturing device is shown.

In the drawing, the first reactor 1 is a cylindrical reaction tube 5 made of, for example, transparent quartz (alumina or other ceramics may also be used), and its diameter is 100 to 300 mmφ. Furthermore, a pair of electrodes 2 and 2' for generating plasma discharge were arranged outside the reactor 5. This electrode is made of, for example, a stainless steel mesh, and a resistance heater 3 is provided covering this electrode, and the indicated temperature is 50.
~350°C, for example 300°C, is controlled with an accuracy of ±1°C. The substrate and substrate holder are abbreviated as 4, and the reactive gas is supplied from 6 through a homogenizer 26. A pair of electrodes is connected to a high frequency (10KPH to 100MHz, typically 13.56M
PH is supplied at a strength of 5 to 200W. Unnecessary products after the reaction and carrier gases such as helium and hydrogen are discharged from the exhaust port 13 through the pressure regulating valve 14 in the reaction tube by the rotary pump 15.

During the reaction, the reaction pressure in the reaction column 5 was maintained at 0.05 to 0.6 torr, typically 0.3 torr, and the effective flow rate of the reactive gas was kept to several tens of m/sec.

In addition to this first reactor, a first chamber 7 having a moving mechanism 12 for inserting the substrate and holder 4 into the reactor or pulling them out from the reactor is provided on the inlet side in the drawing. When this chamber is set to atmospheric pressure, high-purity air is supplied from 14, and ventilation is performed by a rotary pump 37 via a valve 39.
It is evacuated to 0.001 to 0.01 torr.

Further, the kneading substrate and holder 11 are moved from the preliminary chamber 8, and this first preliminary chamber 8 is brought to atmospheric pressure with air introduced from 13, and the vacuum is pulled by the valve 40,
This was done by the pump 38, and a sufficiently low vacuum approximately equal to that of chambers 1 and 7 was created. And the board and holder 1
0 is moved to 11. Further, this 11 was transferred to the first reactor 4, and a predetermined semiconductor film was formed on the substrate.

Further, after this film is formed, the substrate and holder 4 reach the electrode 11, and those to be taken out can be taken out from the preliminary chamber 8.

Furthermore, if a semiconductor layer is to be formed on top of this, the shutter 32 is opened at 11 and the material is moved to the second chamber 30. This 32 and the next stage shutter 33
is not necessarily necessary, and in that case, a plurality of reactors will be provided in a common chamber in series.

Furthermore, the substrate and the holder are in the second reaction system 4.
2, the second semiconductor layer (for example, I layer) could be made independently, regardless of the history of forming the first semiconductor layer (for example, P layer).

Reactive gas enters this second reactor through the reactive gas inlet 24, and the carrier gas and impurities are discharged to the outside through the exhaust port, valve 14, and vacuum pump 20.

Furthermore, after this second semiconductor film is formed, it may be taken out to the outside through the second preliminary chamber 35, but in this drawing, it is further removed from the third reaction system 4.
3, a third semiconductor layer, for example, an N-layer semiconductor layer, is formed, and the substrate and holder 34 on which these three layers have been formed pass through a second preliminary chamber 35 that is evacuated, and air is introduced from 13. After bringing the pressure to atmospheric pressure, the gate valve 36 is opened and the gas is taken out to the outside.

As is clear from the above outline, the present invention has a first chamber in the first reaction system, and a moving mechanism 12 provided in this chamber moves the substrate and holder 4 between the reactor 1 and the first chamber 7. Go back and forth between. Furthermore, it similarly has second and third reactors, substrate and holder maintenance and movement mechanisms 29 and 41. These first, second, and third chambers are provided in common, and the first, second, and third chambers are provided on the inlet and outlet sides of the common chamber.
A second preliminary chamber is provided to prevent oxygen and moisture in the air from entering the reaction system. In this manufacturing apparatus, since each reaction is drawn out from the reactor to the chamber 7 which has been evacuated once, the reactive gases of each reaction system are never mixed into the respective reactors.
In particular, the gate valves 52, 5 between each reactor and the chamber
3, 54 to open and close the board and holder 1 when putting it in and taking it out.
When 1 moves to 11' and 11'', this gate valve is completely closed, so each reaction system shown by the inventor in the conventional explanation is connected to each other by one gate valve. The autodoping of impurities was further reduced compared to the case where the

Additionally, in the above description, the substrate holder was moved through each reaction chamber with the substrate. However, in the production of the present invention, only the substrate is moved, and the holders are arranged exclusively for the first reactor holder 11, the second reactor holder 11', and the third reactor holder 11". In this way, it is possible to completely remove impurities between each reaction chamber, especially PN type or Eg variable impurities and additives adhering to the holder surface. This is completely revolutionary for production purposes.

FIG. 2 is intended to supplement the manufacturing apparatus shown in FIG. 1. That is, the reactive gases supplied to the first, second, and third reactors are supplied from 6, 27, and 28, respectively. The reactive gases are shown correspondingly in FIGS. 2A, B and C.

In Figure 2A, diborane 4 diluted with hydrogen
3. Silane 44 A gas for etching the inner wall of the reactor, such as CF ₄ (O ₂ = 0 to 5%), or a reactive gas in which silicon and carbon, which are additives of NF ₃ carbide, are combined, such as TMS (tetramethylsilane Si (CH ₃ ) ₄ ), 46
and hydrogen or helium 47, which is a carrier gas.

These are supplied to the first reactor from 6 through a flow meter (mass flow meter) 50 and an electromagnetic valve 51. In this case, it is made of SiXC _1-x (0.2x1) and the conductivity type is P type. By doing so
A non-single crystal semiconductor containing a P-type amorphous or semi-amorphous structure having an Eg of 1.7 to 2.5 eV was formed on a substrate to a thickness of 100 to 300 A.

The preparation of the film is described in detail in the patent application (Plasma Vapor Phase Method S56.10.14 56-103627) which is the application of the present invention.
0.1~0.3orr plasma generation current 13.56MPH5~
The 100W coating was formed for 10 seconds to 10 minutes.

If the inner wall of the reactor is fabricated 5 to 30 times, flakes will occur, so in such cases, CF ₄ or
It can be removed by plasma etching with _NF3 .

Figure 2B shows the amorphous or 5-
A case is shown in which a non-single-crystal semiconductor film made of semi-amorphous or micro-polycrystal containing microcrystals with a size of 100 A is manufactured.

That is, it consists of silane 45CF ₄ (O ₂ = 0 to 5%) and carrier gas helium 49, 5 to 20%.
Silane diluted with helium increases the photoconductivity from 1×10 ^-3 to 9×10 ^-2 (Ωcm) ^-1, especially from 5 to 20×10 ^-3
(Ωcm) ^-1 non-single crystal semiconductor of silicon
It was manufactured to a thickness of 0.4 to 1μ.

In addition, Fig. 2 C shows N-type impurity Phosphine 48, silane 43, and etching gas 4, which is the opposite to A.
5 TMS 46 Carrier Gas 40 Provided 100 ~
A 500A N-type semiconductor layer was fabricated.

Thus, a PIN type diode or photoelectric conversion device was fabricated on a substrate as shown in Figure 3, and its characteristics were investigated.

In FIG. 3A, a P-type semiconductor layer 71, an I-type semiconductor layer 72, an N-type semiconductor layer 74 are formed on a substrate 70 in which a stainless steel film is formed on a metal substrate such as stainless steel or a flexible film such as Kapton.
A semiconductor layer 73 made of
Translucent transparent conductive film such as 600~800A ρ _S = 10~
25Ω/mouth). Conventional one-room parallel plate type has 6-7.5%/3mm at AMI (100mW/cm ² )
□ However, in the vertical type independent separation type applied by the present inventor, 7.5 to 9.5%/3
mm□ was obtained. However, in the present invention, when the holder is made independent of each reactor, it is possible to produce a solar cell with a high conversion efficiency of 16%/3 mm□ at most, generally 12 to 15%. Furthermore, when the holder was used in common for each reactor, the efficiency was as high as 9.0 to 12.5%.

This is because it prevents oxide gases such as oxygen and moisture from entering from the outside, and prevents impurities from entering the surfaces of each semiconductor.

More importantly, in one batch, 10
It is possible to load 50 to 500 meters of substrates of cm□, and the equipment consumption cost for 1 meter of 10 cm□ is lower than that of conventional
Items that cost 50 to 500 yen cost 0.2 to 2 yen, about 1/2
It was extremely important for the spread of photoelectric conversion devices in that it became possible to reduce the number of solar cells to 100.

FIG. 3B shows a light-transmitting substrate 76 such as glass.
A P-type semiconductor layer 71 is formed on a transparent conductive film 77 of low sheet resistance (ρ ₃ =5-20Ω/high heat resistance) made of ITO (500-800A) 78 and tin oxide or antimony oxide 79 (100-300A). An I-type layer 72, an N-type layer 74, and a back electrode 75 made of aluminum or ITO are provided. Even in this structure, a conversion efficiency of 10 to 13% could be obtained.

Therefore, if you integrate this structure on a glass substrate and at the same time provide a PIN type backflow prevention diode to obtain the same output as a conventional solar cell, the area will be 1/2 that of the conventional one and the price will be 200 yen.
- Reduced 250 yen to 20-30 yen, in an area of 10 cm ²
It is now possible to make it for 100 to 130 yen.

FIG. 4 shows the relationship among the substrates, electrodes, and substrate loading placed in a reactor using the glow discharge method in the plasma CVD method of the present invention.

In FIG. 4A, the electrodes 2 and 2' are horizontally parallel to each other, and the substrates 61 are placed in close contact with each other on their back surfaces, with a distance of 20 to 40 mm between the substrates on the front surface. Also, the arrangement is horizontal.

The reaction tube 5 of the reactor 1 has a diameter of 100 to 300 mmφ, typically 180 mmφ, and a length of 200 to 400 cm. Therefore, each stage has 10 columns of 20 tubes on a 10 cm square board, instead of 8 tubes as shown in the drawing. ~30 rows could be arranged. As a result, 50 to 600 semiconductor devices can be manufactured in one production batch, making it possible to manufacture an amount of semiconductor devices at once that was completely unimaginable using the conventional parallel plate method.

In FIG. 4B, the electrodes 2 and 2' are vertically disposed, and the front surface (forming surface) of the substrate 61 is vertically disposed with the back surfaces of the substrate 61 in close contact with each other. Others are the same as A.

Loading of substrates onto the holder may be performed by alternating steps A and B.

FIG. 4C shows a plasma CVD method using an arc discharge method or a glow discharge method.

The drawing shows one reactor of FIG. 1A. That is, the discharge electrodes 2 and 2' are provided in the direction of the reaction tube, the substrate 61 is loaded in the holder 60, and the heater 3 is provided outside the reaction tube 5. To create an arc discharge, thermoelectrons are emitted from one electrode. Reactive gas is introduced at 6, and unnecessary reactive products and carrier gas are introduced at 63.
released to the outside. These unnecessary reaction products turn into powder in the low-temperature region, so to prevent them from forming inside the reactor 5 (inner wall),
The heater 3 was arranged to cover the entire reaction tube as shown at 65.

By doing so, the powdered reaction product was no longer left in the reaction column, and the yield was improved. If the same procedure is applied to FIG. 1 or FIGS. 4A and 4B, the productivity will be further improved.

As is clear from the above explanation, the present invention adopts a horizontal reaction method that enables mass production compared to the plasma vapor phase method, and furthermore, by providing a common chamber for both and creating a structure for continuous production, it is possible to use a batch method. It became possible to combine this with a continuous method. Therefore, based on this idea, two reaction systems, 4-8
We were able to create a reaction system, etc., and for the first time, we were able to develop a method that could be mass-produced using PCVD equipment.

Furthermore, in this semiconductor manufacturing equipment, simply SIN
Not only photoelectric conversion devices, but also N(0.1~1μ)-I
(0.2~2μ)-I(0.5~1μ) conduction type IGFET (vertical channel type insulated gate field effect semiconductor device)
It is possible to create a structure that integrates it. Furthermore, this reactor has a width of 2 to 20 mm in the horizontal direction.
It is also possible to arrange a long semiconductor substrate of 50 to 100 cm and make a photo sensor array or other semiconductor device on the entire top surface. We believe that the engineering effects of the semiconductor manufacturing apparatus of the present invention are extremely significant.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the semiconductor device manufacturing apparatus of the present invention. FIG. 2 shows an embodiment of a reactive gas system that supplements FIG. 1. FIG. 3 shows a vertical sectional view of a photoelectric conversion device made according to the present invention. Fourth
The figure is an embodiment showing a portion of the reactor shown in FIG.

Claims (1)

[Scope of Claims] 1. A common chamber capable of reducing pressure, and a plurality of chambers arranged in parallel to the common chamber corresponding to the lamination formation of a plurality of coatings, each hermetically connected to the common chamber via a gate valve means. a plasma reactor; means for transporting the substrate into and out of the common chamber to each of the plurality of plasma reactors; means for forming a film in each of the plurality of plasma reactors; In order to deposit a plurality of films, the substrate is moved in one direction along the plurality of plasma reaction chambers in the common chamber, and the substrate is transferred from one of the loading/unloading means provided in the reactor to another. A semiconductor device manufacturing apparatus characterized by having a mechanism for. 2. The semiconductor device manufacturing apparatus according to claim 1, further comprising means for holding a substrate carried into each of the plurality of plasma reactors. 3. A step of transporting the substrate into a common room where pressure can be reduced;
a step of transporting the substrate in the common chamber into three or more plasma reactors arranged to correspond to the formation of a layer of a plurality of films; and forming a film on the substrate in each of the three or more reactors. a step of carrying out the substrate from each of the reactors to the common chamber; and a step of carrying out the substrate from the common chamber where pressure can be reduced after completing the carrying-in step, the film forming step, and the carrying-out step. 1. A semiconductor device manufacturing method comprising: a substrate on which film formation has been completed in each of the reactors; after being carried out to the common room, the substrate is carried into the next reactor; 4. A step of transporting the substrate into a common room where pressure can be reduced;
a step of transporting the substrate in the common chamber into a first reactor;
a step of forming a mold coating; a step of carrying out the substrate from the first reactor to the common chamber; a step of carrying the substrate carried out to the common chamber into a second reactor; forming an intrinsic or substantially intrinsic coating on the P-type or N-type coating in a second reaction furnace; carrying out the substrate from a second reaction furnace to the common chamber; a step of transporting the substrate carried out to a third reactor; a step of forming an N-type or P-type film on the film in the third reactor; and a step of transporting the substrate from the third reactor to the A method for manufacturing a semiconductor device, comprising: carrying out the substrate to a common chamber; and carrying out the laminated substrate from the common chamber where pressure can be reduced.