JPH0375544U - - Google Patents

Info

Publication number
JPH0375544U
JPH0375544U JP1989135401U JP13540189U JPH0375544U JP H0375544 U JPH0375544 U JP H0375544U JP 1989135401 U JP1989135401 U JP 1989135401U JP 13540189 U JP13540189 U JP 13540189U JP H0375544 U JPH0375544 U JP H0375544U
Authority
JP
Japan
Prior art keywords
lsi
plate
flange
substrate
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989135401U
Other languages
English (en)
Other versions
JPH0648870Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989135401U priority Critical patent/JPH0648870Y2/ja
Publication of JPH0375544U publication Critical patent/JPH0375544U/ja
Application granted granted Critical
Publication of JPH0648870Y2 publication Critical patent/JPH0648870Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)

Description

【図面の簡単な説明】
第１図は、本考案の実施例を示す図であり、第
２図は、第１図における要部拡大図であり、第３
図は、本考案の他の実施例を示すであり、第４図
は、従来の構造を示し、同図ａは、冷却構造図で
あり、同図ｂは、下視図である。 図において、１……コールドプレート、１ａ…
…フランジ、２……基板、３……ＬＳＩ、４……
冷却水、６……ベローズ、９……形状記憶合金部
品、をそれぞれ示す。

Claims (1)

  1. 【実用新案登録請求の範囲】 基板２上に実装されたＬＳＩ３を冷却する冷却
    水４が流動するコールドプレート１と、 該ＬＳＩ３上に形成される熱伝導性に優れた伝
    熱板７と、 該ＬＳＩ３の実装上の傾斜を許容する、一端が
    該コールドプレート１と接合し、他端が該伝熱板
    ７と接合してなるベローズ６とからなる集積回路
    の冷却素子構造に於いて、 前記コールドプレート１の部品実装位置に対応
    して基板２側に突出するフランジ１ａを形成し、 該フランジ１ａと前記ベローズ６との接合面に
    、一方向性の形状記憶合金により構成された部品
    ９を設けることを特徴とする集積回路の冷却素子
    構造。
JP1989135401U 1989-11-24 1989-11-24 集積回路の冷却素子構造 Expired - Lifetime JPH0648870Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989135401U JPH0648870Y2 (ja) 1989-11-24 1989-11-24 集積回路の冷却素子構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989135401U JPH0648870Y2 (ja) 1989-11-24 1989-11-24 集積回路の冷却素子構造

Publications (2)

Publication Number Publication Date
JPH0375544U true JPH0375544U (ja) 1991-07-29
JPH0648870Y2 JPH0648870Y2 (ja) 1994-12-12

Family

ID=31682671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989135401U Expired - Lifetime JPH0648870Y2 (ja) 1989-11-24 1989-11-24 集積回路の冷却素子構造

Country Status (1)

Country Link
JP (1) JPH0648870Y2 (ja)

Also Published As

Publication number Publication date
JPH0648870Y2 (ja) 1994-12-12

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